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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone > -----Original Message----- > From: Chiu, Chasel > Sent: Thursday, October 7, 2021 11:43 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Benjamin Doron > > Subject: [edk2-platforms: PATCH v3 3/9] > KabylakeOpenBoardPkg/AspireVn7Dash572G:Use same variable name for > FspNvsHob >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3678 >=20 > To simplify the implementation the variable Name/GUID has been changed > to "FspNvsBuffer" and gFspNvsBufferVariableGuid regardless it stores the > data from FSP_NON_VOLATILE_STORAGE_HOB2 or > FSP_NON_VOLATILE_STORAGE_HOB. >=20 > Cc: Nate DeSimone > Cc: Benjamin Doron > Signed-off-by: Chasel Chiu > --- >=20 > Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Li > brary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 24 > ++++++++++-------------- >=20 > Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/ > PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c | 23 ++= +++++++- > ------------- >=20 > Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Li > brary/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 7 > ++++--- >=20 > Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/ > PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 2 +- > 4 files changed, 24 insertions(+), 32 deletions(-) >=20 > diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/ > Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper > /Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > index d8413d284e..a9b7e446c8 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/ > Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper > /L > +++ ibrary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > @@ -1,7 +1,7 @@ > /** @file Implementation of Fsp Misc UPD Initialization. -Copyright (c= ) 2017, > Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2021, In= tel > Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clau= se- > Patent **/@@ -11,7 +11,6 @@ SPDX-License-Identifier: BSD-2-Clause- > Patent > #include #include #include > - #include #include #include > @@ -34,24 +33,21 @@ PeiFspMiscUpdUpdatePreMem ( > { EFI_STATUS Status; UINTN = VariableSize;- VOID > *MemorySavedData;+ VOID *FspNvsBufferPtr; = UINT8 > MorControl; VOID *MorControlPtr; // /= / Initialize S3 Data > variable (S3DataPtr). It may be used for warm and fast boot paths. //- > VariableSize =3D 0;- MemorySavedData =3D NULL;- Status =3D PeiGetVariab= le (- > L"MemoryConfig",- &gFspNonVolatileStorageHobGuid,- > &MemorySavedData,- &VariableSize- );- DEBUG ((DE= BUG_INFO, > "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid - %r\n", Status));- > DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", VariableSize));- > FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData;+ > FspNvsBufferPtr =3D NULL;+ VariableSize =3D 0;+ Status =3D PeiGetLar= geVariable > (L"FspNvsBuffer", &gFspNvsBufferVariableGuid, &FspNvsBufferPtr, > &VariableSize);+ if (Status =3D=3D EFI_SUCCESS) {+ DEBUG ((DEBUG_INFO= , > "Get L\"FspNvsBuffer\" gFspNvsBufferVariableGuid - %r\n", Status));+ > DEBUG ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", VariableSize));+ > FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr;+ } if > (FspmUpd->FspmArchUpd.NvsBufferPtr !=3D NULL) { //diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Librar > y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Librar > y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c > index c9dfb17e0a..3764f7c3ac 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Librar > y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Libra > +++ ry/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c > @@ -431,8 +431,8 @@ SiliconPolicyUpdatePreMem ( > SA_MISC_PEI_PREMEM_CONFIG *MiscPeiPreMemConfig; > MEMORY_CONFIG_NO_CRC *MemConfigNoCrc; VOID > *Buffer;- UINTN VariableSize;- VOID > *MemorySavedData;+ UINTN FspNvsBufferSize;+ VOI= D > *FspNvsBufferPtr; UINT8 SpdAddressTable[4]; > DEBUG((DEBUG_INFO, "\nUpdating Policy in Pre-Mem\n"));@@ -463,18 > +463,13 @@ SiliconPolicyUpdatePreMem ( > // Note: AmberLake FSP does not implement the > FSPM_ARCH_CONFIG_PPI added in FSP 2.1, hence // the platform specif= ic > S3DataPtr must be used instead. //- VariableSize =3D 0;- > MemorySavedData =3D NULL;- Status =3D PeiGetVariable (- > L"MemoryConfig",- &gFspNonVolatileStorageHobGuid,- > &MemorySavedData,- &VariableSize- );- = DEBUG > ((DEBUG_INFO, "Get L\"MemoryConfig\" gFspNonVolatileStorageHobGuid - > %r\n", Status));- DEBUG ((DEBUG_INFO, "MemoryConfig Size - 0x%x\n", > VariableSize));- if (!EFI_ERROR (Status)) {- MiscPeiPreMemCon= fig- > >S3DataPtr =3D MemorySavedData;+ FspNvsBufferPtr =3D NULL;+ > FspNvsBufferSize =3D 0;+ Status =3D PeiGetLargeVariable (L"FspNvsBu= ffer", > &gFspNvsBufferVariableGuid, &FspNvsBufferPtr, &FspNvsBufferSize);+ i= f > (Status =3D=3D EFI_SUCCESS) {+ DEBUG ((DEBUG_INFO, "Get > L\"FspNvsBuffer\" gFspNvsBufferVariableGuid - %r\n", Status));+ DE= BUG > ((DEBUG_INFO, "FspNvsBuffer Size - 0x%x\n", FspNvsBufferSize));+ > MiscPeiPreMemConfig->S3DataPtr =3D FspNvsBufferPtr; } //diff= --git > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/ > Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper > /Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > index e4a657c5f1..eac9344b0a 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/ > Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper > /L > +++ ibrary/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > @@ -1,7 +1,7 @@ > ## @file # Provide FSP wrapper platform related function. #-# Copyright= (c) > 2017 - 2020 Intel Corporation. All rights reserved.
+# Copyright (c) 2= 017 - > 2021 Intel Corporation. All rights reserved.
# # SPDX-License-Identif= ier: > BSD-2-Clause-Patent #@@ -74,7 +74,6 @@ > PchInfoLib PchHsioLib PchPcieRpLib- MemoryAllocationLib SiPolic= yLib > PeiLib @@ -134,9 +133,11 @@ > gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAudioConnector > gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid+ > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress+ > gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRootPort4ClkInfo [Guids]- > gFspNonVolatileStorageHobGuid ## CONSUMES+ > gFspNvsBufferVariableGuid ## CONSUMES gTianoLogoGui= d > ## CONSUMES gEfiMemoryOverwriteControlDataGuid diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Librar > y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Librar > y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf > index 0a8cf91b07..4dcc000186 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Librar > y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Libra > +++ ry/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf > @@ -52,7 +52,7 @@ > gHsioPciePreMemConfigGuid ## CONSUMES > gHsioSataPreMemConfigGuid ## CONSUMES > gSaMiscPeiPreMemConfigGuid ## CONSUMES- > gFspNonVolatileStorageHobGuid ## CONSUMES+ > gFspNvsBufferVariableGuid ## CONSUMES gIoApicConfig= Guid > ## CONSUMES gHpetPreMemConfigGuid ## CONSUMES > gLockDownConfigGuid-- > 2.28.0.windows.1