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Thread-Topic: [edk2-platforms: PATCH v3 7/9] WhiskeylakeOpenBoardPkg: Use same variable name for FspNvsHob. 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone > -----Original Message----- > From: Chiu, Chasel > Sent: Thursday, October 7, 2021 11:43 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > Subject: [edk2-platforms: PATCH v3 7/9] WhiskeylakeOpenBoardPkg: Use > same variable name for FspNvsHob. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3678 >=20 > To simplify the implementation the variable Name/GUID has been changed > to "FspNvsBuffer" and gFspNvsBufferVariableGuid regardless it stores the > data from FSP_NON_VOLATILE_STORAGE_HOB2 or > FSP_NON_VOLATILE_STORAGE_HOB. >=20 > Cc: Nate DeSimone > Signed-off-by: Chasel Chiu > --- >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPo > licyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 63 +++++++++= +++--- > ------------------------------------------------ >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/ > PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 63 > ++++++++++++--------------------------------------------------- >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPo > licyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 5 ++--- >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/ > PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 4 ++-- >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMa > pInclude.fdf | 18 ++++++= +++--------- > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > | 3 +++ >=20 > Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPk > g.dsc | 3 +++ > 7 files changed, 43 insertions(+), 116 deletions(-) >=20 > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilicon > PolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilicon > PolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > index a341a58930..ab35bc3f8f 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilicon > PolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilic > +++ onPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > @@ -2,7 +2,7 @@ > Implementation of Fsp Misc UPD Initialization. - Copyright (c) 2019,= Intel > Corporation. All rights reserved.
+ Copyright (c) 2019 - 2021, Intel > Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2- > Clause-Patent **/ @@ -17,11 +17,9 @@ > #include #include -#include > #include #include > #include -#include > #include > #include @@ -44,55 +42,18 @@ > PeiFspMiscUpdUpdatePreMem ( > ) { EFI_STATUS Status;- EFI_PEI_READ_ONLY_VA= RIABLE2_PPI > *VariableServices;- UINTN VariableSize;- VO= ID > *MemorySavedData;-- Status =3D PeiServicesLocatePpi (- > &gEfiPeiReadOnlyVariable2PpiGuid,- 0,- NULL,- = (VOID **) > &VariableServices- );- if (EFI_ERROR (Status)) {- ASSERT_= EFI_ERROR > (Status);- return Status;- }-- VariableSize =3D 0;- MemorySavedData= =3D NULL;- > Status =3D VariableServices->GetVariable (- = VariableServices,- > L"MemoryConfig",- &gFspNonVolatileStorageHo= bGuid,- > NULL,- &VariableSize,- = MemorySavedData- > );- if (Status =3D=3D EFI_BUFFER_TOO_SMALL) {- MemorySavedData =3D > AllocatePool (VariableSize);- if (MemorySavedData =3D=3D NULL) {- = ASSERT > (MemorySavedData !=3D NULL);- return EFI_OUT_OF_RESOURCES;- }-- > DEBUG ((DEBUG_INFO, "VariableSize is 0x%x\n", VariableSize));- Status = =3D > VariableServices->GetVariable (- Variable= Services,- > L"MemoryConfig",- &gFspNonVolatileStorage= HobGuid,- > NULL,- &VariableSize,- = MemorySavedData- > );- if (Status =3D=3D EFI_SUCCESS) {- FspmUpd->FspmArchUpd.NvsBuf= ferPtr > =3D MemorySavedData;- } else {- DEBUG ((DEBUG_ERROR, "Fail to ret= rieve > Variable:\"MemoryConfig\" gMemoryConfigVariableGuid, Status =3D %r\n", > Status));- ASSERT_EFI_ERROR (Status);- }+ UINTN > FspNvsBufferSize;+ VOID *FspNvsBufferPtr;++ > FspNvsBufferPtr =3D NULL;+ FspNvsBufferSize =3D 0;+ Status =3D > PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableGuid, > &FspNvsBufferPtr, &FspNvsBufferSize);+ if (Status =3D=3D EFI_SUCCESS) {+ > FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr;+ } else {+ > DEBUG ((DEBUG_INFO, "Cannot create FSP NVS Buffer, UEFI variable does > not exist (this is likely a first boot)\n"));+ FspmUpd- > >FspmArchUpd.NvsBufferPtr =3D NULL; }- FspmUpd- > >FspmArchUpd.NvsBufferPtr =3D MemorySavedData; return EFI_SUCCESS; > }diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > index 145deb5de3..381ef232ea 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y > +++ /PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c > @@ -2,7 +2,7 @@ > Implementation of Fsp Misc UPD Initialization. - Copyright (c) 2020,= Intel > Corporation. All rights reserved.
+ Copyright (c) 2020 - 2021, Intel > Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2- > Clause-Patent **/ @@ -18,11 +18,9 @@ > #include #include -#include > #include #include > #include -#include > #include > #include #include @@ -46,54 +44,17 @@ > PeiFspMiscUpdUpdatePreMem ( > ) { EFI_STATUS Status;- EFI_PEI_READ_ONLY_VA= RIABLE2_PPI > *VariableServices;- UINTN VariableSize;- VO= ID > *MemorySavedData;-- Status =3D PeiServicesLocatePpi (- > &gEfiPeiReadOnlyVariable2PpiGuid,- 0,- NULL,- = (VOID **) > &VariableServices- );- if (EFI_ERROR (Status)) {- ASSERT_= EFI_ERROR > (Status);- return Status;- }-- VariableSize =3D 0;- MemorySavedData= =3D NULL;- > Status =3D VariableServices->GetVariable (- = VariableServices,- > L"MemoryConfig",- &gFspNonVolatileStorageHo= bGuid,- > NULL,- &VariableSize,- = MemorySavedData- > );- if (Status =3D=3D EFI_BUFFER_TOO_SMALL) {- MemorySavedData =3D > AllocatePool (VariableSize);- if (MemorySavedData =3D=3D NULL) {- = ASSERT > (MemorySavedData !=3D NULL);- return EFI_OUT_OF_RESOURCES;- }-- > DEBUG ((DEBUG_INFO, "VariableSize is 0x%x\n", VariableSize));- Status = =3D > VariableServices->GetVariable (- Variable= Services,- > L"MemoryConfig",- &gFspNonVolatileStorage= HobGuid,- > NULL,- &VariableSize,- = MemorySavedData- > );- if (Status =3D=3D EFI_SUCCESS) {- FspmUpd->FspmArchUpd.NvsBuf= ferPtr > =3D MemorySavedData;- } else {- FspmUpd->FspmArchUpd.NvsBufferPtr= =3D > NULL;- DEBUG ((DEBUG_ERROR, "Fail to retrieve > Variable:\"MemoryConfig\" gMemoryConfigVariableGuid, Status =3D %r\n", > Status));- ASSERT_EFI_ERROR (Status);- }+ UINTN > FspNvsBufferSize;+ VOID *FspNvsBufferPtr;++ > FspNvsBufferPtr =3D NULL;+ FspNvsBufferSize =3D 0;+ Status =3D > PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableGuid, > &FspNvsBufferPtr, &FspNvsBufferSize);+ if (Status =3D=3D EFI_SUCCESS) {+ > FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr;+ } else {+ > DEBUG ((DEBUG_INFO, "Cannot create FSP NVS Buffer, UEFI variable does > not exist (this is likely a first boot)\n"));+ FspmUpd- > >FspmArchUpd.NvsBufferPtr =3D NULL; } FspmUpd->FspmConfig.TsegSize > =3D FixedPcdGet32 (PcdTsegSize);diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilicon > PolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilicon > PolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > index 2c90d0cb94..362dc2c995 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilicon > PolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSilic > +++ onPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > @@ -2,7 +2,7 @@ > # Provide FSP wrapper platform related function. # #-# Copyright (c) 2= 019 - > 2020 Intel Corporation. All rights reserved.
+# Copyright (c) 2019 - = 2021 > Intel Corporation. All rights reserved.
# # SPDX-License-Identifier:= BSD- > 2-Clause-Patent #@@ -82,7 +82,6 @@ > PchInfoLib PchHsioLib PchPcieRpLib- MemoryAllocationLib > DebugPrintErrorLevelLib SiPolicyLib PchGbeLib@@ -132,7 +131,7 @@ > gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdMrcSpdAddressTable3 > [Guids]- gFspNonVolatileStorageHobGuid ## CONSUMES+ > gFspNvsBufferVariableGuid ## CONSUMES gTianoLogoGui= d > ## CONSUMES gEfiMemoryOverwriteControlDataGuid diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > index 529c2f1253..1a664b1327 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Librar > y > +++ /PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf > @@ -2,7 +2,7 @@ > # FSP silicon policy updates for the Up Xtreme board. # #-# Copyright = (c) > 2020, Intel Corporation. All rights reserved.
+# Copyright (c) 2020 -= 2021, > Intel Corporation. All rights reserved.
# # SPDX-License-Identifier:= BSD- > 2-Clause-Patent #@@ -136,7 +136,7 @@ > gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdBoardBomId [Guids]- > gFspNonVolatileStorageHobGuid ## CONSUMES+ > gFspNvsBufferVariableGuid ## CONSUMES gTianoLogoGui= d > ## CONSUMES gEfiMemoryOverwriteControlDataGuid diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/Flash > MapInclude.fdf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/Flash > MapInclude.fdf > index f7aa730ae7..698efce248 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/Flash > MapInclude.fdf > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/Flash > M > +++ apInclude.fdf > @@ -2,7 +2,7 @@ > # Flash map for the UpXtreme Board. # #-# Copyright (c) 2020, Intel > Corporation. All rights reserved.
+# Copyright (c) 2020 - 2021, Intel > Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2= - > Clause-Patent #@@ -35,16 +35,16 @@ SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize =3D > 0x00090000 > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset =3D > 0x00190000 # Flash addr (0xFFAE0000) SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D > 0x00190000 # SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D > 0x00320000 # Flash addr (0xFFC70000)-SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D > 0x00170000 #-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset > =3D 0x00490000 # Flash addr (0xFFDE0000)+SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D > 0x00160000 #+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset > =3D 0x00480000 # Flash addr (0xFFDD0000) SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x000= 70000 > #-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D > 0x00500000 # Flash addr (0xFFE50000)+SET > gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x004= F0000 # > Flash addr (0xFFE40000) SET > gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x000= 50000 #- > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D > 0x00550000 # Flash addr (0xFFEA0000)+SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D > 0x00540000 # Flash addr (0xFFE90000) SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize =3D 0x000= EA000 > #-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D > 0x0063A000 # Flash addr (0xFFF8A000)+SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D > 0x0062A000 # Flash addr (0xFFF7A000) SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize =3D 0x000= 06000 > #-SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset =3D > 0x00640000 # Flash addr (0xFFF90000)+SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset =3D > 0x00630000 # Flash addr (0xFFF80000) SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize =3D > 0x00010000 #-SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset =3D > 0x00650000 # Flash addr (0xFFFA0000)-SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize =3D > 0x00060000 #+SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset =3D > 0x00640000 # Flash addr (0xFFF90000)+SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize =3D > 0x00070000 #diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > index ee2aedd978..9d08dc3fe4 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > @@ -142,6 +142,9 @@ > ####################################### > PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHo > okLib.inf +[LibraryClasses.Common.SEC]+ > VariableReadLib|MinPlatformPkg/Library/BaseVariableReadLibNull/BaseVari > ableReadLibNull.inf+ [LibraryClasses.IA32.SEC] > ####################################### # Platform Packagediff - > -git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > Pkg.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > Pkg.dsc > index b69cc8deb0..8d25b818ee 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > Pkg.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > Pk > +++ g.dsc > @@ -142,6 +142,9 @@ > ####################################### > PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHo > okLib.inf +[LibraryClasses.Common.SEC]+ > VariableReadLib|MinPlatformPkg/Library/BaseVariableReadLibNull/BaseVari > ableReadLibNull.inf+ [LibraryClasses.IA32.SEC] > ####################################### # Platform Package-- > 2.28.0.windows.1