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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3149 Clear length and alignment for low 32bit of MEM64 BAR if sizing fail in= high 32bit. Cc: Ray Ni Cc: Hao A Wu --_000_MWHPR11MB13098306089EF881734D283AFBD20MWHPR11MB1309namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

From 7518212a85269e486d06dcea927a3d34e23372c2 Mon Se= p 17 00:00:00 2001

From: Zarcd Zhong <zarcd.zhong@intel.com>=

Date: Mon, 4 Jan 2021 17:32:54 +0800

Subject: [PATCH] MdeModulePkg/Bus/Pci/PciBusDxe: Han= dle BAR sizing fail in high 32bit of MEM64.

 

    REF: https://bugzilla.tianocore.o= rg/show_bug.cgi?id=3D3149

 

    Clear length and alignment for lo= w 32bit of MEM64 BAR if sizing fail in high 32bit.

 

    Cc: Ray Ni <ray.ni@intel.com&g= t;

    Cc: Hao A Wu <hao.a.wu@intel.c= om>

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