From: "Liming Gao" <liming.gao@intel.com>
To: "Javeed, Ashraf" <ashraf.javeed@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [PATCH V4 0/2] CXL Specification Registers
Date: Mon, 27 Jul 2020 03:43:01 +0000 [thread overview]
Message-ID: <MWHPR11MB16305C572B214D762C1A497C80720@MWHPR11MB1630.namprd11.prod.outlook.com> (raw)
In-Reply-To: <MWHPR11MB1630868E021E114CA0563C3480720@MWHPR11MB1630.namprd11.prod.outlook.com>
https://github.com/tianocore/edk2/pull/828 for this change, be merged.
-----Original Message-----
From: Gao, Liming
Sent: 2020年7月27日 10:36
To: Javeed, Ashraf <ashraf.javeed@intel.com>; devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@intel.com>
Subject: RE: [PATCH V4 0/2] CXL Specification Registers
This version is good to me. Reviewed-by: Liming Gao <liming.gao@intel.com>
-----Original Message-----
From: Javeed, Ashraf <ashraf.javeed@intel.com>
Sent: 2020年7月25日 2:26
To: devel@edk2.groups.io
Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming <liming.gao@intel.com>
Subject: [PATCH V4 0/2] CXL Specification Registers
These 2 patches introduces the Compute Express Link (CXL) Specificition defined registers.
The Cxl11.h has the actual register definitions of the CXL Specification Revision 1.1; and the Cxl.h is the main header file to include all versions of the CXL register definitions.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2611
Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
--
Ashraf Javeed (2):
MdePkg/Include/IndustryStandard: CXL 1.1 Registers
MdePkg/Include/IndustryStandard: Main CXL header
MdePkg/Include/IndustryStandard/Cxl.h | 22 ++++++++++++++++++++++
MdePkg/Include/IndustryStandard/Cxl11.h | 569 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
MdePkg/Include/IndustryStandard/Pci.h | 6 ++----
3 files changed, 593 insertions(+), 4 deletions(-) create mode 100644 MdePkg/Include/IndustryStandard/Cxl.h
create mode 100644 MdePkg/Include/IndustryStandard/Cxl11.h
--
2.21.0.windows.1
prev parent reply other threads:[~2020-07-27 3:43 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-24 18:26 [PATCH V4 0/2] CXL Specification Registers Javeed, Ashraf
2020-07-24 18:26 ` [PATCH V4 1/2] MdePkg/Include/IndustryStandard: CXL 1.1 Registers Javeed, Ashraf
2020-07-27 14:24 ` [edk2-devel] [PATCH V4 1/2] MdePkg/Include/IndustryStandard: " Leif Lindholm
2020-07-27 14:55 ` Liming Gao
2020-07-27 16:14 ` Leif Lindholm
2020-07-28 2:07 ` Liming Gao
2020-07-28 2:22 ` Michael D Kinney
2020-07-28 2:36 ` Ni, Ray
2020-07-28 6:18 ` Javeed, Ashraf
2020-07-28 6:46 ` Javeed, Ashraf
2020-07-24 18:26 ` [PATCH V4 2/2] MdePkg/Include/IndustryStandard: Main CXL header Javeed, Ashraf
2020-07-27 2:35 ` [PATCH V4 0/2] CXL Specification Registers Liming Gao
2020-07-27 3:43 ` Liming Gao [this message]
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