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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Jiewen, You are right!:) * In the Pentium 4, Intel Xeon, and P6 family processors, when a processor = that is designated as an * application processor during an MP initialization sequence is waiting for= a startup IPI (SIPI), it is in * a mode where SMIs are masked. However if a SMI is received while an appli= cation processor is in * the wait for SIPI mode, the SMI will be pended. The processor then respon= ds on receipt of a SIPI by * immediately servicing the pended SMI and going into SMM before handling t= he SIPI. > -----Original Message----- > From: Yao, Jiewen > Sent: Thursday, June 9, 2022 4:53 PM > To: Ni, Ray ; devel@edk2.groups.io > Cc: Kinney, Michael D ; Tom Lendacky > Subject: RE: Why need to put AP in HLT/MWAIT in ExitBootServices callback >=20 > I remember a wait-for-SIPI CPU cannot response to SMI. >=20 > We do want to let AP response SMI to perform some action, because some SM= M code will rely on all APs in SMM. >=20 > Thank you > Yao Jiewen >=20 >=20 > > -----Original Message----- > > From: Ni, Ray > > Sent: Thursday, June 9, 2022 4:46 PM > > To: devel@edk2.groups.io > > Cc: Ni, Ray ; Kinney, Michael D > > ; Tom Lendacky ; > > Yao, Jiewen > > Subject: Why need to put AP in HLT/MWAIT in ExitBootServices callback > > > > All, > > When I am reviewing today's MpInitLib code, I don't understand why belo= w > > complex logic is there to put AP in HLT or MWAIT on a ExitBootServices = event > > callback. > > https://github.com/tianocore/edk2/blob/ff36b2550f94dc5fac838cf298ae5a23= c > > fddf204/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c#L423 > > https://github.com/tianocore/edk2/blob/ff36b2550f94dc5fac838cf298ae5a23= c > > fddf204/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm#L424 > > > > The above code is to put AP in a state that when it's woken up by inter= rupts or > > SMIs, it's executing code and using stack in reserved memory. > > (not in BootServices memory which might be overwritten by OS.) > > > > But according to the SDM content below, we can simply send a INIT IPI t= o all APs > > to let AP enter a wait-for-SIPI state. > > Then a simple SendInitIpiAllExcludingSelf() from BSP can replace all th= e > > complicated code above. > > > > * The MP protocol will be executed only after a power-up or RESET. If t= he MP > > protocol has been completed and a > > * BSP has been chosen, subsequent INITs (either to a specific processor= or > > system wide) do not cause the MP > > * protocol to be repeated. Instead, each processor examines its BSP fla= g (in the > > APIC_BASE MSR) to determine > > * whether it should execute the BIOS boot-strap code (if it is the BSP)= or enter a > > wait-for-SIPI state (if it is an > > * AP). > > > > Did I miss something here? > > > > Thanks, > > Ray