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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: Tan, Dun > Sent: Friday, October 14, 2022 5:19 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Kumar, = Rahul R > Subject: [Patch V3 1/4] UefiCpuPkg: Add Unit tests for DxeCpuExceptionHan= dlerLib >=20 > Add target based unit tests for the DxeCpuExceptionHandlerLib. > A DXE driver is created to test DxeCpuExceptionHandlerLib. >=20 > Four test cases are created in this Unit Test module: > a.Test if exception handler can be registered/unregistered > for no error code exception.In the test case, only no error > code exception is triggered and tested by INTn instruction. >=20 > b.Test if exception handler can be registered/unregistered > for GP and PF. In the test case, GP exception is triggered > and tested by setting CR4_RESERVED_BIT to 1. PF exception > is triggered by writting to not-present or RO address. >=20 > c.Test if CpuContext is consistent before and after exception. > In this test case: > 1.Set Cpu register to mExpectedContextInHandler before > exception. 2.Trigger exception specified by ExceptionType. > 3.Store SystemContext in mActualContextInHandler and set > SystemContext to mExpectedContextAfterException in handler. > 4.After return from exception, store Cpu registers in > mActualContextAfterException. > The expectation is: > 1.Register values in mActualContextInHandler are the same > with register values in mExpectedContextInHandler. > 2.Register values in mActualContextAfterException are the > same with register values mActualContextAfterException. >=20 > d.Test if stack overflow can be captured by CpuStackGuard > in both Bsp and AP. In this test case, stack overflow is > triggered by a funtion which calls itself continuously. > This test case triggers stack overflow in both BSP and AP. > All AP use same Idt with Bsp. The expectation is: > 1. PF exception is triggered (leading to a DF if sepereated > stack is not prepared for PF) when Rsp<=3DStackBase+SIZE_4KB > since [StackBase, StackBase + SIZE_4KB] is marked as not > present in page table when PcdCpuStackGuard is TRUE. > 2. Stack for PF/DF exception handler in both Bsp and AP is > succussfully switched by InitializeSeparateExceptionStacks. >=20 > Signed-off-by: Dun Tan > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > --- > UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h = | 336 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTestCommon.c = | 852 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++ > UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerLibUnitTest= .inf | 58 > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerUnitTest.c = | 196 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > ++++++++++ > UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTest.c = | 166 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTestAsm.n= asm | 256 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++ > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > 6 files changed, 1864 insertions(+) >=20 > diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTe= st.h > b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h > new file mode 100644 > index 0000000000..936098fde8 > --- /dev/null > +++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h > @@ -0,0 +1,336 @@ > +/** @file > + > + Copyright (c) 2022, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + Four test cases are created in this Unit Test module. > + a.Test if exception handler can be registered/unregistered for no erro= r code exception > + In this test case, only no error code exception is triggered and tes= ted by INTn instruction. > + The special hanlder for these exception will modify a global variabl= e for check. > + > + b.Test if exception handler can be registered/unregistered for GP and = PF. > + In this test case, GP exception is triggered and tested by setting C= R4_RESERVED_BIT to 1. > + PF exception is triggered and tested by writting to not-present or R= O addres. > + The special hanlder for these exceptions will set a global vartiable= for check and adjust Rip to return from fault exception. > + > + c.Test if Cpu Context is consistent before and after exception. > + In this test case: > + 1. Set Cpu register to mExpectedContextInHandler before exception. > + 2. Trigger exception specified by ExceptionType. > + 3. Store SystemContext in mActualContextInHandler and set SystemCo= ntext to mExpectedContextAfterException in > handler. > + 4. After return from exception, store Cpu registers in mActualCont= extAfterException. > + The expectation is: > + 1. Register values in mActualContextInHandler are the same with re= gister values in mExpectedContextInHandler. > + 2. Register values in mActualContextAfterException are the same wi= th register values mActualContextAfterException. > + > + d.Test if stack overflow can be captured by CpuStackGuard in both Bsp = and AP. > + In this test case, stack overflow is triggered by a funtion which ca= lls itself continuously. This test case triggers stack > + overflow in both BSP and AP. All AP use same Idt with Bsp. The expec= tation is: > + 1. PF exception is triggered (leading to a DF if sepereated stack = is not prepared for PF) when Rsp <=3D StackBase + > SIZE_4KB > + since [StackBase, StackBase + SIZE_4KB] is marked as not presen= t in page table when PcdCpuStackGuard is TRUE. > + 2. Stack for PF/DF exception handler in both Bsp and AP is succuss= fully switched by InitializeSeparateExceptionStacks. > + > +**/ > + > +#ifndef CPU_EXCEPTION_HANDLER_TEST_H_ > +#define CPU_EXCEPTION_HANDLER_TEST_H_ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define UNIT_TEST_APP_NAME "Cpu Exception Handler Lib Unit Tests" > +#define UNIT_TEST_APP_VERSION "1.0" > + > +#define CPU_INTERRUPT_NUM 256 > +#define SPEC_MAX_EXCEPTION_NUM 22 > +#define CR4_RESERVED_BIT BIT15 > + > +typedef struct { > + IA32_DESCRIPTOR OriginalGdtr; > + IA32_DESCRIPTOR OriginalIdtr; > + UINT16 Tr; > +} CPU_REGISTER_BUFFER; > + > +typedef union { > + EDKII_PEI_MP_SERVICES2_PPI *Ppi; > + EFI_MP_SERVICES_PROTOCOL *Protocol; > +} MP_SERVICES; > + > +typedef struct { > + VOID *Buffer; > + UINTN BufferSize; > + EFI_STATUS Status; > +} EXCEPTION_STACK_SWITCH_CONTEXT; > + > +typedef struct { > + UINT64 Rdi; > + UINT64 Rsi; > + UINT64 Rbx; > + UINT64 Rdx; > + UINT64 Rcx; > + UINT64 Rax; > + UINT64 R8; > + UINT64 R9; > + UINT64 R10; > + UINT64 R11; > + UINT64 R12; > + UINT64 R13; > + UINT64 R14; > + UINT64 R15; > +} GENERAL_REGISTER; > + > +extern UINTN mFaultInstructionLength; > +extern EFI_EXCEPTION_TYPE mExceptionType; > +extern UINTN mRspAddress[]; > + > +/** > + Initialize Bsp Idt with a new Idt table and return the IA32_DESCRIPTOR= buffer. > + In PEIM, store original PeiServicePointer before new Idt table. > + > + @return Pointer to the allocated IA32_DESCRIPTOR buffer. > +**/ > +VOID * > +InitializeBspIdt ( > + VOID > + ); > + > +/** > + Trigger no error code exception by INT n instruction. > + > + @param[in] ExceptionType No error code exception type. > +**/ > +VOID > +EFIAPI > +TriggerINTnException ( > + IN EFI_EXCEPTION_TYPE ExceptionType > + ); > + > +/** > + Trigger GP exception by setting CR4_RESERVED_BIT to 1. > + > + @param[in] Cr4ReservedBit Cr4 reserved bit. > +**/ > +VOID > +EFIAPI > +TriggerGPException ( > + UINTN Cr4ReservedBit > + ); > + > +/** > + Trigger PF exception by write to not present or ReadOnly address. > + > + @param[in] PFAddress Not present or ReadOnly address in page table. > +**/ > +VOID > +EFIAPI > +TriggerPFException ( > + UINTN PFAddress > + ); > + > +/** > + Special handler for fault exception. > + This handler sets Rip/Eip in SystemContext to the instruction address = after the exception instruction. > + > + @param ExceptionType Exception type. > + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. > +**/ > +VOID > +EFIAPI > +AdjustRipForFaultHandler ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN EFI_SYSTEM_CONTEXT SystemContext > + ); > + > +/** > + Test consistency of Cpu context. Four steps: > + 1. Set Cpu register to mExpectedContextInHandler before exception. > + 2. Trigger exception specified by ExceptionType. > + 3. Store SystemContext in mActualContextInHandler and set SystemContex= t to mExpectedContextAfterException in > handler. > + 4. After return from exception, store Cpu registers in mActualContextA= fterException. > + > + Rcx/Ecx in mExpectedContextInHandler is decided by different exception= type runtime since Rcx/Ecx is needed in > assembly code. > + For GP and PF, Rcx/Ecx is set to FaultParameter. For other exception t= riggered by INTn, Rcx/Ecx is set to ExceptionType. > + > + @param[in] ExceptionType Exception type. > + @param[in] FaultParameter Parameter for GP and PF. OPTIONAL > +**/ > +VOID > +EFIAPI > +AsmTestConsistencyOfCpuContext ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN UINTN FaultParameter OPTIONAL > + ); > + > +/** > + Special handler for ConsistencyOfCpuContext test case. General registe= r in SystemContext > + is modified to mExpectedContextInHandler in this handler. > + > + @param ExceptionType Exception type. > + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. > +**/ > +VOID > +EFIAPI > +AdjustCpuContextHandler ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN EFI_SYSTEM_CONTEXT SystemContext > + ); > + > +/** > + Compare cpu context in ConsistencyOfCpuContext test case. > + 1.Compare mActualContextInHandler with mExpectedContextInHandler. > + 2.Compare mActualContextAfterException with mActualContextAfterExcepti= on. > + > + @retval UNIT_TEST_PASSED The Unit test has completed and = it was successful. > + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed= . > +**/ > +UNIT_TEST_STATUS > +CompareCpuContext ( > + VOID > + ); > + > +/** > + Get EFI_MP_SERVICES_PROTOCOL/EDKII_PEI_MP_SERVICES2_PPI pointer. > + > + @param[out] MpServices Pointer to the MP_SERVICES buffer > + > + @retval EFI_SUCCESS EFI_MP_SERVICES_PROTOCOL/PPI interface is re= turned > + @retval EFI_NOT_FOUND EFI_MP_SERVICES_PROTOCOL/PPI interface is no= t found > +**/ > +EFI_STATUS > +GetMpServices ( > + OUT MP_SERVICES *MpServices > + ); > + > +/** > + Create CpuExceptionLibUnitTestSuite and add test case. > + > + @param[in] FrameworkHandle Unit test framework. > + > + @return EFI_SUCCESS The unit test suite was created. > + @retval EFI_OUT_OF_RESOURCES There are not enough resources availabl= e to > + initialize the unit test suite. > +**/ > +EFI_STATUS > +AddCommonTestCase ( > + IN UNIT_TEST_FRAMEWORK_HANDLE Framework > + ); > + > +/** > + Execute a caller provided function on all enabled APs. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[in] Procedure Pointer to the function to be run on enabled= APs of the system. > + @param[in] SingleThread If TRUE, then all the enabled APs execute th= e function specified by Procedure > + one by one, in ascending order of processor = handle number. > + If FALSE, then all the enabled APs execute t= he function specified by Procedure > + simultaneously. > + @param[in] TimeoutInMicroseconds Indicates the time limit in microsec= onds for APs to return from Procedure, > + for blocking mode only. Zero means i= nfinity. > + @param[in] ProcedureArgument The parameter passed into Procedure = for all APs. > + > + @retval EFI_SUCCESS Execute a caller provided function on all en= abled APs successfully > + @retval Others Execute a caller provided function on all en= abled APs unsuccessfully > +**/ > +EFI_STATUS > +MpServicesUnitTestStartupAllAPs ( > + IN MP_SERVICES MpServices, > + IN EFI_AP_PROCEDURE Procedure, > + IN BOOLEAN SingleThread, > + IN UINTN TimeoutInMicroSeconds, > + IN VOID *ProcedureArgument > + ); > + > +/** > + Caller gets one enabled AP to execute a caller-provided function. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[in] Procedure Pointer to the function to be run on enabled= APs of the system. > + @param[in] ProcessorNumber The handle number of the AP. > + @param[in] TimeoutInMicroseconds Indicates the time limit in microsec= onds for APs to return from Procedure, > + for blocking mode only. Zero means i= nfinity. > + @param[in] ProcedureArgument The parameter passed into Procedure = for all APs. > + > + > + @retval EFI_SUCCESS Caller gets one enabled AP to execute a call= er-provided function successfully > + @retval Others Caller gets one enabled AP to execute a call= er-provided function unsuccessfully > +**/ > +EFI_STATUS > +MpServicesUnitTestStartupThisAP ( > + IN MP_SERVICES MpServices, > + IN EFI_AP_PROCEDURE Procedure, > + IN UINTN ProcessorNumber, > + IN UINTN TimeoutInMicroSeconds, > + IN VOID *ProcedureArgument > + ); > + > +/** > + Get the handle number for the calling processor. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[out] ProcessorNumber The handle number for the calling processo= r. > + > + @retval EFI_SUCCESS Get the handle number for the calling proces= sor successfully. > + @retval Others Get the handle number for the calling proces= sor unsuccessfully. > +**/ > +EFI_STATUS > +MpServicesUnitTestWhoAmI ( > + IN MP_SERVICES MpServices, > + OUT UINTN *ProcessorNumber > + ); > + > +/** > + Retrieve the number of logical processor in the platform and the numbe= r of those logical processors that > + are enabled on this boot. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[out] NumberOfProcessors Pointer to the total number of logical= processors in the system, including > + the BSP and disabled APs. > + @param[out] NumberOfEnabledProcessors Pointer to the number of process= ors in the system that are enabled. > + > + @retval EFI_SUCCESS Retrieve the number of logical processor suc= cessfully > + @retval Others Retrieve the number of logical processor uns= uccessfully > +**/ > +EFI_STATUS > +MpServicesUnitTestGetNumberOfProcessors ( > + IN MP_SERVICES MpServices, > + OUT UINTN *NumberOfProcessors, > + OUT UINTN *NumberOfEnabledProcessors > + ); > + > +/** > + Trigger stack overflow by calling itself continuously. > +**/ > +VOID > +EFIAPI > +TriggerStackOverflow ( > + VOID > + ); > + > +/** > + Special handler for CpuStackGuard test case. > + > + @param ExceptionType Exception type. > + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. > +**/ > +VOID > +EFIAPI > +CpuStackGuardExceptionHandler ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN EFI_SYSTEM_CONTEXT SystemContext > + ); > + > +#endif > diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTe= stCommon.c > b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTestCommon.c > new file mode 100644 > index 0000000000..17afb592d3 > --- /dev/null > +++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTestCommo= n.c > @@ -0,0 +1,852 @@ > +/** @file > + Unit tests of the CpuExceptionHandlerLib. > + > + Copyright (c) 2022, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include "CpuExceptionHandlerTest.h" > + > +// > +// Length of the assembly falut instruction. > +// > +UINTN mFaultInstructionLength =3D 0; > +EFI_EXCEPTION_TYPE mExceptionType =3D 256; > +UINTN mNumberOfProcessors =3D 1; > +UINTN mRspAddress[2] =3D { 0 }; > + > +// > +// Error code flag indicating whether or not an error code will be > +// pushed on the stack if an exception occurs. > +// > +// 1 means an error code will be pushed, otherwise 0 > +// > +CONST UINT32 mErrorCodeExceptionFlag =3D 0x20227d00; > + > +/** > + Special handler for exception triggered by INTn instruction. > + This hanlder only modifies a global variable for check. > + > + @param ExceptionType Exception type. > + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. > +**/ > +VOID > +EFIAPI > +INTnExceptionHandler ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN EFI_SYSTEM_CONTEXT SystemContext > + ) > +{ > + mExceptionType =3D ExceptionType; > +} > + > +/** > + Restore cpu original registers before exit test case. > + > + @param[in] Buffer Argument of the procedure. > +**/ > +VOID > +EFIAPI > +RestoreRegistersPerCpu ( > + IN VOID *Buffer > + ) > +{ > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer; > + UINT16 Tr; > + IA32_TSS_DESCRIPTOR *Tss; > + > + CpuOriginalRegisterBuffer =3D (CPU_REGISTER_BUFFER *)Buffer; > + > + AsmWriteGdtr (&(CpuOriginalRegisterBuffer->OriginalGdtr)); > + AsmWriteIdtr (&(CpuOriginalRegisterBuffer->OriginalIdtr)); > + Tr =3D CpuOriginalRegisterBuffer->Tr; > + if ((Tr !=3D 0) && (Tr < CpuOriginalRegisterBuffer->OriginalGdtr.Limit= )) { > + Tss =3D (IA32_TSS_DESCRIPTOR *)(CpuOriginalRegisterBuffer->OriginalG= dtr.Base + Tr); > + if (Tss->Bits.P =3D=3D 1) { > + // > + // Clear busy bit of TSS before write Tr > + // > + Tss->Bits.Type &=3D 0xD; > + AsmWriteTr (Tr); > + } > + } > +} > + > +/** > + Restore cpu original registers before exit test case. > + > + @param[in] MpServices MpServices. > + @param[in] CpuOriginalRegisterBuffer Address of CpuOriginalRegisterBu= ffer. > + @param[in] BspProcessorNum Bsp processor number. > +**/ > +VOID > +RestoreAllCpuRegisters ( > + MP_SERVICES *MpServices, OPTIONAL > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer, > + UINTN BspProcessorNum > + ) > +{ > + UINTN Index; > + EFI_STATUS Status; > + > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + if (Index =3D=3D BspProcessorNum) { > + RestoreRegistersPerCpu ((VOID *)&CpuOriginalRegisterBuffer[Index])= ; > + continue; > + } > + > + ASSERT (MpServices !=3D NULL); > + Status =3D MpServicesUnitTestStartupThisAP ( > + *MpServices, > + (EFI_AP_PROCEDURE)RestoreRegistersPerCpu, > + Index, > + 0, > + (VOID *)&CpuOriginalRegisterBuffer[Index] > + ); > + ASSERT_EFI_ERROR (Status); > + } > +} > + > +/** > + Store cpu registers before the test case starts. > + > + @param[in] Buffer Argument of the procedure. > +**/ > +VOID > +EFIAPI > +SaveRegisterPerCpu ( > + IN VOID *Buffer > + ) > +{ > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer; > + IA32_DESCRIPTOR Gdtr; > + IA32_DESCRIPTOR Idtr; > + > + CpuOriginalRegisterBuffer =3D (CPU_REGISTER_BUFFER *)Buffer; > + > + AsmReadGdtr (&Gdtr); > + AsmReadIdtr (&Idtr); > + CpuOriginalRegisterBuffer->OriginalGdtr.Base =3D Gdtr.Base; > + CpuOriginalRegisterBuffer->OriginalGdtr.Limit =3D Gdtr.Limit; > + CpuOriginalRegisterBuffer->OriginalIdtr.Base =3D Idtr.Base; > + CpuOriginalRegisterBuffer->OriginalIdtr.Limit =3D Idtr.Limit; > + CpuOriginalRegisterBuffer->Tr =3D AsmReadTr (); > +} > + > +/** > + Store cpu registers before the test case starts. > + > + @param[in] MpServices MpServices. > + @param[in] BspProcessorNum Bsp processor number. > + > + @return Pointer to the allocated CPU_REGISTER_BUFFER. > +**/ > +CPU_REGISTER_BUFFER * > +SaveAllCpuRegisters ( > + MP_SERVICES *MpServices, OPTIONAL > + UINTN BspProcessorNum > + ) > +{ > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer; > + EFI_STATUS Status; > + UINTN Index; > + > + CpuOriginalRegisterBuffer =3D AllocateZeroPool (mNumberOfProcessors * = sizeof (CPU_REGISTER_BUFFER)); > + ASSERT (CpuOriginalRegisterBuffer !=3D NULL); > + > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + if (Index =3D=3D BspProcessorNum) { > + SaveRegisterPerCpu ((VOID *)&CpuOriginalRegisterBuffer[Index]); > + continue; > + } > + > + ASSERT (MpServices !=3D NULL); > + Status =3D MpServicesUnitTestStartupThisAP ( > + *MpServices, > + (EFI_AP_PROCEDURE)SaveRegisterPerCpu, > + Index, > + 0, > + (VOID *)&CpuOriginalRegisterBuffer[Index] > + ); > + ASSERT_EFI_ERROR (Status); > + } > + > + return CpuOriginalRegisterBuffer; > +} > + > +/** > + Initialize Ap Idt Procedure. > + > + @param[in] Buffer Argument of the procedure. > +**/ > +VOID > +EFIAPI > +InitializeIdtPerAp ( > + IN VOID *Buffer > + ) > +{ > + AsmWriteIdtr (Buffer); > +} > + > +/** > + Initialize all Ap Idt. > + > + @param[in] MpServices MpServices. > + @param[in] BspIdtr Pointer to IA32_DESCRIPTOR allocated by Bsp. > +**/ > +VOID > +InitializeApIdt ( > + MP_SERVICES MpServices, > + VOID *BspIdtr > + ) > +{ > + EFI_STATUS Status; > + > + Status =3D MpServicesUnitTestStartupAllAPs ( > + MpServices, > + (EFI_AP_PROCEDURE)InitializeIdtPerAp, > + FALSE, > + 0, > + BspIdtr > + ); > + ASSERT_EFI_ERROR (Status); > +} > + > +/** > + Check if exception handler can registered/unregistered for no error co= de exception. > + > + @param[in] Context [Optional] An optional parameter that enables: > + 1) test-case reuse with varied parameters and > + 2) test-case re-entry for Target tests that nee= d a > + reboot. This parameter is a VOID* and it is th= e > + responsibility of the test author to ensure tha= t the > + contents are well understood by all test cases = that may > + consume it. > + > + @retval UNIT_TEST_PASSED The Unit test has completed and = the test > + case was successful. > + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed= . > +**/ > +UNIT_TEST_STATUS > +EFIAPI > +TestRegisterHandlerForNoErrorCodeException ( > + IN UNIT_TEST_CONTEXT Context > + ) > +{ > + EFI_STATUS Status; > + UINTN Index; > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer; > + VOID *NewIdtr; > + > + CpuOriginalRegisterBuffer =3D SaveAllCpuRegisters (NULL, 0); > + NewIdtr =3D InitializeBspIdt (); > + Status =3D InitializeCpuExceptionHandlers (NULL); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + for (Index =3D 0; Index < SPEC_MAX_EXCEPTION_NUM; Index++) { > + // > + // Only test no error code exception by INT n instruction. > + // > + if ((mErrorCodeExceptionFlag & (1 << Index)) !=3D 0) { > + continue; > + } > + > + DEBUG ((DEBUG_INFO, "TestCase1: ExceptionType is %d\n", Index)); > + Status =3D RegisterCpuInterruptHandler (Index, INTnExceptionHandler)= ; > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + TriggerINTnException (Index); > + UT_ASSERT_EQUAL (mExceptionType, Index); > + Status =3D RegisterCpuInterruptHandler (Index, NULL); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + } > + > + RestoreAllCpuRegisters (NULL, CpuOriginalRegisterBuffer, 0); > + FreePool (CpuOriginalRegisterBuffer); > + FreePool (NewIdtr); > + return UNIT_TEST_PASSED; > +} > + > +/** > + Get Bsp stack base. > + > + @param[out] StackBase Pointer to stack base of BSP. > +**/ > +VOID > +GetBspStackBase ( > + OUT UINTN *StackBase > + ) > +{ > + EFI_PEI_HOB_POINTERS Hob; > + EFI_HOB_MEMORY_ALLOCATION *MemoryHob; > + > + // > + // Get the base of stack from Hob. > + // > + ASSERT (StackBase !=3D NULL); > + Hob.Raw =3D GetHobList (); > + while ((Hob.Raw =3D GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, Hob.Ra= w)) !=3D NULL) { > + MemoryHob =3D Hob.MemoryAllocation; > + if (CompareGuid (&gEfiHobMemoryAllocStackGuid, &MemoryHob->AllocDesc= riptor.Name)) { > + DEBUG (( > + DEBUG_INFO, > + "%a: Bsp StackBase =3D 0x%016lx StackSize =3D 0x%016lx\n", > + __FUNCTION__, > + MemoryHob->AllocDescriptor.MemoryBaseAddress, > + MemoryHob->AllocDescriptor.MemoryLength > + )); > + > + *StackBase =3D (UINTN)MemoryHob->AllocDescriptor.MemoryBaseAddress= ; > + // > + // Ensure the base of the stack is page-size aligned. > + // > + ASSERT ((*StackBase & EFI_PAGE_MASK) =3D=3D 0); > + break; > + } > + > + Hob.Raw =3D GET_NEXT_HOB (Hob); > + } > + > + ASSERT (*StackBase !=3D 0); > +} > + > +/** > + Get Ap stack base procedure. > + > + @param[out] ApStackBase Pointer to Ap stack base. > +**/ > +VOID > +EFIAPI > +GetStackBasePerAp ( > + OUT VOID *ApStackBase > + ) > +{ > + UINTN ApTopOfStack; > + > + ApTopOfStack =3D ALIGN_VALUE ((UINTN)&ApTopOfStack, (UINTN)Pc= dGet32 (PcdCpuApStackSize)); > + *(UINTN *)ApStackBase =3D ApTopOfStack - (UINTN)PcdGet32 (PcdCpuApStac= kSize); > +} > + > +/** > + Get all Cpu stack base. > + > + @param[in] MpServices MpServices. > + @param[in] BspProcessorNum Bsp processor number. > + > + @return Pointer to the allocated CpuStackBaseBuffer. > +**/ > +UINTN * > +GetAllCpuStackBase ( > + MP_SERVICES *MpServices, > + UINTN BspProcessorNum > + ) > +{ > + UINTN *CpuStackBaseBuffer; > + EFI_STATUS Status; > + UINTN Index; > + > + CpuStackBaseBuffer =3D AllocateZeroPool (mNumberOfProcessors * sizeof = (UINTN)); > + ASSERT (CpuStackBaseBuffer !=3D NULL); > + > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + if (Index =3D=3D BspProcessorNum) { > + GetBspStackBase (&CpuStackBaseBuffer[Index]); > + continue; > + } > + > + ASSERT (MpServices !=3D NULL); > + Status =3D MpServicesUnitTestStartupThisAP ( > + *MpServices, > + (EFI_AP_PROCEDURE)GetStackBasePerAp, > + Index, > + 0, > + (VOID *)&CpuStackBaseBuffer[Index] > + ); > + ASSERT_EFI_ERROR (Status); > + DEBUG ((DEBUG_INFO, "AP[%d] StackBase =3D 0x%x\n", Index, CpuStackBa= seBuffer[Index])); > + } > + > + return CpuStackBaseBuffer; > +} > + > +/** > + Find not present or ReadOnly address in page table. > + > + @param[out] PFAddress Access to the address which is not permitted wi= ll trigger PF exceptions. > + > + @retval TRUE Found not present or ReadOnly address in page table. > + @retval FALSE Failed to found PFAddress in page table. > +**/ > +BOOLEAN > +FindPFAddressInPageTable ( > + OUT UINTN *PFAddress > + ) > +{ > + IA32_CR0 Cr0; > + IA32_CR4 Cr4; > + UINTN PageTable; > + PAGING_MODE PagingMode; > + BOOLEAN Enable5LevelPaging; > + RETURN_STATUS Status; > + IA32_MAP_ENTRY *Map; > + UINTN MapCount; > + UINTN Index; > + UINTN PreviousAddress; > + > + ASSERT (PFAddress !=3D NULL); > + > + Cr0.UintN =3D AsmReadCr0 (); > + if (Cr0.Bits.PG =3D=3D 0) { > + return FALSE; > + } > + > + PageTable =3D AsmReadCr3 (); > + Cr4.UintN =3D AsmReadCr4 (); > + if (sizeof (UINTN) =3D=3D sizeof (UINT32)) { > + ASSERT (Cr4.Bits.PAE =3D=3D 1); > + PagingMode =3D PagingPae; > + } else { > + Enable5LevelPaging =3D (BOOLEAN)(Cr4.Bits.LA57 =3D=3D 1); > + PagingMode =3D Enable5LevelPaging ? Paging5Level : Paging4Le= vel; > + } > + > + MapCount =3D 0; > + Status =3D PageTableParse (PageTable, PagingMode, NULL, &MapCount); > + ASSERT (Status =3D=3D RETURN_BUFFER_TOO_SMALL); > + Map =3D AllocatePages (EFI_SIZE_TO_PAGES (MapCount * sizeof (IA32_M= AP_ENTRY))); > + Status =3D PageTableParse (PageTable, PagingMode, Map, &MapCount); > + ASSERT (Status =3D=3D RETURN_SUCCESS); > + > + PreviousAddress =3D 0; > + for (Index =3D 0; Index < MapCount; Index++) { > + DEBUG (( > + DEBUG_ERROR, > + "%02d: %016lx - %016lx, %016lx\n", > + Index, > + Map[Index].LinearAddress, > + Map[Index].LinearAddress + Map[Index].Length, > + Map[Index].Attribute.Uint64 > + )); > + > + // > + // Not present address in page table. > + // > + if (Map[Index].LinearAddress > PreviousAddress) { > + *PFAddress =3D PreviousAddress; > + return TRUE; > + } > + > + PreviousAddress =3D (UINTN)(Map[Index].LinearAddress + Map[Index].Le= ngth); > + > + // > + // ReadOnly address in page table. > + // > + if ((Cr0.Bits.WP !=3D 0) && (Map[Index].Attribute.Bits.ReadWrite =3D= =3D 0)) { > + *PFAddress =3D (UINTN)Map[Index].LinearAddress; > + return TRUE; > + } > + } > + > + return FALSE; > +} > + > +/** > + Test if exception handler can registered/unregistered for GP and PF. > + > + @param[in] Context [Optional] An optional parameter that enables: > + 1) test-case reuse with varied parameters and > + 2) test-case re-entry for Target tests that nee= d a > + reboot. This parameter is a VOID* and it is th= e > + responsibility of the test author to ensure tha= t the > + contents are well understood by all test cases = that may > + consume it. > + > + @retval UNIT_TEST_PASSED The Unit test has completed and = the test > + case was successful. > + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed= . > +**/ > +UNIT_TEST_STATUS > +EFIAPI > +TestRegisterHandlerForGPAndPF ( > + IN UNIT_TEST_CONTEXT Context > + ) > +{ > + EFI_STATUS Status; > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer; > + UINTN PFAddress; > + VOID *NewIdtr; > + > + PFAddress =3D 0; > + CpuOriginalRegisterBuffer =3D SaveAllCpuRegisters (NULL, 0); > + NewIdtr =3D InitializeBspIdt (); > + Status =3D InitializeCpuExceptionHandlers (NULL); > + > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + // > + // GP exception. > + // > + DEBUG ((DEBUG_INFO, "TestCase2: ExceptionType is %d\n", EXCEPT_IA32_GP= _FAULT)); > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_GP_FAULT, AdjustRi= pForFaultHandler); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + TriggerGPException (CR4_RESERVED_BIT); > + UT_ASSERT_EQUAL (mExceptionType, EXCEPT_IA32_GP_FAULT); > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_GP_FAULT, NULL); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + // > + // PF exception. > + // > + if (FindPFAddressInPageTable (&PFAddress)) { > + DEBUG ((DEBUG_INFO, "TestCase2: ExceptionType is %d\n", EXCEPT_IA32_= PAGE_FAULT)); > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_PAGE_FAULT, Adju= stRipForFaultHandler); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + TriggerPFException (PFAddress); > + > + UT_ASSERT_EQUAL (mExceptionType, EXCEPT_IA32_PAGE_FAULT); > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_PAGE_FAULT, NULL= ); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + } > + > + RestoreAllCpuRegisters (NULL, CpuOriginalRegisterBuffer, 0); > + FreePool (CpuOriginalRegisterBuffer); > + FreePool (NewIdtr); > + return UNIT_TEST_PASSED; > +} > + > +/** > + Test if Cpu Context is consistent before and after exception. > + > + @param[in] Context [Optional] An optional parameter that enables: > + 1) test-case reuse with varied parameters and > + 2) test-case re-entry for Target tests that nee= d a > + reboot. This parameter is a VOID* and it is th= e > + responsibility of the test author to ensure tha= t the > + contents are well understood by all test cases = that may > + consume it. > + > + @retval UNIT_TEST_PASSED The Unit test has completed and = the test > + case was successful. > + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed= . > +**/ > +UNIT_TEST_STATUS > +EFIAPI > +TestCpuContextConsistency ( > + IN UNIT_TEST_CONTEXT Context > + ) > +{ > + EFI_STATUS Status; > + UINTN Index; > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer; > + UINTN FaultParameter; > + VOID *NewIdtr; > + > + FaultParameter =3D 0; > + CpuOriginalRegisterBuffer =3D SaveAllCpuRegisters (NULL, 0); > + NewIdtr =3D InitializeBspIdt (); > + Status =3D InitializeCpuExceptionHandlers (NULL); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + for (Index =3D 0; Index < 22; Index++) { > + if (Index =3D=3D EXCEPT_IA32_PAGE_FAULT) { > + if (!FindPFAddressInPageTable (&FaultParameter)) { > + continue; > + } > + } else if (Index =3D=3D EXCEPT_IA32_GP_FAULT) { > + FaultParameter =3D CR4_RESERVED_BIT; > + } else { > + if ((mErrorCodeExceptionFlag & (1 << Index)) !=3D 0) { > + continue; > + } > + } > + > + DEBUG ((DEBUG_INFO, "TestCase3: ExceptionType is %d\n", Index)); > + Status =3D RegisterCpuInterruptHandler (Index, AdjustCpuContextHandl= er); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + // > + // Trigger different type exception and compare different stage cpu = context. > + // > + AsmTestConsistencyOfCpuContext (Index, FaultParameter); > + CompareCpuContext (); > + Status =3D RegisterCpuInterruptHandler (Index, NULL); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + } > + > + RestoreAllCpuRegisters (NULL, CpuOriginalRegisterBuffer, 0); > + FreePool (CpuOriginalRegisterBuffer); > + FreePool (NewIdtr); > + return UNIT_TEST_PASSED; > +} > + > +/** > + Initializes CPU exceptions handlers for the sake of stack switch requi= rement. > + > + This function is a wrapper of InitializeSeparateExceptionStacks. It's = mainly > + for the sake of AP's init because of EFI_AP_PROCEDURE API requirement. > + > + @param[in,out] Buffer The pointer to private data buffer. > + > +**/ > +VOID > +EFIAPI > +InitializeExceptionStackSwitchHandlersPerAp ( > + IN OUT VOID *Buffer > + ) > +{ > + EXCEPTION_STACK_SWITCH_CONTEXT *CpuSwitchStackData; > + > + CpuSwitchStackData =3D (EXCEPTION_STACK_SWITCH_CONTEXT *)Buffer; > + > + // > + // This may be called twice for each Cpu. Only run InitializeSeparateE= xceptionStacks > + // if this is the first call or the first call failed because of size = too small. > + // > + if ((CpuSwitchStackData->Status =3D=3D EFI_NOT_STARTED) || (CpuSwitchS= tackData->Status =3D=3D EFI_BUFFER_TOO_SMALL)) { > + CpuSwitchStackData->Status =3D InitializeSeparateExceptionStacks (Cp= uSwitchStackData->Buffer, &CpuSwitchStackData- > >BufferSize); > + } > +} > + > +/** > + Initializes MP exceptions handlers for the sake of stack switch requir= ement. > + > + This function will allocate required resources required to setup stack= switch > + and pass them through SwitchStackData to each logic processor. > + > + @param[in, out] MpServices MpServices. > + @param[in, out] BspProcessorNum Bsp processor number. > + > + @return Pointer to the allocated SwitchStackData. > +**/ > +EXCEPTION_STACK_SWITCH_CONTEXT * > +InitializeMpExceptionStackSwitchHandlers ( > + MP_SERVICES MpServices, > + UINTN BspProcessorNum > + ) > +{ > + UINTN Index; > + EXCEPTION_STACK_SWITCH_CONTEXT *SwitchStackData; > + UINTN BufferSize; > + EFI_STATUS Status; > + UINT8 *Buffer; > + > + SwitchStackData =3D AllocateZeroPool (mNumberOfProcessors * sizeof (EX= CEPTION_STACK_SWITCH_CONTEXT)); > + ASSERT (SwitchStackData !=3D NULL); > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + // > + // Because the procedure may runs multiple times, use the status EFI= _NOT_STARTED > + // to indicate the procedure haven't been run yet. > + // > + SwitchStackData[Index].Status =3D EFI_NOT_STARTED; > + if (Index =3D=3D BspProcessorNum) { > + InitializeExceptionStackSwitchHandlersPerAp ((VOID *)&SwitchStackD= ata[Index]); > + continue; > + } > + > + Status =3D MpServicesUnitTestStartupThisAP ( > + MpServices, > + InitializeExceptionStackSwitchHandlersPerAp, > + Index, > + 0, > + (VOID *)&SwitchStackData[Index] > + ); > + ASSERT_EFI_ERROR (Status); > + } > + > + BufferSize =3D 0; > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + if (SwitchStackData[Index].Status =3D=3D EFI_BUFFER_TOO_SMALL) { > + ASSERT (SwitchStackData[Index].BufferSize !=3D 0); > + BufferSize +=3D SwitchStackData[Index].BufferSize; > + } else { > + ASSERT (SwitchStackData[Index].Status =3D=3D EFI_SUCCESS); > + ASSERT (SwitchStackData[Index].BufferSize =3D=3D 0); > + } > + } > + > + if (BufferSize !=3D 0) { > + Buffer =3D AllocateZeroPool (BufferSize); > + ASSERT (Buffer !=3D NULL); > + BufferSize =3D 0; > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + if (SwitchStackData[Index].Status =3D=3D EFI_BUFFER_TOO_SMALL) { > + SwitchStackData[Index].Buffer =3D (VOID *)(&Buffer[BufferSize]); > + BufferSize +=3D SwitchStackData[Index].BufferS= ize; > + DEBUG (( > + DEBUG_INFO, > + "Buffer[cpu%lu] for InitializeExceptionStackSwitchHandlersPerA= p: 0x%lX with size 0x%lX\n", > + (UINT64)(UINTN)Index, > + (UINT64)(UINTN)SwitchStackData[Index].Buffer, > + (UINT64)(UINTN)SwitchStackData[Index].BufferSize > + )); > + } > + } > + > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + if (Index =3D=3D BspProcessorNum) { > + InitializeExceptionStackSwitchHandlersPerAp ((VOID *)&SwitchStac= kData[Index]); > + continue; > + } > + > + Status =3D MpServicesUnitTestStartupThisAP ( > + MpServices, > + InitializeExceptionStackSwitchHandlersPerAp, > + Index, > + 0, > + (VOID *)&SwitchStackData[Index] > + ); > + ASSERT_EFI_ERROR (Status); > + } > + > + for (Index =3D 0; Index < mNumberOfProcessors; ++Index) { > + ASSERT (SwitchStackData[Index].Status =3D=3D EFI_SUCCESS); > + } > + } > + > + return SwitchStackData; > +} > + > +/** > + Test if stack overflow is captured by CpuStackGuard in both Bsp and AP= . > + > + @param[in] Context [Optional] An optional parameter that enables: > + 1) test-case reuse with varied parameters and > + 2) test-case re-entry for Target tests that nee= d a > + reboot. This parameter is a VOID* and it is th= e > + responsibility of the test author to ensure tha= t the > + contents are well understood by all test cases = that may > + consume it. > + > + @retval UNIT_TEST_PASSED The Unit test has completed and = the test > + case was successful. > + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed= . > +**/ > +UNIT_TEST_STATUS > +EFIAPI > +TestCpuStackGuardInBspAndAp ( > + IN UNIT_TEST_CONTEXT Context > + ) > +{ > + EFI_STATUS Status; > + UINTN OriginalStackBase; > + UINTN NewStackTop; > + UINTN NewStackBase; > + EXCEPTION_STACK_SWITCH_CONTEXT *SwitchStackData; > + MP_SERVICES MpServices; > + UINTN ProcessorNumber; > + UINTN EnabledProcessorNum; > + CPU_REGISTER_BUFFER *CpuOriginalRegisterBuffer; > + UINTN Index; > + UINTN BspProcessorNum; > + VOID *NewIdtr; > + UINTN *CpuStackBaseBuffer; > + > + if (!PcdGetBool (PcdCpuStackGuard)) { > + return UNIT_TEST_PASSED; > + } > + > + // > + // Get MP Service Protocol > + // > + Status =3D GetMpServices (&MpServices); > + Status =3D MpServicesUnitTestGetNumberOfProcessors (MpServices, &Proce= ssorNumber, &EnabledProcessorNum); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + Status =3D MpServicesUnitTestWhoAmI (MpServices, &BspProcessorNum); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + mNumberOfProcessors =3D ProcessorNumber; > + > + CpuOriginalRegisterBuffer =3D SaveAllCpuRegisters (&MpServices, BspPro= cessorNum); > + > + // > + // Initialize Bsp and AP Idt. > + // Idt buffer should not be empty or it will hang in MP API. > + // > + NewIdtr =3D InitializeBspIdt (); > + Status =3D InitializeCpuExceptionHandlers (NULL); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + InitializeApIdt (MpServices, NewIdtr); > + > + // > + // Get BSP and AP original stack base. > + // > + CpuStackBaseBuffer =3D GetAllCpuStackBase (&MpServices, BspProcessorNu= m); > + > + // > + // InitializeMpExceptionStackSwitchHandlers and register exception han= dler. > + // > + SwitchStackData =3D InitializeMpExceptionStackSwitchHandlers (MpServic= es, BspProcessorNum); > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_PAGE_FAUL= T, CpuStackGuardExceptionHandler); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_DOUBLE_FAULT, Adju= stRipForFaultHandler); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + > + for (Index =3D 0; Index < mNumberOfProcessors; Index++) { > + OriginalStackBase =3D CpuStackBaseBuffer[Index]; > + NewStackTop =3D (UINTN)(SwitchStackData[Index].Buffer) + Switc= hStackData[Index].BufferSize; > + NewStackBase =3D (UINTN)(SwitchStackData[Index].Buffer); > + if (Index =3D=3D BspProcessorNum) { > + TriggerStackOverflow (); > + } else { > + MpServicesUnitTestStartupThisAP ( > + MpServices, > + (EFI_AP_PROCEDURE)TriggerStackOverflow, > + Index, > + 0, > + NULL > + ); > + } > + > + DEBUG ((DEBUG_INFO, "TestCase4: mRspAddress[0] is 0x%x, mRspAddress[= 1] is 0x%x\n", mRspAddress[0], > mRspAddress[1])); > + UT_ASSERT_TRUE ((mRspAddress[0] >=3D OriginalStackBase) && (mRspAddr= ess[0] <=3D (OriginalStackBase + SIZE_4KB))); > + UT_ASSERT_TRUE ((mRspAddress[1] >=3D NewStackBase) && (mRspAddress[1= ] < NewStackTop)); > + } > + > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_PAGE_FAULT, NULL); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + Status =3D RegisterCpuInterruptHandler (EXCEPT_IA32_DOUBLE_FAULT, NULL= ); > + UT_ASSERT_EQUAL (Status, EFI_SUCCESS); > + RestoreAllCpuRegisters (&MpServices, CpuOriginalRegisterBuffer, BspPro= cessorNum); > + FreePool (SwitchStackData); > + FreePool (CpuOriginalRegisterBuffer); > + FreePool (NewIdtr); > + > + return UNIT_TEST_PASSED; > +} > + > +/** > + Create CpuExceptionLibUnitTestSuite and add test case. > + > + @param[in] FrameworkHandle Unit test framework. > + > + @return EFI_SUCCESS The unit test suite was created. > + @retval EFI_OUT_OF_RESOURCES There are not enough resources availabl= e to > + initialize the unit test suite. > +**/ > +EFI_STATUS > +AddCommonTestCase ( > + IN UNIT_TEST_FRAMEWORK_HANDLE Framework > + ) > +{ > + EFI_STATUS Status; > + UNIT_TEST_SUITE_HANDLE CpuExceptionLibUnitTestSuite; > + > + // > + // Populate the Manual Test Cases. > + // > + Status =3D CreateUnitTestSuite (&CpuExceptionLibUnitTestSuite, Framewo= rk, "Test CpuExceptionHandlerLib", > "CpuExceptionHandlerLib.Manual", NULL, NULL); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Failed in CreateUnitTestSuite for CpuException= HandlerLib Test Cases\n")); > + Status =3D EFI_OUT_OF_RESOURCES; > + return Status; > + } > + > + AddTestCase (CpuExceptionLibUnitTestSuite, "Check if exception handler= can be registered/unregistered for no error > code exception", "TestRegisterHandlerForNoErrorCodeException", TestRegist= erHandlerForNoErrorCodeException, NULL, > NULL, NULL); > + AddTestCase (CpuExceptionLibUnitTestSuite, "Check if exception handler= can be registered/unregistered for GP and PF", > "TestRegisterHandlerForGPAndPF", TestRegisterHandlerForGPAndPF, NULL, NUL= L, NULL); > + > + AddTestCase (CpuExceptionLibUnitTestSuite, "Check if Cpu Context is co= nsistent before and after exception.", > "TestCpuContextConsistency", TestCpuContextConsistency, NULL, NULL, NULL)= ; > + AddTestCase (CpuExceptionLibUnitTestSuite, "Check if stack overflow is= captured by CpuStackGuard in Bsp and AP", > "TestCpuStackGuardInBspAndAp", TestCpuStackGuardInBspAndAp, NULL, NULL, N= ULL); > + > + return EFI_SUCCESS; > +} > diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandle= rLibUnitTest.inf > b/UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerLibUnitTes= t.inf > new file mode 100644 > index 0000000000..e3dbe7b9ab > --- /dev/null > +++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerLibUni= tTest.inf > @@ -0,0 +1,58 @@ > +## @file > +# Unit tests of the DxeCpuExceptionHandlerLib instance. > +# > +# Copyright (c) 2022, Intel Corporation. All rights reserved.
> +# SPDX-License-Identifier: BSD-2-Clause-Patent > +## > + > +[Defines] > + INF_VERSION =3D 0x00010005 > + BASE_NAME =3D CpuExceptionHandlerDxeTest > + FILE_GUID =3D D76BFD9C-0B6D-46BD-AD66-2BBB6FA7031= A > + MODULE_TYPE =3D DXE_DRIVER > + VERSION_STRING =3D 1.0 > + ENTRY_POINT =3D CpuExceptionHandlerTestEntry > + > +# > +# The following information is for reference only and not required by th= e build tools. > +# > +# VALID_ARCHITECTURES =3D X64 > +# > +[Sources.X64] > + X64/ArchExceptionHandlerTestAsm.nasm > + X64/ArchExceptionHandlerTest.c > + > +[Sources.common] > + CpuExceptionHandlerTest.h > + CpuExceptionHandlerTestCommon.c > + DxeCpuExceptionHandlerUnitTest.c > + > +[Packages] > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + UefiCpuPkg/UefiCpuPkg.dec > + > +[LibraryClasses] > + BaseLib > + BaseMemoryLib > + DebugLib > + UnitTestLib > + MemoryAllocationLib > + CpuExceptionHandlerLib > + UefiDriverEntryPoint > + HobLib > + UefiBootServicesTableLib > + CpuPageTableLib > + > +[Guids] > + gEfiHobMemoryAllocStackGuid > + > +[Pcd] > + gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard ## CONSUMES > + gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES > + > +[Protocols] > + gEfiMpServiceProtocolGuid > + > +[Depex] > + gEfiMpServiceProtocolGuid > diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandle= rUnitTest.c > b/UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerUnitTest.c > new file mode 100644 > index 0000000000..917fc549bf > --- /dev/null > +++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerUnitTe= st.c > @@ -0,0 +1,196 @@ > +/** @file > + Unit tests of the CpuExceptionHandlerLib. > + > + Copyright (c) 2022, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include "CpuExceptionHandlerTest.h" > +#include > + > +/** > + Initialize Bsp Idt with a new Idt table and return the IA32_DESCRIPTOR= buffer. > + In PEIM, store original PeiServicePointer before new Idt table. > + > + @return Pointer to the allocated IA32_DESCRIPTOR buffer. > +**/ > +VOID * > +InitializeBspIdt ( > + VOID > + ) > +{ > + UINTN *NewIdtTable; > + IA32_DESCRIPTOR *Idtr; > + > + Idtr =3D AllocateZeroPool (sizeof (IA32_DESCRIPTOR)); > + ASSERT (Idtr !=3D NULL); > + NewIdtTable =3D AllocateZeroPool (sizeof (IA32_IDT_GATE_DESCRIPTOR) * = CPU_INTERRUPT_NUM); > + ASSERT (NewIdtTable !=3D NULL); > + Idtr->Base =3D (UINTN)NewIdtTable; > + Idtr->Limit =3D (UINT16)(sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU_INTER= RUPT_NUM - 1); > + > + AsmWriteIdtr (Idtr); > + return Idtr; > +} > + > +/** > + Retrieve the number of logical processor in the platform and the numbe= r of those logical processors that > + are enabled on this boot. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[out] NumberOfProcessors Pointer to the total number of logical= processors in the system, including > + the BSP and disabled APs. > + @param[out] NumberOfEnabledProcessors Pointer to the number of process= ors in the system that are enabled. > + > + @retval EFI_SUCCESS Retrieve the number of logical processor suc= cessfully > + @retval Others Retrieve the number of logical processor uns= uccessfully > +**/ > +EFI_STATUS > +MpServicesUnitTestGetNumberOfProcessors ( > + IN MP_SERVICES MpServices, > + OUT UINTN *NumberOfProcessors, > + OUT UINTN *NumberOfEnabledProcessors > + ) > +{ > + return MpServices.Protocol->GetNumberOfProcessors (MpServices.Protocol= , NumberOfProcessors, > NumberOfEnabledProcessors); > +} > + > +/** > + Get the handle number for the calling processor. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[out] ProcessorNumber The handle number for the calling processo= r. > + > + @retval EFI_SUCCESS Get the handle number for the calling proces= sor successfully. > + @retval Others Get the handle number for the calling proces= sor unsuccessfully. > +**/ > +EFI_STATUS > +MpServicesUnitTestWhoAmI ( > + IN MP_SERVICES MpServices, > + OUT UINTN *ProcessorNumber > + ) > +{ > + return MpServices.Protocol->WhoAmI (MpServices.Protocol, ProcessorNumb= er); > +} > + > +/** > + Caller gets one enabled AP to execute a caller-provided function. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[in] Procedure Pointer to the function to be run on enabled= APs of the system. > + @param[in] ProcessorNumber The handle number of the AP. > + @param[in] TimeoutInMicroSeconds Indicates the time limit in microsec= onds for APs to return from Procedure, > + for blocking mode only. Zero means i= nfinity. > + @param[in] ProcedureArgument The parameter passed into Procedure = for all APs. > + > + > + @retval EFI_SUCCESS Caller gets one enabled AP to execute a call= er-provided function successfully > + @retval Others Caller gets one enabled AP to execute a call= er-provided function unsuccessfully > +**/ > +EFI_STATUS > +MpServicesUnitTestStartupThisAP ( > + IN MP_SERVICES MpServices, > + IN EFI_AP_PROCEDURE Procedure, > + IN UINTN ProcessorNumber, > + IN UINTN TimeoutInMicroSeconds, > + IN VOID *ProcedureArgument > + ) > +{ > + return MpServices.Protocol->StartupThisAP (MpServices.Protocol, Proced= ure, ProcessorNumber, NULL, > TimeoutInMicroSeconds, ProcedureArgument, NULL); > +} > + > +/** > + Execute a caller provided function on all enabled APs. > + > + @param[in] MpServices MP_SERVICES structure. > + @param[in] Procedure Pointer to the function to be run on enabled= APs of the system. > + @param[in] SingleThread If TRUE, then all the enabled APs execute th= e function specified by Procedure > + one by one, in ascending order of processor = handle number. > + If FALSE, then all the enabled APs execute t= he function specified by Procedure > + simultaneously. > + @param[in] TimeoutInMicroSeconds Indicates the time limit in microsec= onds for APs to return from Procedure, > + for blocking mode only. Zero means i= nfinity. > + @param[in] ProcedureArgument The parameter passed into Procedure = for all APs. > + > + @retval EFI_SUCCESS Execute a caller provided function on all en= abled APs successfully > + @retval Others Execute a caller provided function on all en= abled APs unsuccessfully > +**/ > +EFI_STATUS > +MpServicesUnitTestStartupAllAPs ( > + IN MP_SERVICES MpServices, > + IN EFI_AP_PROCEDURE Procedure, > + IN BOOLEAN SingleThread, > + IN UINTN TimeoutInMicroSeconds, > + IN VOID *ProcedureArgument > + ) > +{ > + return MpServices.Protocol->StartupAllAPs (MpServices.Protocol, Proced= ure, SingleThread, NULL, > TimeoutInMicroSeconds, ProcedureArgument, NULL); > +} > + > +/** > + Get EFI_MP_SERVICES_PROTOCOL pointer. > + > + @param[out] MpServices Pointer to the buffer where EFI_MP_SERVICES_= PROTOCOL is stored > + > + @retval EFI_SUCCESS EFI_MP_SERVICES_PROTOCOL interface is return= ed > + @retval EFI_NOT_FOUND EFI_MP_SERVICES_PROTOCOL interface is not fo= und > +**/ > +EFI_STATUS > +GetMpServices ( > + OUT MP_SERVICES *MpServices > + ) > +{ > + return gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **= )&MpServices->Protocol); > +} > + > +/** > + Entry for CpuExceptionHandlerDxeTest driver. > + > + @param ImageHandle Image handle this driver. > + @param SystemTable Pointer to the System Table. > + > + @retval EFI_SUCCESS The driver executed normally. > + > +**/ > +EFI_STATUS > +EFIAPI > +CpuExceptionHandlerTestEntry ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status; > + UNIT_TEST_FRAMEWORK_HANDLE Framework; > + > + Framework =3D NULL; > + > + DEBUG ((DEBUG_INFO, "%a v%a\n", UNIT_TEST_APP_NAME, UNIT_TEST_APP_VERS= ION)); > + > + // > + // Start setting up the test framework for running the tests. > + // > + Status =3D InitUnitTestFramework (&Framework, UNIT_TEST_APP_NAME, gEfi= CallerBaseName, > UNIT_TEST_APP_VERSION); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Failed in InitUnitTestFramework. Status =3D %r= \n", Status)); > + goto EXIT; > + } > + > + Status =3D AddCommonTestCase (Framework); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Failed in AddCommonTestCase. Status =3D %r\n",= Status)); > + goto EXIT; > + } > + > + // > + // Execute the tests. > + // > + Status =3D RunAllTestSuites (Framework); > + > +EXIT: > + if (Framework) { > + FreeUnitTestFramework (Framework); > + } > + > + return Status; > +} > diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHand= lerTest.c > b/UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTest.c > new file mode 100644 > index 0000000000..c0d962f26d > --- /dev/null > +++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTest= .c > @@ -0,0 +1,166 @@ > +/** @file > + Unit tests of the CpuExceptionHandlerLib. > + > + Copyright (c) 2022, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include "CpuExceptionHandlerTest.h" > + > +GENERAL_REGISTER mActualContextInHandler; > +GENERAL_REGISTER mActualContextAfterException; > + > +// > +// In TestCpuContextConsistency, Cpu registers will be set to > mExpectedContextInHandler/mExpectedContextAfterException. > +// Rcx in mExpectedContextInHandler is set runtime since Rcx is needed i= n assembly code. > +// For GP and PF, Rcx is set to FaultParameter. For other exception trig= gered by INTn, Rcx is set to ExceptionType. > +// > +GENERAL_REGISTER mExpectedContextInHandler =3D { 1, 2, 3, 4, 5, 0,= 7, 8, 9, 0xa, 0xb, 0xc, 0xd, 0xe }; > +GENERAL_REGISTER mExpectedContextAfterException =3D { 0x11, 0x12, 0x13,= 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, > 0x1c, 0x1d, 0x1e }; > + > +/** > + Special handler for fault exception. > + Rip/Eip in SystemContext will be modified to the instruction after the= exception instruction. > + > + @param ExceptionType Exception type. > + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. > +**/ > +VOID > +EFIAPI > +AdjustRipForFaultHandler ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN EFI_SYSTEM_CONTEXT SystemContext > + ) > +{ > + mExceptionType =3D ExceptionType; > + SystemContext.SystemContextX64->Rip +=3D mFaultInstructionLength; > +} > + > +/** > + Special handler for ConsistencyOfCpuContext test case. > + > + @param ExceptionType Exception type. > + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. > +**/ > +VOID > +EFIAPI > +AdjustCpuContextHandler ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN EFI_SYSTEM_CONTEXT SystemContext > + ) > +{ > + // > + // Store SystemContext in mActualContextInHandler. > + // > + mActualContextInHandler.Rdi =3D SystemContext.SystemContextX64->Rdi; > + mActualContextInHandler.Rsi =3D SystemContext.SystemContextX64->Rsi; > + mActualContextInHandler.Rbx =3D SystemContext.SystemContextX64->Rbx; > + mActualContextInHandler.Rdx =3D SystemContext.SystemContextX64->Rdx; > + mActualContextInHandler.Rcx =3D SystemContext.SystemContextX64->Rcx; > + mActualContextInHandler.Rax =3D SystemContext.SystemContextX64->Rax; > + mActualContextInHandler.R8 =3D SystemContext.SystemContextX64->R8; > + mActualContextInHandler.R9 =3D SystemContext.SystemContextX64->R9; > + mActualContextInHandler.R10 =3D SystemContext.SystemContextX64->R10; > + mActualContextInHandler.R11 =3D SystemContext.SystemContextX64->R11; > + mActualContextInHandler.R12 =3D SystemContext.SystemContextX64->R12; > + mActualContextInHandler.R13 =3D SystemContext.SystemContextX64->R13; > + mActualContextInHandler.R14 =3D SystemContext.SystemContextX64->R14; > + mActualContextInHandler.R15 =3D SystemContext.SystemContextX64->R15; > + > + // > + // Modify cpu context. These registers will be stored in mActualContex= tAfterException. > + // Do not handle Rsp and Rbp. CpuExceptionHandlerLib doesn't set Rsp a= nd Rbp register > + // to the value in SystemContext. > + // > + SystemContext.SystemContextX64->Rdi =3D mExpectedContextAfterException= .Rdi; > + SystemContext.SystemContextX64->Rsi =3D mExpectedContextAfterException= .Rsi; > + SystemContext.SystemContextX64->Rbx =3D mExpectedContextAfterException= .Rbx; > + SystemContext.SystemContextX64->Rdx =3D mExpectedContextAfterException= .Rdx; > + SystemContext.SystemContextX64->Rcx =3D mExpectedContextAfterException= .Rcx; > + SystemContext.SystemContextX64->Rax =3D mExpectedContextAfterException= .Rax; > + SystemContext.SystemContextX64->R8 =3D mExpectedContextAfterException= .R8; > + SystemContext.SystemContextX64->R9 =3D mExpectedContextAfterException= .R9; > + SystemContext.SystemContextX64->R10 =3D mExpectedContextAfterException= .R10; > + SystemContext.SystemContextX64->R11 =3D mExpectedContextAfterException= .R11; > + SystemContext.SystemContextX64->R12 =3D mExpectedContextAfterException= .R12; > + SystemContext.SystemContextX64->R13 =3D mExpectedContextAfterException= .R13; > + SystemContext.SystemContextX64->R14 =3D mExpectedContextAfterException= .R14; > + SystemContext.SystemContextX64->R15 =3D mExpectedContextAfterException= .R15; > + > + // > + // When fault exception happens, eip/rip points to the faulting instru= ction. > + // For now, olny GP and PF are tested in fault exception. > + // > + if ((ExceptionType =3D=3D EXCEPT_IA32_PAGE_FAULT) || (ExceptionType = =3D=3D EXCEPT_IA32_GP_FAULT)) { > + AdjustRipForFaultHandler (ExceptionType, SystemContext); > + } > +} > + > +/** > + Compare cpu context in ConsistencyOfCpuContext test case. > + 1.Compare mActualContextInHandler with mExpectedContextInHandler. > + 2.Compare mActualContextAfterException with mActualContextAfterExcepti= on. > + > + @retval UNIT_TEST_PASSED The Unit test has completed and = it was successful. > + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed= . > +**/ > +UNIT_TEST_STATUS > +CompareCpuContext ( > + VOID > + ) > +{ > + UT_ASSERT_EQUAL (mActualContextInHandler.Rdi, mExpectedContextInHandle= r.Rdi); > + UT_ASSERT_EQUAL (mActualContextInHandler.Rsi, mExpectedContextInHandle= r.Rsi); > + UT_ASSERT_EQUAL (mActualContextInHandler.Rbx, mExpectedContextInHandle= r.Rbx); > + UT_ASSERT_EQUAL (mActualContextInHandler.Rdx, mExpectedContextInHandle= r.Rdx); > + UT_ASSERT_EQUAL (mActualContextInHandler.Rcx, mExpectedContextInHandle= r.Rcx); > + UT_ASSERT_EQUAL (mActualContextInHandler.Rax, mExpectedContextInHandle= r.Rax); > + UT_ASSERT_EQUAL (mActualContextInHandler.R8, mExpectedContextInHandler= .R8); > + UT_ASSERT_EQUAL (mActualContextInHandler.R9, mExpectedContextInHandler= .R9); > + UT_ASSERT_EQUAL (mActualContextInHandler.R10, mExpectedContextInHandle= r.R10); > + UT_ASSERT_EQUAL (mActualContextInHandler.R11, mExpectedContextInHandle= r.R11); > + UT_ASSERT_EQUAL (mActualContextInHandler.R12, mExpectedContextInHandle= r.R12); > + UT_ASSERT_EQUAL (mActualContextInHandler.R13, mExpectedContextInHandle= r.R13); > + UT_ASSERT_EQUAL (mActualContextInHandler.R14, mExpectedContextInHandle= r.R14); > + UT_ASSERT_EQUAL (mActualContextInHandler.R15, mExpectedContextInHandle= r.R15); > + > + UT_ASSERT_EQUAL (mActualContextAfterException.Rdi, mExpectedContextAft= erException.Rdi); > + UT_ASSERT_EQUAL (mActualContextAfterException.Rsi, mExpectedContextAft= erException.Rsi); > + UT_ASSERT_EQUAL (mActualContextAfterException.Rbx, mExpectedContextAft= erException.Rbx); > + UT_ASSERT_EQUAL (mActualContextAfterException.Rdx, mExpectedContextAft= erException.Rdx); > + UT_ASSERT_EQUAL (mActualContextAfterException.Rcx, mExpectedContextAft= erException.Rcx); > + UT_ASSERT_EQUAL (mActualContextAfterException.Rax, mExpectedContextAft= erException.Rax); > + UT_ASSERT_EQUAL (mActualContextAfterException.R8, mExpectedContextAfte= rException.R8); > + UT_ASSERT_EQUAL (mActualContextAfterException.R9, mExpectedContextAfte= rException.R9); > + UT_ASSERT_EQUAL (mActualContextAfterException.R10, mExpectedContextAft= erException.R10); > + UT_ASSERT_EQUAL (mActualContextAfterException.R11, mExpectedContextAft= erException.R11); > + UT_ASSERT_EQUAL (mActualContextAfterException.R12, mExpectedContextAft= erException.R12); > + UT_ASSERT_EQUAL (mActualContextAfterException.R13, mExpectedContextAft= erException.R13); > + UT_ASSERT_EQUAL (mActualContextAfterException.R14, mExpectedContextAft= erException.R14); > + UT_ASSERT_EQUAL (mActualContextAfterException.R15, mExpectedContextAft= erException.R15); > + return UNIT_TEST_PASSED; > +} > + > +/** > + Special handler for CpuStackGuard test case. > + > + @param ExceptionType Exception type. > + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. > + > +**/ > +VOID > +EFIAPI > +CpuStackGuardExceptionHandler ( > + IN EFI_EXCEPTION_TYPE ExceptionType, > + IN EFI_SYSTEM_CONTEXT SystemContext > + ) > +{ > + UINTN LocalVariable; > + > + AdjustRipForFaultHandler (ExceptionType, SystemContext); > + mRspAddress[0] =3D (UINTN)SystemContext.SystemContextX64->Rsp; > + mRspAddress[1] =3D (UINTN)(&LocalVariable); > + > + return; > +} > diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHand= lerTestAsm.nasm > b/UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTestAsm.= nasm > new file mode 100644 > index 0000000000..e229dbed00 > --- /dev/null > +++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTest= Asm.nasm > @@ -0,0 +1,256 @@ > +;-----------------------------------------------------------------------= ------- > +; > +; Copyright (c) 2022, Intel Corporation. All rights reserved.
> +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; ArchExceptionHandlerTestAsm.nasm > +; > +; Abstract: > +; > +; x64 CPU Exception Handler Lib Unit test > +; > +;-----------------------------------------------------------------------= ------- > + > + DEFAULT REL > + SECTION .text > + > +struc GENERAL_REGISTER > + .Rdi: resq 1 > + .Rsi: resq 1 > + .Rbx: resq 1 > + .Rdx: resq 1 > + .Rcx: resq 1 > + .Rax: resq 1 > + .R8: resq 1 > + .R9: resq 1 > + .R10: resq 1 > + .R11: resq 1 > + .R12: resq 1 > + .R13: resq 1 > + .R14: resq 1 > + .R15: resq 1 > + > +endstruc > + > +extern ASM_PFX(mExpectedContextInHandler) > +extern ASM_PFX(mActualContextAfterException) > +extern ASM_PFX(mFaultInstructionLength) > + > +;-----------------------------------------------------------------------= ------- > +; VOID > +; EFIAPI > +; TriggerGPException ( > +; UINTN Cr4ReservedBit > +; ); > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(TriggerGPException) > +ASM_PFX(TriggerGPException): > + ; > + ; Set reserved bit 15 of cr4 to 1 > + ; > + push rcx > + lea rcx, [ASM_PFX(mFaultInstructionLength)] > + mov qword[rcx], TriggerGPExceptionAfter - TriggerGPExceptionBefore > + pop rcx > +TriggerGPExceptionBefore: > + mov cr4, rcx > +TriggerGPExceptionAfter: > + ret > + > +;-----------------------------------------------------------------------= ------- > +; VOID > +; EFIAPI > +; TriggerPFException ( > +; UINTN PFAddress > +; ); > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(TriggerPFException) > +ASM_PFX(TriggerPFException): > + push rcx > + lea rcx, [ASM_PFX(mFaultInstructionLength)] > + mov qword[rcx], TriggerPFExceptionAfter - TriggerPFExceptionBefore > + pop rcx > +TriggerPFExceptionBefore: > + mov qword[rcx], 0x1 > +TriggerPFExceptionAfter: > + ret > + > +;-----------------------------------------------------------------------= ------- > +; ModifyRcxInGlobalBeforeException; > +; This function is writed by assebly code because it's only called in th= is file. > +; It's used to set Rcx in mExpectedContextInHandler for different except= ion. > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(ModifyRcxInGlobalBeforeException) > +ASM_PFX(ModifyRcxInGlobalBeforeException): > + push rax > + lea rax, [ASM_PFX(mExpectedContextInHandler)] > + mov [rax + GENERAL_REGISTER.Rcx], rcx > + pop rax > + ret > + > +;-----------------------------------------------------------------------= ------- > +;VOID > +;EFIAPI > +;AsmTestConsistencyOfCpuContext ( > +; IN EFI_EXCEPTION_TYPE ExceptionType > +; IN UINTN FaultParameter OPTIONAL > +; ); > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(AsmTestConsistencyOfCpuContext) > +ASM_PFX(AsmTestConsistencyOfCpuContext): > + ; > + ; Push original register > + ; > + push r15 > + push r14 > + push r13 > + push r12 > + push r11 > + push r10 > + push r9 > + push r8 > + push rax > + push rcx > + push rbx > + push rsi > + push rdi > + push rdx > + push rdx > + > + ; > + ; Modify registers to mExpectedContextInHandler. Do not handle Rsp a= nd Rbp. > + ; CpuExceptionHandlerLib doesn't set Rsp and Rsp register to the val= ue in SystemContext. > + ; > + lea r15, [ASM_PFX(mExpectedContextInHandler)] > + mov rdi, [r15 + GENERAL_REGISTER.Rdi] > + mov rsi, [r15 + GENERAL_REGISTER.Rsi] > + mov rbx, [r15 + GENERAL_REGISTER.Rbx] > + mov rdx, [r15 + GENERAL_REGISTER.Rdx] > + mov rax, [r15 + GENERAL_REGISTER.Rax] > + mov r8, [r15 + GENERAL_REGISTER.R8] > + mov r9, [r15 + GENERAL_REGISTER.R9] > + mov r10, [r15 + GENERAL_REGISTER.R10] > + mov r11, [r15 + GENERAL_REGISTER.R11] > + mov r12, [r15 + GENERAL_REGISTER.R12] > + mov r13, [r15 + GENERAL_REGISTER.R13] > + mov r14, [r15 + GENERAL_REGISTER.R14] > + mov r15, [r15 + GENERAL_REGISTER.R15] > + > + cmp rcx, 0xd > + jz GPException > + cmp rcx, 0xe > + jz PFException > + jmp INTnException > + > +PFException: > + pop rcx ; Pop rdx(PFAddress) = to rcx. > + call ASM_PFX(ModifyRcxInGlobalBeforeException) ; Set mExpectedContex= tInHandler.Rcx to PFAddress. > + call ASM_PFX(TriggerPFException) > + jmp AfterException > + > +GPException: > + pop rcx ; Pop rdx(Cr4Reserved= Bit) to rcx. > + call ASM_PFX(ModifyRcxInGlobalBeforeException) ; Set mExpectedContex= tInHandler.Rcx to Cr4ReservedBit. > + call ASM_PFX(TriggerGPException) > + jmp AfterException > + > +INTnException: > + ; > + ; Modify Rcx in mExpectedContextInHandler. > + ; > + add Rsp, 8 ; Discard the extra R= dx in stack. Rcx is ExceptionType now. > + call ASM_PFX(ModifyRcxInGlobalBeforeException) ; Set mExpectedContex= tInHandler.Rcx to ExceptionType. > + call ASM_PFX(TriggerINTnException) > + > +AfterException: > + ; > + ; Save registers in mActualContextAfterException > + ; > + push rax > + lea rax, [ASM_PFX(mActualContextAfterException)] > + mov [rax + GENERAL_REGISTER.Rdi], rdi > + mov [rax + GENERAL_REGISTER.Rsi], rsi > + mov [rax + GENERAL_REGISTER.Rbx], rbx > + mov [rax + GENERAL_REGISTER.Rdx], rdx > + mov [rax + GENERAL_REGISTER.Rcx], rcx > + pop rcx > + mov [rax + GENERAL_REGISTER.Rax], rcx > + mov [rax + GENERAL_REGISTER.R8], r8 > + mov [rax + GENERAL_REGISTER.R9], r9 > + mov [rax + GENERAL_REGISTER.R10], r10 > + mov [rax + GENERAL_REGISTER.R11], r11 > + mov [rax + GENERAL_REGISTER.R12], r12 > + mov [rax + GENERAL_REGISTER.R13], r13 > + mov [rax + GENERAL_REGISTER.R14], r14 > + mov [rax + GENERAL_REGISTER.R15], r15 > + > + ; > + ; restore original register > + ; > + pop rdx > + pop rdi > + pop rsi > + pop rbx > + pop rcx > + pop rax > + pop r8 > + pop r9 > + pop r10 > + pop r11 > + pop r12 > + pop r13 > + pop r14 > + pop r15 > + > + ret > + > +;-----------------------------------------------------------------------= ------- > +; VOID > +; EFIAPI > +; TriggerStackOverflow ( > +; VOID > +; ); > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(TriggerStackOverflow) > +ASM_PFX(TriggerStackOverflow): > + push rcx > + lea rcx, [ASM_PFX(mFaultInstructionLength)] > + mov qword[rcx], TriggerCpuStackGuardAfter - TriggerCpuStackGuardBef= ore > + pop rcx > +TriggerCpuStackGuardBefore: > + call TriggerCpuStackGuardBefore > +TriggerCpuStackGuardAfter: > + ret > + > +;-----------------------------------------------------------------------= ------- > +; VOID > +; EFIAPI > +; TriggerINTnException ( > +; IN EFI_EXCEPTION_TYPE ExceptionType > +; ); > +;-----------------------------------------------------------------------= ------- > +global ASM_PFX(TriggerINTnException) > +ASM_PFX(TriggerINTnException): > + push rax > + push rdx > + push rcx > + lea rax, [AsmTriggerException1 - AsmTriggerException0] > + mul rcx > + mov rcx, AsmTriggerException0 > + add rax, rcx > + pop rcx > + pop rdx > + jmp rax > + ; > + ; rax =3D AsmTriggerException0 + (AsmTriggerException1 - AsmTriggerE= xception0) * rcx > + ; > +%assign Vector 0 > +%rep 22 > +AsmTriggerException %+ Vector: > + pop rax > + INT Vector > + ret > +%assign Vector Vector+1 > +%endrep > -- > 2.31.1.windows.1