From: "Ni, Ray" <ray.ni@intel.com>
To: "Tan, Dun" <dun.tan@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Dong, Eric" <eric.dong@intel.com>,
"Kumar, Rahul R" <rahul.r.kumar@intel.com>
Subject: Re: [Patch V2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Add a new mIsShadowStack flag
Date: Wed, 10 Aug 2022 05:42:16 +0000 [thread overview]
Message-ID: <MWHPR11MB1631B78E91A5827AB0FD68168C659@MWHPR11MB1631.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220810053713.378-2-dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: Tan, Dun <dun.tan@intel.com>
> Sent: Wednesday, August 10, 2022 1:37 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar,
> Rahul R <rahul.r.kumar@intel.com>
> Subject: [Patch V2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Add a new
> mIsShadowStack flag
>
> This patch is code refactoring and doesn't change any functionality.
> Add a new IsShadowStack flag to identify whether current memory is
> shadow stack. Previous smm code logic regards a RO range as shadow
> stack and set the dirty bit in corresponding page table entry if
> mInternalCr3 is not 0, which may be confusing.
>
> Signed-off-by: Dun Tan <dun.tan@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> ---
> UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 8
> +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git
> a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
> index 1f7cc15727..237742d7e6 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
> @@ -33,6 +33,7 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
> };
>
> UINTN mInternalCr3;
> +UINTN mIsShadowStack = FALSE;
>
> /**
> Set the internal page table base address.
> @@ -249,7 +250,7 @@ ConvertPageEntryAttribute (
> if ((Attributes & EFI_MEMORY_RO) != 0) {
> if (IsSet) {
> NewPageEntry &= ~(UINT64)IA32_PG_RW;
> - if (mInternalCr3 != 0) {
> + if (mIsShadowStack) {
> // Environment setup
> // ReadOnly page need set Dirty bit for shadow stack
> NewPageEntry |= IA32_PG_D;
> @@ -734,10 +735,11 @@ SetShadowStack (
> EFI_STATUS Status;
>
> SetPageTableBase (Cr3);
> -
> - Status = SmmSetMemoryAttributes (BaseAddress, Length,
> EFI_MEMORY_RO);
> + mIsShadowStack = TRUE;
> + Status = SmmSetMemoryAttributes (BaseAddress, Length,
> EFI_MEMORY_RO);
>
> SetPageTableBase (0);
> + mIsShadowStack = FALSE;
>
> return Status;
> }
> --
> 2.31.1.windows.1
next prev parent reply other threads:[~2022-08-10 5:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-10 5:37 [Patch V2 0/2] Remove mInternalCr3 and Add a new mIsShadowStack duntan
2022-08-10 5:37 ` [Patch V2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Add a new mIsShadowStack flag duntan
2022-08-10 5:42 ` Ni, Ray [this message]
2022-08-10 5:37 ` [Patch V2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Remove mInternalCr3 in PiSmmCpuDxeSmm duntan
2022-08-10 9:26 ` [edk2-devel] " Ni, Ray
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