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charset="us-ascii" Content-Transfer-Encoding: quoted-printable I am thinking if most of FADT fields are configurable through PCD from Boar= dPkg. Then why not remove the FADT from this open-source driver but let some code= in BoardPkg produces the FADT? It helps to remove the PCD layer and simplifies the data flow from PCD->FAD= T to FADT. Thanks, Ray > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Chiu, Chas= el > Sent: Tuesday, May 17, 2022 11:19 AM > To: devel@edk2.groups.io > Cc: Sinha, Ankit ; Chiu, Chasel ; Desimone, Nathaniel L > ; Gao, Liming ;= Dong, Eric > Subject: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update F= ADT entries from board package >=20 > From: Ankit Sinha >=20 > Adds new PCDs to allow entries in FADT to be customized during platform > integration. Board packages will can update these PCDs during boot. >=20 > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Cc: Eric Dong >=20 > Signed-off-by: Ankit Sinha > --- > Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 85 ++++= ++++++++-------- > Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 24 ++++= ++ > Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 36 ++++= +++-- > 3 files changed, 105 insertions(+), 40 deletions(-) >=20 > diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > index 05fc7799fb13..b3d067def3fa 100644 > --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > @@ -1165,6 +1165,11 @@ PlatformUpdateTables ( > // Update the creator revision >=20 > // >=20 > TableHeader->CreatorRevision =3D PcdGet32(PcdAcpiDefaultCreatorRev= ision); >=20 > + >=20 > + // >=20 > + // Update the oem revision >=20 > + // >=20 > + TableHeader->OemRevision =3D PcdGet32(PcdAcpiDefaultOemRevision); >=20 > } >=20 > } >=20 >=20 >=20 > @@ -1187,44 +1192,54 @@ PlatformUpdateTables ( > case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: >=20 > FadtHeader =3D (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table; >=20 >=20 >=20 > - FadtHeader->PreferredPmProfile =3D PcdGet8 (PcdFadtPreferredPmProfil= e); >=20 > - FadtHeader->IaPcBootArch =3D PcdGet16 (PcdFadtIaPcBootArch); >=20 > - FadtHeader->Flags =3D PcdGet32 (PcdFadtFlags); >=20 > + FadtHeader->PreferredPmProfile =3D PcdGet8 (PcdFadtPr= eferredPmProfile); >=20 > + FadtHeader->IaPcBootArch =3D PcdGet16 (PcdFadtI= aPcBootArch); >=20 > + FadtHeader->Flags =3D PcdGet32 (PcdFadtF= lags); >=20 > + FadtHeader->AcpiEnable =3D PcdGet8 (PcdAcpiEn= ableSwSmi); >=20 > + FadtHeader->AcpiDisable =3D PcdGet8 (PcdAcpiDi= sableSwSmi); >=20 > + FadtHeader->Pm1aEvtBlk =3D PcdGet16 (PcdAcpiP= m1AEventBlockAddress); >=20 > + FadtHeader->Pm1bEvtBlk =3D PcdGet16 (PcdAcpiP= m1BEventBlockAddress); >=20 > + FadtHeader->Pm1aCntBlk =3D PcdGet16 (PcdAcpiP= m1AControlBlockAddress); >=20 > + FadtHeader->Pm1bCntBlk =3D PcdGet16 (PcdAcpiP= m1BControlBlockAddress); >=20 > + FadtHeader->Pm2CntBlk =3D PcdGet16 (PcdAcpiP= m2ControlBlockAddress); >=20 > + FadtHeader->PmTmrBlk =3D PcdGet16 (PcdAcpiP= mTimerBlockAddress); >=20 > + FadtHeader->Gpe0Blk =3D PcdGet16 (PcdAcpiG= pe0BlockAddress); >=20 > + FadtHeader->Gpe0BlkLen =3D PcdGet8 (PcdAcpiGp= e0BlockLength); >=20 > + FadtHeader->Gpe1Blk =3D PcdGet16 (PcdAcpiG= pe1BlockAddress); >=20 > + FadtHeader->Gpe1Base =3D PcdGet8 (PcdAcpiGp= e1Base); >=20 > + FadtHeader->DutyWidth =3D PcdGet8 (PcdAcpiDu= tyWidth); >=20 >=20 >=20 > - FadtHeader->AcpiEnable =3D PcdGet8 (PcdAcpiEnableSwSmi); >=20 > - FadtHeader->AcpiDisable =3D PcdGet8 (PcdAcpiDisableSwSmi); >=20 > + FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiP= m1AEventBlockAddress); >=20 > + FadtHeader->XPm1aCntBlk.Address =3D PcdGet16 (PcdAcpiP= m1AControlBlockAddress); >=20 > + FadtHeader->XPm1bCntBlk.Address =3D PcdGet16 (PcdAcpiP= m1BControlBlockAddress); >=20 > + FadtHeader->XPm2CntBlk.Address =3D PcdGet16 (PcdAcpiP= m2ControlBlockAddress); >=20 > + FadtHeader->XPmTmrBlk.Address =3D PcdGet16 (PcdAcpiP= mTimerBlockAddress); >=20 > + FadtHeader->XGpe0Blk.Address =3D PcdGet16 (PcdAcpiG= pe0BlockAddress); >=20 > + FadtHeader->XGpe1Blk.Address =3D PcdGet16 (PcdAcpiG= pe1BlockAddress); >=20 >=20 >=20 > - FadtHeader->Pm1aEvtBlk =3D PcdGet16 (PcdAcpiPm1AEventBlockAddress); >=20 > - FadtHeader->Pm1bEvtBlk =3D PcdGet16 (PcdAcpiPm1BEventBlockAddress); >=20 > - FadtHeader->Pm1aCntBlk =3D PcdGet16 (PcdAcpiPm1AControlBlockAddress)= ; >=20 > - FadtHeader->Pm1bCntBlk =3D PcdGet16 (PcdAcpiPm1BControlBlockAddress)= ; >=20 > - FadtHeader->Pm2CntBlk =3D PcdGet16 (PcdAcpiPm2ControlBlockAddress); >=20 > - FadtHeader->PmTmrBlk =3D PcdGet16 (PcdAcpiPmTimerBlockAddress); >=20 > - FadtHeader->Gpe0Blk =3D PcdGet16 (PcdAcpiGpe0BlockAddress); >=20 > - FadtHeader->Gpe0BlkLen =3D 0x20; >=20 > - FadtHeader->Gpe1Blk =3D PcdGet16 (PcdAcpiGpe1BlockAddress); >=20 > + FadtHeader->ResetReg.AccessSize =3D PcdGet8 (PcdAcpiRe= setRegAccessSize); >=20 > + FadtHeader->XPm1aEvtBlk.AccessSize =3D PcdGet8 (PcdAcpiXP= m1aEvtBlkAccessSize); >=20 > + FadtHeader->XPm1bEvtBlk.AccessSize =3D PcdGet8 (PcdAcpiXP= m1bEvtBlkAccessSize); >=20 > + FadtHeader->XPm1aCntBlk.AccessSize =3D PcdGet8 (PcdAcpiXP= m1aCntBlkAccessSize); >=20 > + FadtHeader->XPm1bCntBlk.AccessSize =3D PcdGet8 (PcdAcpiXP= m1bCntBlkAccessSize); >=20 > + FadtHeader->XPm2CntBlk.AccessSize =3D PcdGet8 (PcdAcpiXP= m2CntBlkAccessSize); >=20 > + FadtHeader->XPmTmrBlk.AccessSize =3D PcdGet8 (PcdAcpiXP= mTmrBlkAccessSize); >=20 > + FadtHeader->XGpe0Blk.AccessSize =3D PcdGet8 (PcdAcpiXG= pe0BlkAccessSize); >=20 > + FadtHeader->XGpe1Blk.AccessSize =3D PcdGet8 (PcdAcpiXG= pe1BlkAccessSize); >=20 >=20 >=20 > - FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1AEventBlockA= ddress); >=20 > - FadtHeader->XPm1bEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1BEventBlockA= ddress); >=20 > - if (FadtHeader->XPm1bEvtBlk.Address =3D=3D 0) { >=20 > - FadtHeader->XPm1bEvtBlk.AccessSize =3D 0; >=20 > - } >=20 > - FadtHeader->XPm1aCntBlk.Address =3D PcdGet16 (PcdAcpiPm1AControlBloc= kAddress); >=20 > - FadtHeader->XPm1bCntBlk.Address =3D PcdGet16 (PcdAcpiPm1BControlBloc= kAddress); >=20 > - if (FadtHeader->XPm1bCntBlk.Address =3D=3D 0) { >=20 > - FadtHeader->XPm1bCntBlk.AccessSize =3D 0; >=20 > - } >=20 > - FadtHeader->XPm2CntBlk.Address =3D PcdGet16 (PcdAcpiPm2ControlBlock= Address); >=20 > - //if (FadtHeader->XPm2CntBlk.Address =3D=3D 0) { >=20 > - FadtHeader->XPm2CntBlk.AccessSize =3D 0; >=20 > - //} >=20 > - FadtHeader->XPmTmrBlk.Address =3D PcdGet16 (PcdAcpiPmTimerBlockAdd= ress); >=20 > - FadtHeader->XGpe0Blk.Address =3D PcdGet16 (PcdAcpiGpe0BlockAddres= s); >=20 > - FadtHeader->XGpe1Blk.Address =3D PcdGet16 (PcdAcpiGpe1BlockAddres= s); >=20 > - if (FadtHeader->XGpe1Blk.Address =3D=3D 0) { >=20 > - FadtHeader->XGpe1Blk.AddressSpaceId =3D 0; >=20 > - FadtHeader->XGpe1Blk.AccessSize =3D 0; >=20 > - } >=20 > + FadtHeader->SleepControlReg.AddressSpaceId =3D PcdGet8 (PcdAcpiSl= eepControlRegAddressSpaceId); >=20 > + FadtHeader->SleepControlReg.RegisterBitOffset =3D PcdGet8 (PcdAcpiSl= eepControlRegRegisterBitOffset); >=20 > + FadtHeader->SleepControlReg.AccessSize =3D PcdGet8 (PcdAcpiSl= eepControlRegAccessSize); >=20 > + FadtHeader->SleepControlReg.Address =3D PcdGet64 (PcdAcpiS= leepControlRegAddress); >=20 > + FadtHeader->SleepStatusReg.AddressSpaceId =3D PcdGet8 (PcdAcpiSl= eepStatusRegAddressSpaceId); >=20 > + FadtHeader->SleepStatusReg.RegisterBitWidth =3D PcdGet8 (PcdAcpiSl= eepStatusRegRegisterBitWidth); >=20 > + FadtHeader->SleepStatusReg.RegisterBitOffset =3D PcdGet8 (PcdAcpiSl= eepStatusRegRegisterBitOffset); >=20 > + FadtHeader->SleepStatusReg.AccessSize =3D PcdGet8 (PcdAcpiSl= eepStatusRegAccessSize); >=20 > + FadtHeader->SleepStatusReg.Address =3D PcdGet64 (PcdAcpiS= leepStatusRegAddress); >=20 > + >=20 > + FadtHeader->S4BiosReq =3D PcdGet8 (PcdAcpiS4= BiosReq); >=20 > + FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiP= m1AEventBlockAddress); >=20 > + FadtHeader->XPm1bEvtBlk.Address =3D PcdGet16 (PcdAcpiP= m1BEventBlockAddress); >=20 >=20 >=20 > DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table)); >=20 > DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArc= h)); >=20 > diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.i= nf > b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf > index 99adf9c381c9..9d91e418d4ca 100644 > --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf > +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf > @@ -62,6 +62,8 @@ > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount >=20 >=20 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth >=20 > gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch >=20 > gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags >=20 >=20 >=20 > @@ -77,7 +79,29 @@ > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq >=20 > + >=20 >=20 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress >=20 > gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress >=20 > diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/= Intel/MinPlatformPkg/MinPlatformPkg.dec > index e38617ce20fd..bfc50565144f 100644 > --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > @@ -112,10 +112,6 @@ > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023 >=20 >=20 >=20 > - gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x9= 0000025 >=20 > - gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x9000= 0026 >=20 > - gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x9000002= 7 >=20 > - >=20 > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65= |UINT32|0x20000500 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UIN= T32|0x20000501 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|U= INT32|0x20000502 >=20 > @@ -245,6 +241,10 @@ > gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1 |= UINT8|0x4001004E >=20 > gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy |TRUE |BO= OLEAN|0x4001004F >=20 >=20 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x9= 0000025 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x9000= 0026 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x9000002= 7 >=20 > + >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT= 16|0x00010035 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT= 16|0x00010036 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UI= NT16|0x0001037 >=20 > @@ -252,7 +252,33 @@ > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UIN= T16|0x00010039 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16= |0x0001003A >=20 > gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x= 0001003B >=20 > - gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x= 0001003C >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x0001= 003C >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x= 0001003D >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth|0x00|UINT8|0x00010041 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize|0x00|UINT8|0x0= 0010042 >=20 > + >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UINT8|= 0x00010043 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UINT8|= 0x00010044 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize|0x00|UINT8|= 0x00010045 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize|0x00|UINT8|= 0x00010046 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize|0x00|UINT8|0= x00010047 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT8|0x= 00010048 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8|0x0= 0010049 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8|0x0= 001004A >=20 > + >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId|0x0= 0|UINT8|0x0001004B >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth|0= x00|UINT8|0x0001004C >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset|= 0x00|UINT8|0x0001004D >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize|0x00|UI= NT8|0x0001004E >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress|0x00000000= 00000000|UINT64|0x0001004F >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId|0x00= |UINT8|0x00010050 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth|0x= 00|UINT8|0x00010051 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset|0= x00|UINT8|0x00010052 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize|0x00|UIN= T8|0x00010053 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress|0x000000000= 0000000|UINT64|0x00010054 >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055 >=20 > + >=20 >=20 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UIN= T32|0x0010004 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|U= INT32|0x30000008 >=20 > -- > 2.33.0.windows.1 >=20 >=20 >=20 > -=3D-=3D-=3D-=3D-=3D-=3D > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#89792): https://edk2.groups.io/g/devel/message/89792 > Mute This Topic: https://groups.io/mt/91156600/1712937 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [ray.ni@intel.com] > -=3D-=3D-=3D-=3D-=3D-=3D >=20