From: "Ni, Ray" <ray.ni@intel.com>
To: "Wu, Jiaxin" <jiaxin.wu@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Dong, Eric" <eric.dong@intel.com>
Subject: Re: [PATCH v1] UefiCpuPkg: Add PCD to control SMRR enable & SmmFeatureControl support
Date: Tue, 28 Jun 2022 09:16:45 +0000 [thread overview]
Message-ID: <MWHPR11MB1631CBE5F0D44D140D0137A18CB89@MWHPR11MB1631.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220628084739.12216-1-jiaxin.wu@intel.com>
> - //
> - // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability
> - //
> - if ((RegEdx & BIT12) != 0) {
> - //
> - // Check MTRR_CAP MSR bit 11 for SMRR support
> - //
> - if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0)
> {
> - mSmrrSupported = TRUE;
1. can we keep the logic but just replace the above line as "ASSERT (FeaturePcdGet (PcdSmrrEnable));"?
> if ((FeatureControl & BIT3) == 0) {
> - if ((FeatureControl & BIT0) == 0) {
> + if (((FeatureControl & BIT0) == 0) && (FeaturePcdGet (PcdSmrrEnable)))
> {
> AsmWriteMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL,
> FeatureControl | BIT3);
> } else {
> - mSmrrSupported = FALSE;
> + ASSERT (!FeaturePcdGet (PcdSmrrEnable));
2. If PcdSmrrEnable is TRUE but the FeatureControl MSR is locked (BIT0 is set),
above assertion will be hit. We may need to reconsider the code logic.
> - {
> - //
> - // Check to see if the CPU supports the SMM Code Access Check feature
> - // Do not access this MSR unless the CPU supports the
> SmmRegFeatureControl
> - //
> - if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MCA_CAP) &
> SMM_CODE_ACCESS_CHK_BIT) != 0) {
> - mSmmFeatureControlSupported = TRUE;
3. can we keep the logic but just replace the above line as "ASSERT (FeaturePcdGet (PcdSmmFeatureControlEnable))"?
next prev parent reply other threads:[~2022-06-28 9:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-28 8:47 [PATCH v1] UefiCpuPkg: Add PCD to control SMRR enable & SmmFeatureControl support Wu, Jiaxin
2022-06-28 9:16 ` Ni, Ray [this message]
2022-06-29 1:37 ` Wu, Jiaxin
2022-07-17 8:46 ` Wu, Jiaxin
-- strict thread matches above, loose matches on Subject: below --
2022-07-29 6:25 Wu, Jiaxin
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