Re: [edk2-devel] [PATCH 01/10] UefiCpuPkg: Create CpuPageTableLib for manipulating X86 paging structs

["Ni, Ray" <ray.ni@intel.com>]

It has been in my todo list for years.
I wish this lib could be created earlier so that existing duplicated page table
manipulation logics could be avoided.

The Map() supports different PagingModes (4Level, 4Level1G, 5Level, 5Level1G).
It creates big page entry as the PagingMode allows (e.g.: 4Level1G allows to create PDPTE
entry mapping to 1G physical mem while 4Level only allows to create PDE entry mapping
to 2M physical mem.) All are hidden from the Map() API.




> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Gerd
> Hoffmann
> Sent: Monday, July 18, 2022 9:50 PM
> To: devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>
> Cc: Dong, Eric <eric.dong@intel.com>
> Subject: Re: [edk2-devel] [PATCH 01/10] UefiCpuPkg: Create
> CpuPageTableLib for manipulating X86 paging structs
> 
> On Mon, Jul 18, 2022 at 09:18:22PM +0800, Ni, Ray wrote:
> > The lib includes two APIs:
> > * PageTableMap
> >   It creates/updates mapping from LA to PA.
> >   The implementation only supports paging structures used in 64bit
> >   mode now. PAE paging structure support will be added in future.
> >
> > * PageTableParse
> >    It parses the page table and returns the mapping relations in an
> >   array of IA32_MAP_ENTRY.
> >
> > It passed some stress tests. These test code will be upstreamed in
> > other patches following edk2 Unit Test framework.
> 
> Nice to finally see the paging library arrive.
> 
> What is the plan for splitting huge pages?  I remember several places
> needed that functionality.  Will the library get functions for that in
> the future?  Or is the plan to hide that from callers, i.e. have
> PageTableMap() automatically create huge pages if possible and split
> them if needed?
> 
> thanks,
>   Gerd
> 
> 
> 
> 
>