From: Amit kumar <akamit91@hotmail.com>
To: "Kinney, Michael D" <michael.d.kinney@intel.com>,
Andrew Fish <afish@apple.com>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: Accessing AVX/AVX2 instruction in UEFI.
Date: Thu, 4 May 2017 11:13:39 +0000 [thread overview]
Message-ID: <MWHPR11MB1822641F8A4F432B7598B2CCDCEA0@MWHPR11MB1822.namprd11.prod.outlook.com> (raw)
In-Reply-To: <MWHPR11MB18225136B4015368FFA05D08DC160@MWHPR11MB1822.namprd11.prod.outlook.com>
Hi,
Even after using AVX2 instruction my code shown no performance improvement in UEFI although there is substantial improvement when i run the similar code in windows .
Am i missing something ?
Using MSVC compiler and the codes written in ASM.
Thanks And Regards
Amit
________________________________
From: edk2-devel <edk2-devel-bounces@lists.01.org> on behalf of Amit kumar <akamit91@hotmail.com>
Sent: Wednesday, May 3, 2017 11:18:39 AM
To: Kinney, Michael D; Andrew Fish
Cc: edk2-devel@lists.01.org
Subject: Re: [edk2] Accessing AVX/AVX2 instruction in UEFI.
Thank you Michael and Andrew
Regards
Amit
________________________________
From: Kinney, Michael D <michael.d.kinney@intel.com>
Sent: Tuesday, May 2, 2017 10:33:45 PM
To: Andrew Fish; Amit kumar; Kinney, Michael D
Cc: edk2-devel@lists.01.org
Subject: RE: [edk2] Accessing AVX/AVX2 instruction in UEFI.
Amit,
The information from Andrew is correct.
The document that covers this topic is the
Intel(r) 64 and IA-32 Architectures Software Developer Manuals
https://software.intel.com/en-us/articles/intel-sdm
Volume 1, Section 13.5.3 describes the AVX State. There are
More details about detecting and enabling different AVX features
in that document.
If the CPU supports AVX, then the basic assembly instructions
required to use AVX instructions are the following that sets
bits 0, 1, 2 of XCR0.
mov rcx, 0
xgetbv
or rax, 0007h
xsetbv
One additional item you need to be aware of is that UEFI firmware only
saves/Restores CPU registers required for the UEFI ABI calling convention
when a timer interrupt or exception is processed.
This means CPU state such as the YMM registers are not saved/restored
across an interrupt and may be modified if code in interrupt context
also uses YMM registers.
When you enable the use of extended registers, interrupts should be
saved/disabled and restored around the extended register usage.
You can use the following functions from MdePkg BaseLib to do this
/**
Disables CPU interrupts and returns the interrupt state prior to the disable
operation.
@retval TRUE CPU interrupts were enabled on entry to this call.
@retval FALSE CPU interrupts were disabled on entry to this call.
**/
BOOLEAN
EFIAPI
SaveAndDisableInterrupts (
VOID
);
/**
Set the current CPU interrupt state.
Sets the current CPU interrupt state to the state specified by
InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
InterruptState is FALSE, then interrupts are disabled. InterruptState is
returned.
@param InterruptState TRUE if interrupts should enabled. FALSE if
interrupts should be disabled.
@return InterruptState
**/
BOOLEAN
EFIAPI
SetInterruptState (
IN BOOLEAN InterruptState
);
Algorithm:
============
{
BOOLEAN InterruptState;
InterruptState = SaveAndDisableInterrupts();
// Enable use of AVX/AVX2 instructions
// Use AVX/AVX2 instructions
SetInterruptState (InterruptState);
}
Best regards,
Mike
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Andrew Fish
> Sent: Tuesday, May 2, 2017 8:12 AM
> To: Amit kumar <akamit91@hotmail.com>
> Cc: edk2-devel@lists.01.org
> Subject: Re: [edk2] Accessing AVX/AVX2 instruction in UEFI.
>
>
> > On May 2, 2017, at 6:57 AM, Amit kumar <akamit91@hotmail.com> wrote:
> >
> > Hi,
> >
> > Am trying to optimize an application using AVX/AVX2, but my code hangs while trying
> to access YMM registers.
> > The instruction where my code hangs is :
> >
> >
> > vmovups ymm0, YMMWORD PTR [rax]
> >
> >
> > I have verified the cpuid in OS and it supports AVX and AVX2 instruction. Processor
> i7 6th gen.
> > Can somebody help me out here ? Is there a way to enable YMM registers ?
> >
>
> Amit,
>
> I think these instructions will generate an illegal instruction fault until you enable
> AVX. You need to check the Cpu ID bits in your code, then write BIT18 of CR4. After
> that XGETBV/XSETBV instructions are enabled and you can or in the lower 2 bits of
> XCR0. This basic operation is in the Intel Docs, it is just hard to find. Usually the
> OS has done this for the programmer and all the code needs to do is check the CPU ID.
>
> Thanks,
>
> Andrew Fish
>
> >
> > Thanks And Regards
> > Amit Kumar
> >
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
next prev parent reply other threads:[~2017-05-04 11:13 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-02 13:57 Accessing AVX/AVX2 instruction in UEFI Amit kumar
2017-05-02 15:12 ` Andrew Fish
2017-05-02 17:03 ` Kinney, Michael D
2017-05-03 5:48 ` Amit kumar
2017-05-04 11:13 ` Amit kumar [this message]
2017-05-04 11:32 ` Andrew Fish
2017-05-04 12:18 ` Amit kumar
2017-05-04 12:22 ` Amit kumar
2017-05-04 15:20 ` Andrew Fish
2017-05-04 17:26 ` Kinney, Michael D
2017-05-05 13:08 ` Amit kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=MWHPR11MB1822641F8A4F432B7598B2CCDCEA0@MWHPR11MB1822.namprd11.prod.outlook.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox