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From: "Samer El-Haj-Mahmoud" <samer.el-haj-mahmoud@arm.com>
To: Marcin Wojtas <mw@semihalf.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "leif@nuviainc.com" <leif@nuviainc.com>,
	"ardb+tianocore@kernel.org" <ardb+tianocore@kernel.org>,
	Sunny Wang <Sunny.Wang@arm.com>,
	"gjb@semihalf.com" <gjb@semihalf.com>,
	"upstream@semihalf.com" <upstream@semihalf.com>,
	Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Subject: Re: [edk2-platforms PATCH 1/6] Marvell/Drivers: SmbiosPlatformDxe: Align Type17 to SMBIOS v3.2
Date: Mon, 24 May 2021 11:09:52 +0000	[thread overview]
Message-ID: <PAXPR08MB69879E729646CE1971135A1290269@PAXPR08MB6987.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20210524052919.2496579-2-mw@semihalf.com>

Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>

> -----Original Message-----
> From: Marcin Wojtas <mw@semihalf.com>
> Sent: Monday, May 24, 2021 1:29 AM
> To: devel@edk2.groups.io
> Cc: leif@nuviainc.com; ardb+tianocore@kernel.org; Samer El-Haj-Mahmoud
> <Samer.El-Haj-Mahmoud@arm.com>; Sunny Wang
> <Sunny.Wang@arm.com>; gjb@semihalf.com; upstream@semihalf.com;
> Marcin Wojtas <mw@semihalf.com>
> Subject: [edk2-platforms PATCH 1/6] Marvell/Drivers: SmbiosPlatformDxe:
> Align Type17 to SMBIOS v3.2
>
> This patch adds missing entries required for SMBIOS v3.2 compliance
> of the Type17 table. On the occasion improve Type4 table contents.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 39
> ++++++++++++++++++--
>  1 file changed, 35 insertions(+), 4 deletions(-)
>
> diff --git a/Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
> b/Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
> index 2ecaec2af5..a99291e902 100644
> --- a/Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
> +++ b/Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
> @@ -181,7 +181,7 @@ STATIC SMBIOS_TABLE_TYPE4 mArmadaDefaultType4
> = {
>    3,             //version
>
>    {0,0,0,0,0,1}, //voltage
>
>    0,             //external clock
>
> -  2000,          //max speed
>
> +  2200,          //max speed
>
>    0,             //current speed - requires update
>
>    0x41,          //status
>
>    ProcessorUpgradeOther,
>
> @@ -196,6 +196,9 @@ STATIC SMBIOS_TABLE_TYPE4 mArmadaDefaultType4
> = {
>    4,             //threads per socket
>
>    0xEC,          //processor characteristics
>
>    ProcessorFamilyARM, //ARM core
>
> +  0,             // CoreCount2;
>
> +  0,             // EnabledCoreCount2;
>
> +  0,             // ThreadCount2;
>
>  };
>
>
>
>  STATIC CHAR8 CONST *mArmadaDefaultType4Strings[] = {
>
> @@ -457,7 +460,7 @@ STATIC SMBIOS_TABLE_TYPE17
> mArmadaDefaultType17 = {
>    0,  //Memory size obtained dynamically
>
>    MemoryFormFactorRowOfChips,      //Memory factor
>
>    0,                               //Not part of a set
>
> -  1,                               //Right side of board
>
> +  1,                               //Location
>
>    2,                               //Bank 0
>
>    MemoryTypeDdr4,                  //DDR4
>
>    {0,0,0,0,0,0,0,0,0,0,0,0,0,0,1}, //unbuffered
>
> @@ -467,10 +470,36 @@ STATIC SMBIOS_TABLE_TYPE17
> mArmadaDefaultType17 = {
>    0, //asset tag
>
>    0, //part number
>
>    0, //rank
>
> +  0, // ExtendedSize; (since Size < 32GB-1)
>
> +  0, // ConfiguredMemoryClockSpeed - initialized at runtime
>
> +  0, // MinimumVoltage; (unknown)
>
> +  0, // MaximumVoltage; (unknown)
>
> +  0, // ConfiguredVoltage; (unknown)
>
> +  MemoryTechnologyDram, // MemoryTechnology
>
> +  {{                    // MemoryOperatingModeCapability
>
> +    0,  // Reserved                        :1;
>
> +    0,  // Other                           :1;
>
> +    0,  // Unknown                         :1;
>
> +    1,  // VolatileMemory                  :1;
>
> +    0,  // ByteAccessiblePersistentMemory  :1;
>
> +    0,  // BlockAccessiblePersistentMemory :1;
>
> +    0   // Reserved                        :10;
>
> +  }},
>
> +  0, // FirwareVersion
>
> +  0, // ModuleManufacturerID (unknown)
>
> +  0, // ModuleProductID (unknown)
>
> +  0, // MemorySubsystemControllerManufacturerID (unknown)
>
> +  0, // MemorySubsystemControllerProductID (unknown)
>
> +  0, // NonVolatileSize
>
> +  0, // VolatileSize - initialized at runtime
>
> +  0, // CacheSize
>
> +  0, // LogicalSize
>
> +  0, // ExtendedSpeed,
>
> +  0  // ExtendedConfiguredMemorySpeed
>
>  };
>
>
>
>  STATIC CHAR8 CONST *mArmadaDefaultType17Strings[] = {
>
> -  "RIGHT SIDE\0",                     /* location */
>
> +  "DIMM SLOT\0",                      /* location */
>
>    "BANK 0\0",                         /* bank description */
>
>    NULL
>
>  };
>
> @@ -735,9 +764,10 @@ SmbiosMemoryInstall (
>    }
>
>
>
>    //
>
> -  // Update TYPE17 memory size field
>
> +  // Update TYPE17 memory size fields
>
>    //
>
>    mArmadaDefaultType17.Size = (UINT16)(MemorySize >> 20);
>
> +  mArmadaDefaultType17.VolatileSize = MemorySize;
>
>
>
>    return EFI_SUCCESS;
>
>  }
>
> @@ -767,6 +797,7 @@ SmbiosInstallAllStructures (
>    mArmadaDefaultType0.SystemBiosMinorRelease =
> FirmwareMinorRevisionNumber;
>
>    mArmadaDefaultType4.CurrentSpeed = SampleAtResetGetCpuFrequency
> ();
>
>    mArmadaDefaultType17.Speed = SampleAtResetGetDramFrequency ();
>
> +  mArmadaDefaultType17.ConfiguredMemoryClockSpeed =
> SampleAtResetGetDramFrequency ();
>
>
>
>    //
>
>    // Generate memory descriptors.
>
> --
> 2.29.0

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  reply	other threads:[~2021-05-24 11:10 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-24  5:29 [edk2-platforms PATCH 0/6] Marvell ACS fixes Marcin Wojtas
2021-05-24  5:29 ` [edk2-platforms PATCH 1/6] Marvell/Drivers: SmbiosPlatformDxe: Align Type17 to SMBIOS v3.2 Marcin Wojtas
2021-05-24 11:09   ` Samer El-Haj-Mahmoud [this message]
2021-05-24  5:29 ` [edk2-platforms PATCH 2/6] Marvell: Armada7k8k/OcteonTx: Fix RT debug prints Marcin Wojtas
2021-05-24 10:59   ` Samer El-Haj-Mahmoud
2021-05-25 11:50     ` Sunny Wang
2021-05-24  5:29 ` [edk2-platforms PATCH 3/6] Marvell: Armada7k8k/OcteonTx: Switch SPCR UART subtype to 0x1 Marcin Wojtas
2021-05-24 11:06   ` Samer El-Haj-Mahmoud
     [not found]   ` <1681FC02AF1B6E10.27195@groups.io>
2021-05-24 15:04     ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-05-25 11:53   ` Sunny Wang
2021-05-24  5:29 ` [edk2-platforms PATCH 4/6] Marvell/Cn913xDbA: AcpiTables: Use unique UID's Marcin Wojtas
2021-05-24 11:00   ` Samer El-Haj-Mahmoud
2021-05-25 13:52     ` Sunny Wang
2021-05-24  5:29 ` [edk2-platforms PATCH 5/6] Marvell: RealTimeClockLib: Fix daylight and timezone handling Marcin Wojtas
2021-05-24 11:08   ` Samer El-Haj-Mahmoud
2021-05-24  5:29 ` [edk2-platforms PATCH 6/6] Marvell: RealTimeClockLib: Rework LibGetWakeupTime/LibSetWakeupTime Marcin Wojtas
2021-06-02  6:53   ` Ard Biesheuvel
2021-06-02  7:06 ` [edk2-platforms PATCH 0/6] Marvell ACS fixes Ard Biesheuvel

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