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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Aug 2021 20:27:40.9951 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbb05882-8075-4385-eb2b-08d96418f581 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT012.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB3117 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable +Jared to review/test the series with NetBSD 10, which supports the DEN0115= interface (https://www.netbsd.org/changes/changes-10.0.html#port-evbarm) > -----Original Message----- > From: Jeremy Linton > Sent: Friday, August 20, 2021 12:16 AM > To: devel@edk2.groups.io > Cc: pete@akeo.ie; ardb+tianocore@kernel.org; Andrei Warkentin > (awarkentin@vmware.com) ; Sunny Wang > ; Samer El-Haj-Mahmoud Mahmoud@arm.com>; Jeremy Linton > Subject: [PATCH v3 0/7] RPi4: Enable ACPI PCIe conduit > > A new Arm standard DEN0115A specifies how platforms that don't have > standard ECAM can use the firmware to handle config read/write > operations. This is mostly implemented in TFA but UEFI needs to assure > that there is a description of the root complex in the ACPI namespace. > > This set adds that description based on a new menu item which toggles > between XHCI platform description and PCIe via a BDS menu selection on > the RPi4. The CM4 is really the platform that needs this as it has a > PCIe slot. On that platform PCIe is enabled by default. > > v2->v3: > Remove ACPI0004 container around PCI root bridge along with some > whitespace/tweaks to the Pci.asl file. > Add Linux quirk _DSD patch at the end. > > v1->v2: > Use global shared interrupts in PCI PRT which is a pretty > significant simplification. > Modify bus max to use the secondary side of the root port for > enforcing device limits > Various other AML cleanups per Ard (drop redundant _DMA, bump UID > to make it unique, etc) > Break link status move into its own patch > MADT->MCFG typos in various comments > Commit message tweaking > > Jeremy Linton (7): > Platform/RaspberryPi: Add XHCI/PCI selection menu > Platform/RaspberryPi: Break XHCI into its own SSDT > Platform/RaspberryPi: Add PCIe SSDT > Silicon/Broadcom/Bcm27xx: Relax PCIe device restriction > Silicon/Broadcom/Bcm27xx: Move linkup check into the cfg accessor > Platform/RaspberryPi: Enable NVMe boot on CM4 > Platform/RaspberryPi: Add Linux quirk support > > Platform/RaspberryPi/AcpiTables/AcpiTables.inf | 4 + > Platform/RaspberryPi/AcpiTables/Dsdt.asl | 3 - > Platform/RaspberryPi/AcpiTables/Pci.asl | 168 > +++++++++++++++++++++ > Platform/RaspberryPi/AcpiTables/Xhci.asl | 35 +++-- > Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 56 +++++++ > .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 + > .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 + > .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 17 +++ > Platform/RaspberryPi/Include/ConfigVars.h | 4 + > Platform/RaspberryPi/RPi3/RPi3.dsc | 6 + > Platform/RaspberryPi/RPi4/RPi4.dsc | 13 ++ > Platform/RaspberryPi/RPi4/RPi4.fdf | 5 + > Platform/RaspberryPi/RaspberryPi.dec | 1 + > .../Bcm2711PciHostBridgeLibConstructor.c | 5 - > .../Library/Bcm2711PciSegmentLib/PciSegmentLib.c | 28 +++- > 15 files changed, 323 insertions(+), 28 deletions(-) > create mode 100644 Platform/RaspberryPi/AcpiTables/Pci.asl > > -- > 2.13.7 IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.