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From: "Sheng Wei" <w.sheng@intel.com>
To: "Ni, Ray" <ray.ni@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Kowalewski, Robert" <robert.kowalewski@intel.com>,
	"Huang, Jenny" <jenny.huang@intel.com>,
	"Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>,
	"Albecki, Mateusz" <mateusz.albecki@intel.com>
Subject: Re: [PATCH v2] IntelSiliconPkg/IntelVTdDxe: Support Multi PCI Root Bus
Date: Wed, 20 Oct 2021 02:42:19 +0000	[thread overview]
Message-ID: <PH0PR11MB48701CB06FBB7C6ADDF8B668E1BE9@PH0PR11MB4870.namprd11.prod.outlook.com> (raw)
In-Reply-To: <BN0PR11MB5696E865FFF3F0CA1822F1BC8CBE9@BN0PR11MB5696.namprd11.prod.outlook.com>

Hi Ray,
Thank you for sharing the solution. I am worrying on this issue now. I have found some produce did not support this lib.
I will update the patch.
BR
Sheng Wei

> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: 2021年10月20日 8:29
> To: Sheng, W <w.sheng@intel.com>; devel@edk2.groups.io
> Cc: Kowalewski, Robert <robert.kowalewski@intel.com>; Huang, Jenny
> <jenny.huang@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>; Albecki, Mateusz
> <mateusz.albecki@intel.com>
> Subject: RE: [PATCH v2] IntelSiliconPkg/IntelVTdDxe: Support Multi PCI Root
> Bus
> 
> Can you rely on the PciRootBridgeIo protocol instances instead of this library?
> 
> It will make the driver usable in platforms that don't produce the
> PciHostBridgeLib.
> 
> Thanks,
> Rya
> 
> > -----Original Message-----
> > From: Sheng, W <w.sheng@intel.com>
> > Sent: Monday, October 18, 2021 4:43 PM
> > To: devel@edk2.groups.io
> > Cc: Kowalewski, Robert <robert.kowalewski@intel.com>; Huang, Jenny
> > <jenny.huang@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty,
> > Rangasai V <rangasai.v.chaganty@intel.com>; Albecki, Mateusz
> > <mateusz.albecki@intel.com>
> > Subject: [PATCH v2] IntelSiliconPkg/IntelVTdDxe: Support Multi PCI
> > Root Bus
> >
> > Some system may has multi PCI root bus. It needs to use function
> > PciHostBridgeGetRootBridges () to get the root bus count. Then,  scan
> > each root bus to get all devices.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3695
> >
> > Signed-off-by: Robert Kowalewski <robert.kowalewski@intel.com>
> > Signed-off-by: Sheng Wei <w.sheng@intel.com>
> > Cc: Jenny Huang <jenny.huang@intel.com>
> > Cc: Ray Ni <ray.ni@intel.com>
> > Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> > Cc: Robert Kowalewski <robert.kowalewski@intel.com>
> > Cc: Albecki Mateusz <mateusz.albecki@intel.com>
> > ---
> >  .../Feature/VTd/IntelVTdDxe/DmaProtection.h             |  1 +
> >  .../Feature/VTd/IntelVTdDxe/DmarAcpiTable.c             | 17
> ++++++++++++++---
> >  .../Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf             |  1 +
> >  3 files changed, 16 insertions(+), 3 deletions(-)
> >
> > diff --git
> > a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.
> > h
> > b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.
> > h
> > index a24fbc37..97061de5 100644
> > ---
> > a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.
> > h
> > +++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtect
> > +++ ion.h
> > @@ -23,6 +23,7 @@
> >  #include <Library/PerformanceLib.h>
> >  #include <Library/PrintLib.h>
> >  #include <Library/ReportStatusCodeLib.h>
> > +#include <Library/PciHostBridgeLib.h>
> >
> >  #include <Guid/EventGroup.h>
> >  #include <Guid/Acpi.h>
> > diff --git
> > a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.
> > c
> > b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.
> > c
> > index 2d9b4374..e717aeb2 100644
> > ---
> > a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.
> > c
> > +++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTa
> > +++ ble.c
> > @@ -682,6 +682,9 @@ ProcessDhrd (
> >    UINT8                                             SecondaryBusNumber;
> >    EFI_STATUS                                        Status;
> >    VTD_SOURCE_ID                                     SourceId;
> > +  PCI_ROOT_BRIDGE                                   *RootBridges;
> > +  UINTN                                             RootBridgeCount;
> > +  UINTN                                             Index;
> >
> >    mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress =
> (UINTN)DmarDrhd->RegisterBaseAddress;
> >    DEBUG ((DEBUG_INFO,"  VTD (%d) BaseAddress -  0x%016lx\n",
> > VtdIndex, DmarDrhd->RegisterBaseAddress)); @@ -692,9 +695,17 @@
> ProcessDhrd (
> >      mVtdUnitInformation[VtdIndex].PciDeviceInfo.IncludeAllFlag = TRUE;
> >      DEBUG ((DEBUG_INFO,"  ProcessDhrd: with INCLUDE ALL\n"));
> >
> > -    Status = ScanPciBus((VOID *)VtdIndex, DmarDrhd->SegmentNumber, 0,
> ScanBusCallbackRegisterPciDevice);
> > -    if (EFI_ERROR (Status)) {
> > -      return Status;
> > +    RootBridges = PciHostBridgeGetRootBridges (&RootBridgeCount);
> > +    if ((RootBridges == NULL) || (RootBridgeCount == 0)) {
> > +      return EFI_UNSUPPORTED;
> > +    }
> > +    DEBUG ((DEBUG_INFO,"Find %d root bridges\n", RootBridgeCount));
> > +    for (Index = 0; Index < RootBridgeCount; Index++) {
> > +      DEBUG ((DEBUG_INFO,"Scan root bridges : %d, Segment : %d, Bus :
> > + 0x%02X\n", Index, RootBridges[Index].Segment,
> > RootBridges[Index].Bus.Base));
> > +      Status = ScanPciBus((VOID *)VtdIndex, (UINT16)
> > + RootBridges[Index].Segment, (UINT8) RootBridges[Index].Bus.Base,
> > ScanBusCallbackRegisterPciDevice);
> > +      if (EFI_ERROR (Status)) {
> > +        return Status;
> > +      }
> >      }
> >    } else {
> >      mVtdUnitInformation[VtdIndex].PciDeviceInfo.IncludeAllFlag =
> > FALSE; diff --git
> > a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.in
> > f
> > b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.in
> > f
> > index 220636ad..25ff86f4 100644
> > ---
> > a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.in
> > f
> > +++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDx
> > +++ e.inf
> > @@ -55,6 +55,7 @@
> >    PerformanceLib
> >    PrintLib
> >    ReportStatusCodeLib
> > +  PciHostBridgeLib
> >
> >  [Guids]
> >    gEfiEventExitBootServicesGuid   ## CONSUMES ## Event
> > --
> > 2.16.2.windows.1


      reply	other threads:[~2021-10-20  2:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18  8:42 [PATCH v2] IntelSiliconPkg/IntelVTdDxe: Support Multi PCI Root Bus Sheng Wei
2021-10-20  0:29 ` Ni, Ray
2021-10-20  2:42   ` Sheng Wei [this message]

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