Re: [edk2-devel] [PATCH V2 21/28] OvmfPkg: Update PlatformPei to support TDX

["Yao, Jiewen" <jiewen.yao@intel.com>]

Ok. Please allow me to clarify my description. 

"high memory" in this context means the memory region just below the less than 4GiB DRAM limit. In a platform BIOS, it means the memory just below TOLUD (Top of Low Usable DRAM).
Usually, the BIOS will reserve a chunk of memory just below TOLUD, including ReservedMemory, ACPI-NVS, ACPI-Reclaim, RuntimeData, RuntimeCode. As such the OS can use the reset memory as a continuous memory region.

"low memory" in this context means the memory region below the "high memory" defined above. From OS perspective, there will be a hole in the continuous memory region. Technically, OS shall handle that. But the best practice told us we should avoid that as much as possible. We have experience that if we put too many holes, some OSes will refuse to boot. From OS perspective, the BIOS should put all BIOS-reserved memory together.

Here, the initial mailbox is in "low memory", because we cannot predict how many virtual-DRAM the VMM will allocate for the OVMF. We cannot predict where is the TOLUD.
And we have to put the final mailbox (reserved) to "high memory" to avoid creating a hole for OS.

If you look at the whole firmware code, relocation is quite usual design pattern in firmware. For example, PEI HOB, SMM init, CPU AP Loop, ACPI table, BootScript, etc.

Thank you
Yao Jiewen

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Gerd
> Hoffmann
> Sent: Friday, October 15, 2021 1:46 PM
> To: Yao, Jiewen <jiewen.yao@intel.com>
> Cc: devel@edk2.groups.io; Xu, Min M <min.m.xu@intel.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Justen, Jordan L <jordan.l.justen@intel.com>;
> Brijesh Singh <brijesh.singh@amd.com>; Erdem Aktas
> <erdemaktas@google.com>; James Bottomley <jejb@linux.ibm.com>; Tom
> Lendacky <thomas.lendacky@amd.com>
> Subject: Re: [edk2-devel] [PATCH V2 21/28] OvmfPkg: Update PlatformPei to
> support TDX
> 
>   Hi,
> 
> > The original mailbox location is in low memory. If we do not relocate
> > to high memory, then the OS will see a hole in low memory.
> 
> Well, both low and high memory to be exact.  qemu maps the whole
> firmware image below 4G, and mirrors the topmost 128k (including
> memfd + reset vector) below 1M.
> 
> Given that TDX starts the processor in 32bit mode, so it doesn't need
> the 16bit entry @ f000:fff0, I assumed TDX completely ignores the low
> memory mapping and uses only the high memory mapping.
> 
> So you are telling me this is not the case?
> 
> take care,
>   Gerd
> 
> 
> 
> 
>