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charset="us-ascii" Content-Transfer-Encoding: quoted-printable One typo forget to be changed, change it inline. > -----Original Message----- > From: Liu, Zhiguang > Sent: Thursday, May 4, 2023 9:55 AM > To: devel@edk2.groups.io > Cc: Liu, Zhiguang ; Dong, Eric ; > Ni, Ray ; Kumar, Rahul R ; Ger= d > Hoffmann ; De, Debkumar ; > West, Catharine > Subject: [PATCH v4 4/5] UefiCpuPkg/ResetVector: Modify Page Table in > ResetVector >=20 > In ResetVector, if create page table, its highest address is fixed becaus= e after > page table, code layout is fixed(4K for normal code, and another 4K only > contains reset vector code). > Today's implementation organizes the page table as following if 1G page t= able is > used: > 4G-16K: PML4 page (PML4[0] points to 4G-12K) > 4G-12K: PDP page > CR3 is set to 4G-16K > When 2M page table is used, the layout is as following: > 4G-32K: PML4 page (PML4[0] points to 4G-28K) > 4G-28K: PDP page (PDP entries point to PD pages) > 4G-24K: PD page mapping 0-1G > 4G-20K: PD page mapping 1-2G > 4G-16K: PD page mapping 2-3G > 4G-12K: PD page mapping 3-4G > CR3 is set to 4G-32K > CR3 doesn't point to a fixed location which is a bit hard to debug at run= time. >=20 > The new page table layout will always put PML4 in highest address When 1G > page table is used, the layout is as following: > 4G-16K: PDP page > 4G-12K: PML4 page (PML4[0] points to 4G-16K) When 2M page table is used= , > the layout is as following: > 4G-32K: PD page mapping 0-1G > 4G-28K: PD page mapping 1-2G > 4G-24K: PD page mapping 2-3G > 4G-20K: PD page mapping 3-4G > 4G-16K: PDP page (PDP entries point to PD pages) > 4G-12K: PML4 page (PML4[0] points to 4G-16K) > CR3 is always set to 4G-12K > So, this patch can improve biodegradability by make sure the init Change typo here biodegradability-> debuggability > CR3 pointing to a fixed address(4G-12K). >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Cc: Gerd Hoffmann > Cc: Debkumar De > Cc: Catharine West > Signed-off-by: Zhiguang Liu > --- > .../ResetVector/Vtf0/X64/PageTables.asm | 33 ++++++++++--------- > 1 file changed, 17 insertions(+), 16 deletions(-) >=20 > diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm > b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm > index fb953ebaa3..60f11a1f7d 100644 > --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm > +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm > @@ -41,13 +41,6 @@ BITS 64 >=20 > ALIGN 16 >=20 > -Pml4: > - ; > - ; PML4 (1 * 512GB entry) > - ; > - DQ PAGE_NLE(Pdp) > - TIMES 0x1000 - ($ - Pml4) DB 0 > - > %ifdef PAGE_TABLE_1G > Pdp: > ; > @@ -59,15 +52,6 @@ Pdp: > %assign i i+1 > %endrep > %else > -Pdp: > - ; > - ; Page-directory pointer table (4 * 1GB entries =3D> 4GB) > - ; > - DQ PAGE_NLE(Pd) > - DQ PAGE_NLE(Pd + 0x1000) > - DQ PAGE_NLE(Pd + 0x2000) > - DQ PAGE_NLE(Pd + 0x3000) > - TIMES 0x1000 - ($ - Pdp) DB 0 >=20 > Pd: > ; > @@ -79,5 +63,22 @@ Pd: > DQ PDE_2MB(i) > %assign i i+1 > %endrep > +Pdp: > + ; > + ; Page-directory pointer table (4 * 1GB entries =3D> 4GB) > + ; > + DQ PAGE_NLE(Pd) > + DQ PAGE_NLE(Pd + 0x1000) > + DQ PAGE_NLE(Pd + 0x2000) > + DQ PAGE_NLE(Pd + 0x3000) > + TIMES 0x1000 - ($ - Pdp) DB 0 > + > %endif > + > +Pml4: > + ; > + ; PML4 (1 * 512GB entry) > + ; > + DQ PAGE_NLE(Pdp) > + TIMES 0x1000 - ($ - Pml4) DB 0 > EndOfPageTables: > -- > 2.31.1.windows.1