Re: [PATCH 1/2] Ovmfpkg: update Ia32 build to use new work area

["Min Xu" <min.m.xu@intel.com>]

On October 15, 2021 2:17 AM, Brijesh Singh wrote:
> 
> The commit 80e67af9afca added support for the generic work area concept
> used mainly by the encrypted VMs. In the past, the work area was preliminary
> used by the SEV-ES VMs. The SEV-ES support is available for the X64 builds only.
> But now, that work area header contains fields that nonencrypted VMs and SEV
> VMs can use. They can be built for IA32. So, moving the work area defines
> outside of X64.
> 
> Fixes: 80e67af9afca ("OvmfPkg: introduce a common work area")
> Cc: James Bottomley <jejb@linux.ibm.com>
> Cc: Min Xu <min.m.xu@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Tom Lendacky <thomas.lendacky@amd.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Erdem Aktas <erdemaktas@google.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
> ---
>  OvmfPkg/OvmfPkgIa32X64.fdf            | 3 +++
>  OvmfPkg/ResetVector/ResetVector.nasmb | 3 ++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf
> index 245ca94044df..9d8695922f97 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.fdf
> +++ b/OvmfPkg/OvmfPkgIa32X64.fdf
> @@ -76,6 +76,9 @@ [FD.MEMFD]
>  0x007000|0x001000
> 
> gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gUefiOvmf
> PkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
> 
> +0x008000|0x001000
> +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|gUefiOvmfPkgTokenS
> paceGu
> +id.PcdOvmfWorkAreaSize
> +
>  0x010000|0x010000
> 
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTo
> kenSpaceGuid.PcdOvmfSecPeiTempRamSize
> 
> diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb
> b/OvmfPkg/ResetVector/ResetVector.nasmb
> index d1d800c56745..21b5fd82b830 100644
> --- a/OvmfPkg/ResetVector/ResetVector.nasmb
> +++ b/OvmfPkg/ResetVector/ResetVector.nasmb
> @@ -47,6 +47,8 @@
>  %include "Ia32/SearchForBfvBase.asm"
>  %include "Ia32/SearchForSecEntry.asm"
> 
> +%define WORK_AREA_GUEST_TYPE (FixedPcdGet32 (PcdOvmfWorkAreaBase))
> +
>  %ifdef ARCH_X64
>    #include <AutoGen.h>
> 
> @@ -72,7 +74,6 @@
>    %define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))
>    %define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase))
>    %define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize))
> -  %define WORK_AREA_GUEST_TYPE (FixedPcdGet32 (PcdOvmfWorkAreaBase))
>    %define SEV_ES_WORK_AREA (FixedPcdGet32 (PcdSevEsWorkAreaBase))
>    %define SEV_ES_WORK_AREA_RDRAND (FixedPcdGet32
> (PcdSevEsWorkAreaBase) + 8)
>    %define SEV_ES_WORK_AREA_ENC_MASK (FixedPcdGet32
> (PcdSevEsWorkAreaBase) + 16)
> --
> 2.25.1

Reviewed-by: Min Xu <min.m.xu@intel.com>

Thanks.
Min