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Thread-Topic: [PATCH v2 1/4] IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface. 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Chasel, Please see feedback inline. Specifically, some improvements are needed in t= he comments. The code itself looks good! For that reason, there is no need = to send a V3 patch series. Please fix the comments then you are free to pus= h the change. With those changes... Reviewed-by: Nate DeSimone Thanks, Nate > -----Original Message----- > From: Chiu, Chasel > Sent: Tuesday, August 9, 2022 5:48 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [PATCH v2 1/4] IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3916 >=20 > Provide FSP 2.4 MultiPhase interface and scripts support. >=20 > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Chasel Chiu > --- > IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c | 184= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++ > IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c | 30= ++++++++++++++++++++++++++++++ > IntelFsp2Pkg/Include/FspEas/FspApi.h | 62= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- > IntelFsp2Pkg/Include/FspGlobalData.h | 5= ++++- > IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h | 54= ++++++++++++++++++++++++++++++++++++++++++++++++++++++ > IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h | 19= +++++++++++++++++++ > IntelFsp2Pkg/IntelFsp2Pkg.dec | 12= ++++++++++-- > IntelFsp2Pkg/IntelFsp2Pkg.dsc | 4= ++++ > IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 50= ++++++++++++++++++++++++++++++++++++++++++++++++++ > IntelFsp2Pkg/Tools/SplitFspBin.py | 48= +++++++++++++++++++++++++----------------------- > 10 files changed, 440 insertions(+), 28 deletions(-) >=20 > diff --git a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c= b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c > new file mode 100644 > index 0000000000..1ab355085b > --- /dev/null > +++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c > @@ -0,0 +1,184 @@ > +/** @file > + Null instance of Platform Sec Lib. > + > + Copyright (c) 2022, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +EFI_STATUS > +EFIAPI > +FspMultiPhaseSwitchStack ( > + ) > +{ > + SetFspApiReturnStatus (EFI_SUCCESS); > + Pei2LoaderSwitchStack (); > + > + return EFI_SUCCESS; > +} > + > +EFI_STATUS > +EFIAPI > +FspVariableRequestSwitchStack ( > + IN FSP_MULTI_PHASE_VARIABLE_REQUEST_INFO_PARAMS *FspVariableRequestPa= rams > + ) > +{ > + FSP_GLOBAL_DATA *FspData; > + > + FspData =3D GetFspGlobalDataPointer (); > + if (((UINTN)FspData =3D=3D 0) || ((UINTN)FspData =3D=3D 0xFFFFFFFF)) { > + return EFI_UNSUPPORTED; > + } > + > + FspData->VariableRequestParameterPtr =3D (VOID *)FspVariableRequestPar= ams; > + SetFspApiReturnStatus (FSP_STATUS_VARIABLE_REQUEST); > + Pei2LoaderSwitchStack (); > + > + return EFI_SUCCESS; > +} > + > +/** > + This function supports FspMultiPhase implementation. > + > + @param[in] ApiIdx Internal index of the FSP API. > + @param[in] ApiParam Parameter of the FSP API. > + > + @retval EFI_SUCCESS FSP execution was successful. > + @retval EFI_INVALID_PARAMETER Input parameters are invalid. > + @retval EFI_UNSUPPORTED The FSP calling conditions were no= t met. > + @retval EFI_DEVICE_ERROR FSP initialization failed. > +**/ > +EFI_STATUS > +EFIAPI > +FspMultiPhaseWorker ( > + IN UINT32 ApiIdx, > + IN VOID *ApiParam > + ) > +{ > + FSP_MULTI_PHASE_PARAMS *FspMultiPhaseParams; > + FSP_GLOBAL_DATA *FspData; > + FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS *FspMultiPhaseGetNumber; > + BOOLEAN FspDataValid; > + UINT32 NumberOfPhasesSupported; > + > + FspDataValid =3D TRUE; > + FspData =3D GetFspGlobalDataPointer (); > + if (((UINTN)FspData =3D=3D 0) || ((UINTN)FspData =3D=3D 0xFFFFFFFF)) { > + FspDataValid =3D FALSE; > + } > + > + // > + // It is required that FspData->NumberOfPhases to be reset to 0 after > + // current FSP component finished. > + // The next component FspData->NumberOfPhases will only be re-initiali= zed when FspData->NumberOfPhases =3D 0 > + // > + if ((FspDataValid =3D=3D TRUE) && (FspData->NumberOfPhases =3D=3D 0)) = { > + FspData->NumberOfPhases =3D PcdGet32 (PcdMultiPhaseNumberOfPhases); > + FspData->PhasesExecuted =3D 0; > + if (FspMultiPhasePlatformGetNumberOfPhases (ApiIdx, &NumberOfPhasesS= upported) =3D=3D TRUE) { > + // > + // Platform has implemented runtime controling for NumberOfPhasesS= upported > + // > + FspData->NumberOfPhases =3D NumberOfPhasesSupported; > + } > + } > + > + FspMultiPhaseParams =3D (FSP_MULTI_PHASE_PARAMS *)ApiParam; > + > + if (FspDataValid =3D=3D FALSE) { > + return EFI_DEVICE_ERROR; > + } else { > + switch (FspMultiPhaseParams->MultiPhaseAction) { > + case EnumMultiPhaseGetNumberOfPhases: > + if ((FspMultiPhaseParams->MultiPhaseParamPtr =3D=3D NULL) || (Fs= pMultiPhaseParams->PhaseIndex !=3D 0)) { > + return EFI_INVALID_PARAMETER; > + } > + > + FspMultiPhaseGetNumber =3D (FSP_MULTI_PHASE_GET_= NUMBER_OF_PHASES_PARAMS *)FspMultiPhaseParams->MultiPhaseParamPtr; > + FspMultiPhaseGetNumber->NumberOfPhases =3D FspData->NumberOfPhas= es; > + FspMultiPhaseGetNumber->PhasesExecuted =3D FspData->PhasesExecut= ed; > + break; > + > + case EnumMultiPhaseExecutePhase: > + if ((FspMultiPhaseParams->PhaseIndex > FspData->PhasesExecuted) = && (FspMultiPhaseParams->PhaseIndex <=3D FspData->NumberOfPhases)) { > + FspData->PhasesExecuted =3D FspMultiPhaseParams->PhaseIndex; > + return Loader2PeiSwitchStack (); > + } else { > + return EFI_INVALID_PARAMETER; > + } > + > + break; > + > + case EnumMultiPhaseGetVariableRequestInfo: > + // > + // return variable request info > + // > + FspMultiPhaseParams->MultiPhaseParamPtr =3D FspData->VariableReq= uestParameterPtr; > + break; > + > + case EnumMultiPhaseCompleteVariableRequest: > + // > + // retrieve complete variable request params > + // > + FspData->VariableRequestParameterPtr =3D FspMultiPhaseParams->Mu= ltiPhaseParamPtr; > + return Loader2PeiSwitchStack (); > + break; > + > + default: > + return EFI_UNSUPPORTED; > + } > + } > + > + return EFI_SUCCESS; > +} > + > +/** > + This function handles FspMultiPhaseMemInitApi. > + > + @param[in] ApiIdx Internal index of the FSP API. > + @param[in] ApiParam Parameter of the FSP API. > + > + @retval EFI_SUCCESS FSP execution was successful. > + @retval EFI_INVALID_PARAMETER Input parameters are invalid. > + @retval EFI_UNSUPPORTED The FSP calling conditions were no= t met. > + @retval EFI_DEVICE_ERROR FSP initialization failed. > +**/ > +EFI_STATUS > +EFIAPI > +FspMultiPhaseMemInitApiHandler ( > + IN UINT32 ApiIdx, > + IN VOID *ApiParam > + ) > +{ > + return FspMultiPhaseWorker (ApiIdx, ApiParam); > +} > + > +/** > + This function handles FspMultiPhaseSiInitApi. > + > + @param[in] ApiIdx Internal index of the FSP API. > + @param[in] ApiParam Parameter of the FSP API. > + > + @retval EFI_SUCCESS FSP execution was successful. > + @retval EFI_INVALID_PARAMETER Input parameters are invalid. > + @retval EFI_UNSUPPORTED The FSP calling conditions were no= t met. > + @retval EFI_DEVICE_ERROR FSP initialization failed. > +**/ > +EFI_STATUS > +EFIAPI > +FspMultiPhaseSiInitApiHandlerV2 ( > + IN UINT32 ApiIdx, > + IN VOID *ApiParam > + ) > +{ > + return FspMultiPhaseWorker (ApiIdx, ApiParam); > +} > diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLib= Null.c b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c > index a6f3892ed8..27b2e75d1d 100644 > --- a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c > +++ b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c > @@ -28,6 +28,7 @@ FspUpdSignatureCheck ( > =20 > /** > This function handles FspMultiPhaseSiInitApi. > + Starting from FSP 2.4 this funciton is obsolete and FspMultiPhaseSiIni= tApiHandlerV2 is the replacement. Spelling error here. " funciton" should be " function". > =20 > @param[in] ApiIdx Internal index of the FSP API. > @param[in] ApiParam Parameter of the FSP API. > @@ -42,3 +43,32 @@ FspMultiPhaseSiInitApiHandler ( > { > return EFI_SUCCESS; > } > + > +/** > + FSP MultiPhase Platform cnotrol function. Spelling error here. "cnotrol" should be "control". > + Certain phases may depend on feature enabling or disabling which will = be controlled by Platform. I would recommend a more descriptive comment here. Perhaps something like t= his: FSP MultiPhase Platform Get Number Of Phases Function. Allows an FSP binary to dynamically update the number of phases at runtime. For example, UPD settings could negate the need to enter the multi-phase flow in certain scenarios. If this function returns FALSE, the default numb= er of phases provided by PcdMultiPhaseNumberOfPhases will be returned to the bootloader instead. > + > + @param[in] ApiIdx - Internal index of the FSP API. > + @param[in] NumberOfPhasesSupported - How many phases are supported by = current FSP Component. > + > + @retval TRUE - NumberOfPhases are modified by Platform during runtim= e. > + @retval FALSE - The Default build time NumberOfPhases should be used. > + > +**/ > +BOOLEAN > +EFIAPI > +FspMultiPhasePlatformGetNumberOfPhases ( > + IN UINT8 ApiIdx, > + IN OUT UINT32 *NumberOfPhasesSupported > + ) > +{ > + /* Example for platform runtime controling > + if ((ApiIdx =3D=3D FspMultiPhaseSiInitApiIndex) && (Feature1Enable =3D= =3D FALSE)) { > + *NumberOfPhasesSupported =3D 0; > + return TRUE; > + } > + return FALSE > + */ > + > + return FALSE; > +} > diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/= FspEas/FspApi.h > index 361e916b5f..af42d7f707 100644 > --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h > +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h > @@ -487,10 +487,38 @@ typedef struct { > /// Action definition for FspMultiPhaseSiInit API > /// > typedef enum { > - EnumMultiPhaseGetNumberOfPhases =3D 0x0, > - EnumMultiPhaseExecutePhase =3D 0x1 > + EnumMultiPhaseGetNumberOfPhases =3D 0x0, > + EnumMultiPhaseExecutePhase =3D 0x1, > + EnumMultiPhaseGetVariableRequestInfo =3D 0x2, > + EnumMultiPhaseCompleteVariableRequest =3D 0x3 > } FSP_MULTI_PHASE_ACTION; > =20 > +typedef enum { > + EnumFspVariableRequestGetVariable =3D 0x0, > + EnumFspVariableRequestGetNextVariableName =3D 0x1, > + EnumFspVariableRequestSetVariable =3D 0x2, > + EnumFspVariableRequestQueryVariableInfo =3D 0x3 > +} FSP_VARIABLE_REQUEST_TYPE; > + > +#pragma pack(16) > +typedef struct { > + IN FSP_VARIABLE_REQUEST_TYPE VariableRequest; > + IN OUT CHAR16 *VariableName; > + IN OUT UINT64 *VariableNameSize; > + IN OUT EFI_GUID *VariableGuid; > + IN OUT UINT32 *Attributes; > + IN OUT UINT64 *DataSize; > + IN OUT VOID *Data; > + OUT UINT64 *MaximumVariableStorageSize; > + OUT UINT64 *RemainingVariableStorageSize; > + OUT UINT64 *MaximumVariableSize; > +} FSP_MULTI_PHASE_VARIABLE_REQUEST_INFO_PARAMS; > + > +typedef struct { > + EFI_STATUS VariableRequestStatus; > +} FSP_MULTI_PHASE_COMPLETE_VARIABLE_REQUEST_PARAMS; > +#pragma pack() > + > /// > /// Data structure returned by FSP when bootloader calling > /// FspMultiPhaseSiInit API with action 0 (EnumMultiPhaseGetNumberOfPhas= es) > @@ -690,4 +718,34 @@ EFI_STATUS > IN VOID *FspiUpdDataPtr > ); > =20 > +/** > + This FSP API provides multi-phase memory and silicon initialization, w= hich brings greater modularity to the existing > + FspMemoryInit() and FspSiliconInit() API. Increased modularity is achi= eved by adding an extra API to FSP-M and FSP-S. > + This allows the bootloader to add board specific initialization steps = throughout the MemoryInit and SiliconInit flows as needed. > + The FspMemoryInit() API is always called before FspMultiPhaseMemInit()= ; it is the first phase of memory initialization. Similarly, > + the FspSiliconInit() API is always called before FspMultiPhaseSiInit()= ; it is the first phase of silicon initialization. > + After the first phase, subsequent phases are invoked by calling the Fs= pMultiPhaseMem/SiInit() API. > + The FspMultiPhaseMemInit() API may only be called after the FspMemoryI= nit() API and before the FspSiliconInit() API; > + or in the case that FSP-T is being used, before the TempRamExit() API.= The FspMultiPhaseSiInit() API may only be called after > + the FspSiliconInit() API and before NotifyPhase() API; or in the case = that FSP-I is being used, before the FspSmmInit() API. > + The multi-phase APIs may not be called at any other time. > + > + @param[in,out] FSP_MULTI_PHASE_PARAMS For action - EnumMultiPhaseGet= NumberOfPhases: > + FSP_MULTI_PHASE_PARAMS->Mult= iPhaseParamPtr will contain > + how many phases supported by= FSP. > + For action - EnumMultiPhaseExe= cutePhase: > + FSP_MULTI_PHASE_PARAMS->Mult= iPhaseParamPtr shall be NULL. > + @retval EFI_SUCCESS FSP execution environment was = initialized successfully. > + @retval EFI_INVALID_PARAMETER Input parameters are invalid. > + @retval EFI_UNSUPPORTED The FSP calling conditions wer= e not met. > + @retval EFI_DEVICE_ERROR FSP initialization failed. > + @retval FSP_STATUS_RESET_REQUIRED_* A reset is required. These sta= tus codes will not be returned during S3. > + @retval FSP_STATUS_VARIABLE_REQUEST A variable request has been ma= de by FSP that needs boot loader handling. > +**/ > +typedef > +EFI_STATUS > +(EFIAPI *FSP_MULTI_PHASE_INIT)( > + IN FSP_MULTI_PHASE_PARAMS *MultiPhaseInitParamPtr > + ); > + > #endif > diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/= FspGlobalData.h > index 32c6d460e4..81813df3ce 100644 > --- a/IntelFsp2Pkg/Include/FspGlobalData.h > +++ b/IntelFsp2Pkg/Include/FspGlobalData.h > @@ -12,7 +12,7 @@ > =20 > #define FSP_IN_API_MODE 0 > #define FSP_IN_DISPATCH_MODE 1 > -#define FSP_GLOBAL_DATA_VERSION 0x2 > +#define FSP_GLOBAL_DATA_VERSION 0x3 > =20 > #pragma pack(1) > =20 > @@ -25,6 +25,7 @@ typedef enum { > FspSiliconInitApiIndex, > FspMultiPhaseSiInitApiIndex, > FspSmmInitApiIndex, > + FspMultiPhaseMemInitApiIndex, > FspApiIndexMax > } FSP_API_INDEX; > =20 > @@ -82,6 +83,8 @@ typedef struct { > VOID *FunctionParameterPtr; > FSP_INFO_HEADER *FspInfoHeader; > VOID *UpdDataPtr; > + VOID *FspHobListPtr; > + VOID *VariableRequestParameterPtr; > /// > /// End of UINTN and pointer section > /// At this point, next field offset must be either *0h or *8h to > diff --git a/IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h b/IntelFsp2P= kg/Include/Library/FspMultiPhaseLib.h > new file mode 100644 > index 0000000000..7ac4e197d9 > --- /dev/null > +++ b/IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h > @@ -0,0 +1,54 @@ > +/** @file > + > + Copyright (c) 2022, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#ifndef _FSP_SEC_PLATFORM_LIB_H_ > +#define _FSP_SEC_PLATFORM_LIB_H_ > + > +EFI_STATUS > +EFIAPI > +FspMultiPhaseSwitchStack ( > + ); > + > +EFI_STATUS > +EFIAPI > +FspVariableRequestSwitchStack ( > + IN FSP_MULTI_PHASE_VARIABLE_REQUEST_INFO_PARAMS *FspVariableRequestPa= rams > + ); > + > +/** > + This function handles FspMultiPhaseMemInitApi. > + > + @param[in] ApiIdx Internal index of the FSP API. > + @param[in] ApiParam Parameter of the FSP API. > + > + @retval EFI_SUCCESS FSP execution was successful. > + @retval EFI_INVALID_PARAMETER Input parameters are invalid. > + @retval EFI_UNSUPPORTED The FSP calling conditions were no= t met. > + @retval EFI_DEVICE_ERROR FSP initialization failed. > +**/ > +EFI_STATUS > +EFIAPI > +FspMultiPhaseMemInitApiHandler ( > + IN UINT32 ApiIdx, > + IN VOID *ApiParam > + ); > + > +/** > + This function handles FspMultiPhaseSiInitApi. > + > + @param[in] ApiIdx Internal index of the FSP API. > + @param[in] ApiParam Parameter of the FSP API. > + > +**/ > +EFI_STATUS > +EFIAPI > +FspMultiPhaseSiInitApiHandlerV2 ( > + IN UINT32 ApiIdx, > + IN VOID *ApiParam > + ); > + > +#endif > diff --git a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h b/IntelFsp2= Pkg/Include/Library/FspSecPlatformLib.h > index 920115e90e..236ce804c5 100644 > --- a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h > +++ b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h > @@ -81,6 +81,7 @@ FspUpdSignatureCheck ( > =20 > /** > This function handles FspMultiPhaseSiInitApi. > + Starting from FSP 2.4 this funciton is obsolete and FspMultiPhaseSiIni= tApiHandlerV2 is the replacement. Spelling error here. "funciton" should be " function". > =20 > @param[in] ApiIdx Internal index of the FSP API. > @param[in] ApiParam Parameter of the FSP API. > @@ -93,4 +94,22 @@ FspMultiPhaseSiInitApiHandler ( > IN VOID *ApiParam > ); > =20 > +/** > + FSP MultiPhase Platform cnotrol function. Spelling error here. "cnotrol" should be "control". > + Certain phases may depend on feature enabling or disabling which will = be controlled by Platform. I would recommend a more descriptive comment here. Perhaps something like t= his: FSP MultiPhase Platform Get Number Of Phases Function. Allows an FSP binary to dynamically update the number of phases at runtime. For example, UPD settings could negate the need to enter the multi-phase flow in certain scenarios. If this function returns FALSE, the default numb= er of phases provided by PcdMultiPhaseNumberOfPhases will be returned to the bootloader instead. > + > + @param[in] ApiIdx - Internal index of the FSP API. > + @param[in] NumberOfPhasesSupported - How many phases are supported by = current FSP Component. > + > + @retval TRUE - NumberOfPhases are modified by Platform during runtim= e. > + @retval FALSE - The Default build time NumberOfPhases should be used. > + > +**/ > +BOOLEAN > +EFIAPI > +FspMultiPhasePlatformGetNumberOfPhases ( > + IN UINTN ApiIdx, > + IN OUT UINT32 *NumberOfPhasesSupported > + ); > + > #endif > diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dec b/IntelFsp2Pkg/IntelFsp2Pkg.de= c > index 2d3eb708b9..d1c3d3ee7b 100644 > --- a/IntelFsp2Pkg/IntelFsp2Pkg.dec > +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dec > @@ -37,6 +37,9 @@ > ## @libraryclass Provides FSP platform sec related actions. > FspSecPlatformLib|Include/Library/FspSecPlatformLib.h > =20 > + ## @libraryclass Provides FSP MultiPhase service functions. > + FspMultiPhaseLib|Include/Library/FspMultiPhaseLib.h > + > [Ppis] > # > # PPI to indicate FSP is ready to enter notify phase > @@ -112,5 +115,10 @@ > gIntelFsp2PkgTokenSpaceGuid.PcdFspPrivateTemporaryRamSize |0x00000000|= UINT32|0x10000006 > =20 > [PcdsFixedAtBuild,PcdsDynamic,PcdsDynamicEx] > - gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength |0x00100000|UIN= T32|0x46530000 > - gIntelFsp2PkgTokenSpaceGuid.PcdBootLoaderEntry |0xFFFFFFE4|UIN= T32|0x46530100 > + gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength |0x00100000|UI= NT32|0x46530000 > + gIntelFsp2PkgTokenSpaceGuid.PcdBootLoaderEntry |0xFFFFFFE4|UI= NT32|0x46530100 > + # > + # Different FSP Components may have different NumberOfPhases which can= be defined > + # by each FspSecCore module from DSC. > + # > + gIntelFsp2PkgTokenSpaceGuid.PcdMultiPhaseNumberOfPhases |0x00000000|UI= NT32|0x46530101 > diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.ds= c > index b2d7867880..0713f0028d 100644 > --- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc > +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc > @@ -45,6 +45,7 @@ > FspPlatformLib|IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatform= Lib.inf > FspSwitchStackLib|IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSw= itchStackLib.inf > FspSecPlatformLib|IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFsp= SecPlatformLibNull.inf > + FspMultiPhaseLib|IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMult= iPhaseLib.inf > =20 > [LibraryClasses.common.PEIM] > PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf > @@ -64,12 +65,15 @@ > IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf > IntelFsp2Pkg/Library/BaseDebugDeviceLibNull/BaseDebugDeviceLibNull.inf > IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull= .inf > + IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf > =20 > IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf > IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf > + IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf > IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf > IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf > IntelFsp2Pkg/FspSecCore/Fsp22SecCoreS.inf > + IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf > IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf > =20 > [PcdsFixedAtBuild.common] > diff --git a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseL= ib.inf b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf > new file mode 100644 > index 0000000000..a79f6aecda > --- /dev/null > +++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf > @@ -0,0 +1,50 @@ > +## @file > +# FSP MultiPhase Lib. > +# > +# Copyright (c) 2022, Intel Corporation. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +########################################################################= ######## > +# > +# Defines Section - statements that will be processed to create a Makefi= le. > +# > +########################################################################= ######## > +[Defines] > + INF_VERSION =3D 0x00010005 > + BASE_NAME =3D BaseFspMultiPhaseLib > + FILE_GUID =3D C128CADC-623E-4E41-97CB-A7138E62746= 0 > + MODULE_TYPE =3D SEC > + VERSION_STRING =3D 1.0 > + LIBRARY_CLASS =3D FspMultiPhaseLib > + > +# > +# The following information is for reference only and not required by th= e build tools. > +# > +# VALID_ARCHITECTURES =3D IA32 X64 > +# > + > +########################################################################= ######## > +# > +# Sources Section - list of files that are required for the build to suc= ceed. > +# > +########################################################################= ######## > + > +[Sources] > + FspMultiPhaseLib.c > + > +########################################################################= ######## > +# > +# Package Dependency Section - list of Package files that are required f= or > +# this module. > +# > +########################################################################= ######## > + > +[Packages] > + MdePkg/MdePkg.dec > + IntelFsp2Pkg/IntelFsp2Pkg.dec > + > +[Pcd] > + gIntelFsp2PkgTokenSpaceGuid.PcdMultiPhaseNumberOfPhases # CONSUMES > diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py b/IntelFsp2Pkg/Tools/Split= FspBin.py > index ddabab7d8c..419e5ba985 100644 > --- a/IntelFsp2Pkg/Tools/SplitFspBin.py > +++ b/IntelFsp2Pkg/Tools/SplitFspBin.py > @@ -103,29 +103,31 @@ class FSP_COMMON_HEADER(Structure): > =20 > class FSP_INFORMATION_HEADER(Structure): > _fields_ =3D [ > - ('Signature', ARRAY(c_char, 4)), > - ('HeaderLength', c_uint32), > - ('Reserved1', c_uint16), > - ('SpecVersion', c_uint8), > - ('HeaderRevision', c_uint8), > - ('ImageRevision', c_uint32), > - ('ImageId', ARRAY(c_char, 8)), > - ('ImageSize', c_uint32), > - ('ImageBase', c_uint32), > - ('ImageAttribute', c_uint16), > - ('ComponentAttribute', c_uint16), > - ('CfgRegionOffset', c_uint32), > - ('CfgRegionSize', c_uint32), > - ('Reserved2', c_uint32), > - ('TempRamInitEntryOffset', c_uint32), > - ('Reserved3', c_uint32), > - ('NotifyPhaseEntryOffset', c_uint32), > - ('FspMemoryInitEntryOffset', c_uint32), > - ('TempRamExitEntryOffset', c_uint32), > - ('FspSiliconInitEntryOffset', c_uint32), > - ('FspMultiPhaseSiInitEntryOffset', c_uint32), > - ('ExtendedImageRevision', c_uint16), > - ('Reserved4', c_uint16) > + ('Signature', ARRAY(c_char, 4)), > + ('HeaderLength', c_uint32), > + ('Reserved1', c_uint16), > + ('SpecVersion', c_uint8), > + ('HeaderRevision', c_uint8), > + ('ImageRevision', c_uint32), > + ('ImageId', ARRAY(c_char, 8)), > + ('ImageSize', c_uint32), > + ('ImageBase', c_uint32), > + ('ImageAttribute', c_uint16), > + ('ComponentAttribute', c_uint16), > + ('CfgRegionOffset', c_uint32), > + ('CfgRegionSize', c_uint32), > + ('Reserved2', c_uint32), > + ('TempRamInitEntryOffset', c_uint32), > + ('Reserved3', c_uint32), > + ('NotifyPhaseEntryOffset', c_uint32), > + ('FspMemoryInitEntryOffset', c_uint32), > + ('TempRamExitEntryOffset', c_uint32), > + ('FspSiliconInitEntryOffset', c_uint32), > + ('FspMultiPhaseSiInitEntryOffset', c_uint32), > + ('ExtendedImageRevision', c_uint16), > + ('Reserved4', c_uint16), > + ('FspMultiPhaseMemInitEntryOffset', c_uint32), > + ('FspSmmInitEntryOffset', c_uint32) > ] > =20 > class FSP_PATCH_TABLE(Structure): > --=20 > 2.35.0.windows.1