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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Ajay, Looks like inf file is missing some dependencies (Libs and nasm file). Due = to this the code doesn't build after applying the patch. So, please fix this and resubmit the updated patch request. "C:\Program Files (x86)\Microsoft Visual Studio\2019\Professional\VC= \Tools\MSVC\14.29.30133\bin\Hostx86\x64\lib.exe" /NOLOGO /LTCG /OUT:c:\user= s\njayapra\github\edk2\Build\AppPkg\RELEASE_VS2019\X64\AppPkg\Applications\= Python\Python-3.6.8\Python368\OUTPUT\Python.lib @c:\users\njayapra\github\e= dk2\Build\AppPkg\RELEASE_VS2019\X64\AppPkg\Applications\Python\Python-3.6.8= \Python368\OUTPUT\object_files.lst "C:\Program Files (x86)\Microsoft Visual Studio\2019\Professional\V= C\Tools\MSVC\14.29.30133\bin\Hostx86\x64\link.exe" /OUT:c:\users\njayapra\g= ithub\edk2\Build\AppPkg\RELEASE_VS2019\X64\AppPkg\Applications\Python\Pytho= n-3.6.8\Python368\DEBUG\Python.dll /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNO= RE:4281 /IGNORE:4254 /OPT:REF /OPT:ICF=3D10 /MAP /ALIGN:32 /SECTION:.xdata,= D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:_ModuleEntryPoint /SUBSY= STEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=3D.d= ata /WHOLEARCHIVE @c:\users\njayapra\github\edk2\Build\AppPkg\RELEASE_VS20= 19\X64\AppPkg\Applications\Python\Python-3.6.8\Python368\OUTPUT\static_libr= ary_files.lst Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol PciR= ead8 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol PciW= rite8 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol PciR= ead16 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol PciW= rite16 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol PciR= ead32 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol PciW= rite32 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol IoRe= ad8 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol IoWr= ite8 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol IoRe= ad16 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol IoWr= ite16 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol IoRe= ad32 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol IoWr= ite32 Python.lib(edk2module.obj) : error LNK2001: unresolved external symbol _sws= mi c:\users\njayapra\github\edk2\Build\AppPkg\RELEASE_VS2019\X64\AppPkg\Applic= ations\Python\Python-3.6.8\Python368\DEBUG\Python.dll : fatal error LNK1120= : 13 unresolved externals NMAKE : fatal error U1077: '"C:\Program Files (x86)\Microsoft Visual Studio= \2019\Professional\VC\Tools\MSVC\14.29.30133\bin\Hostx86\x64\link.exe"' : r= eturn code '0x460' Stop. Regards, JP -----Original Message----- From: Kadapathri, Ajay =20 Sent: Monday, March 27, 2023 1:35 PM To: devel@edk2.groups.io Cc: Rebecca Cran ; Kinney, Michael D ; Jayaprakash, N Subject: [edk2-libc Patch 1/1] Python/Python3.6.8: migration of edk2module = from chipsec repo REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4161 This patch merges the enhancements done by chipsec tool to edk2 module into= edk2-libc repo. The chipsec enhancements can be used for various other Python based tools t= o access platform registers. These enhancements providing a set of APIs to access the platform registers= directly from the python scripts running on UEFI shell. This will benefit = the Python users on UEFI shell in general and enhances it's usability. Pyth= on can be used effectively to implement tools, scripts required for automat= ion, debug from UEFI shell. Cc: Rebecca Cran Cc: Michael D Kinney Cc: Jayaprakash N Signed-off-by: Ajay Kadapathri --- .../Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm | 63 +++ .../PyMod-3.6.8/Modules/cpu_gcc.s | 64 +++ .../PyMod-3.6.8/Modules/cpu_ia32.nasm | 35 ++ .../PyMod-3.6.8/Modules/cpu_ia32_gcc.s | 38 ++ .../PyMod-3.6.8/Modules/edk2module.c | 519 +++++++++++++++++- 5 files changed, 717 insertions(+), 2 deletions(-) create mode 100644 App= Pkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm create mode 100644 AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Mod= ules/cpu_gcc.s create mode 100644 AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Mod= ules/cpu_ia32.nasm create mode 100644 AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Mod= ules/cpu_ia32_gcc.s diff --git a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cp= u.nasm b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.na= sm new file mode 100644 index 0000000..bd50015 --- /dev/null +++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.na +++ sm @@ -0,0 +1,63 @@ +;---------------------------------------------------------------------- +-------- +; +; Copyright (c) 2011 - 2023, Intel Corporation. All rights=20 +reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module=20 +Name: +; +; cpu.nasm +; +; Abstract: +; +; swsmi function +; +; Notes: +; +;---------------------------------------------------------------------- +-------- + +DEFAULT REL +SECTION .text + +;---------------------------------------------------------------------- +-------- +; void +; _swsmi ( +; unsigned int smi_code_data // rcx +; IN UINT64 rax_value // rdx +; IN UINT64 rbx_value // r8 +; IN UINT64 rcx_value // r9 +; IN UINT64 rdx_value // rsp + 0x28 +; IN UINT64 rsi_value // rsp + 0x30 +; IN UINT64 rdi_value // rsp + 0x38 +; ) +;---------------------------------------------------------------------- +-------- +global ASM_PFX(_swsmi) +ASM_PFX(_swsmi): + push rbx + push rsi + push rdi + + ; rsp - 0x18 + + ; setting up GPR (arguments) to SMI handler call + ; notes: + ; RAX will get partially overwritten (AX) by _smi_code_data (which i= s passed in RCX) + ; RDX will get partially overwritten (DX) by the value of APMC port = (=3D 0x00B2) + mov rax, rdx ; rax_value + mov ax, cx ; smi_code_data + mov rdx, r10 ; rdx_value + mov rdx, [rsp + 040h] ; rsp + 0x28 + 0x18 + + mov rbx, r8 ; rbx_value + mov rcx, r9 ; rcx_value + mov rsi, [rsp + 048h] ; rsi_value + mov rdi, [rsp + 050h] ; rdi_value + + ; this OUT instruction will write WORD value (smi_code_data) to ports = 0xB2 and 0xB3 (SW SMI control and data ports) + out 0B2h, ax + + ; @TODO: some SM handlers return data/errorcode in GPRs, need to=20 + return this to the caller + + pop rdi + pop rsi + pop rbx + ret \ No newline at end of file diff --git a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cp= u_gcc.s b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_g= cc.s new file mode 100644 index 0000000..5441691 --- /dev/null +++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_gc +++ c.s @@ -0,0 +1,64 @@ +#---------------------------------------------------------------------- +-------- +# +# Copyright (c) 2011 - 2023, Intel Corporation. All rights=20 +reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent # # Module=20 +Name: +# +# cpu_gcc.s +# +# Abstract: +# +# swsmi function +# +# Notes: +# +#---------------------------------------------------------------------- +-------- + +.global _swsmi + +.intel_syntax noprefix +.text + +#---------------------------------------------------------------------- +-------- +# void +# _swsmi ( +# unsigned int smi_code_data // rcx +# IN UINT64 rax_value // rdx +# IN UINT64 rbx_value // r8 +# IN UINT64 rcx_value // r9 +# IN UINT64 rdx_value // rsp + 0x28 +# IN UINT64 rsi_value // rsp + 0x30 +# IN UINT64 rdi_value // rsp + 0x38 +# ) +#---------------------------------------------------------------------- +-------- +_swsmi: + push rbx + push rsi + push rdi + + # rsp - 0x18 + + # setting up GPR (arguments) to SMI handler call + # notes: + # RAX will get partially overwritten (AX) by _smi_code_data (which i= s passed in RCX) + # RDX will get partially overwritten (DX) by the value of APMC port = (=3D 0x00B2) + mov rax, rdx # rax_value + mov ax, cx # smi_code_data + mov rdx, r10 # rdx_value + mov rdx, [rsp + 0x040] # rsp + 0x28 + 0x18 + + mov rbx, r8 # rbx_value + mov rcx, r9 # rcx_value + mov rsi, [rsp + 0x048] # rsi_value + mov rdi, [rsp + 0x050] # rdi_value + + # this OUT instruction will write WORD value (smi_code_data) to ports = 0xB2 and 0xB3 (SW SMI control and data ports) + out 0x0B2, ax + + # @TODO: some SM handlers return data/errorcode in GPRs, need to=20 + return this to the caller + + pop rdi + pop rsi + pop rbx + ret \ No newline at end of file diff --git a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cp= u_ia32.nasm b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/c= pu_ia32.nasm new file mode 100644 index 0000000..790b923 --- /dev/null +++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_ia +++ 32.nasm @@ -0,0 +1,35 @@ +;---------------------------------------------------------------------- +-------- +; +; Copyright (c) 2011 - 2023, Intel Corporation. All rights=20 +reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module=20 +Name: +; +; cpu_ia32.nasm +; +; Abstract: +; +; swsmi function +; +; Notes: +; +;---------------------------------------------------------------------- +-------- + +SECTION .text + +;---------------------------------------------------------------------- +-------- +; void +; _swsmi ( +; unsigned int smi_code_data // rcx +; IN UINT32 rax_value // rdx +; IN UINT32 rbx_value // r8 +; IN UINT32 rcx_value // r9 +; IN UINT32 rdx_value // r10 +; IN UINT32 rsi_value // r11 +; IN UINT32 rdi_value // r12 +; ) +;---------------------------------------------------------------------- +-------- +global ASM_PFX(_swsmi) +ASM_PFX(_swsmi): + xor eax, eax + ret \ No newline at end of file diff --git a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cp= u_ia32_gcc.s b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/= cpu_ia32_gcc.s new file mode 100644 index 0000000..35e883b --- /dev/null +++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_ia +++ 32_gcc.s @@ -0,0 +1,38 @@ +#---------------------------------------------------------------------- +-------- +# +# Copyright (c) 2011 - 2023, Intel Corporation. All rights=20 +reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent # # Module=20 +Name: +# +# cpu_ia32_gcc.s +# +# Abstract: +# +# swsmi function +# +# Notes: +# +#---------------------------------------------------------------------- +-------- + +.global _swsmi + + +.intel_syntax noprefix +.text + +#---------------------------------------------------------------------- +-------- +# void +# _swsmi ( +# unsigned int smi_code_data // rcx +# IN UINT32 rax_value // rdx +# IN UINT32 rbx_value // r8 +# IN UINT32 rcx_value // r9 +# IN UINT32 rdx_value // r10 +# IN UINT32 rsi_value // r11 +# IN UINT32 rdi_value // r12 +# ) +#---------------------------------------------------------------------- +-------- +_swsmi: + xor eax, eax + ret diff --git a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/ed= k2module.c b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/ed= k2module.c index 0501a2b..4c400b9 100644 --- a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2modul= e.c +++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2mo +++ dule.c @@ -3,7 +3,7 @@ Derived from posixmodule.c in Python 2.7.2. =20 Copyright (c) 2015, Daryl McDaniel. All rights reserved.
- Copyright (c) 2011 - 2021, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2023, Intel Corporation. All rights=20 + reserved.
This program and the accompanying materials are licensed and made avai= lable under the terms and conditions of the BSD License that accompanies this dist= ribution. The full text of the license may be found at @@ -23,12 +23,20 @@ #inc= lude #include #include +#include +#include #include =20 #ifdef __cplusplus extern "C" { #endif =20 +PyTypeObject EfiGuidType; + +extern void _swsmi( unsigned int smi_code_data, unsigned int rax_value,=20 +unsigned int rbx_value, unsigned int rcx_value, unsigned int rdx_value,=20 +unsigned int rsi_value, unsigned int rdi_value ); // -- Support=20 +routines EFI_STATUS GuidToStr( IN EFI_GUID *guid, IN OUT UINT8=20 +*str_buffer ); + PyDoc_STRVAR(edk2__doc__, "This module provides access to UEFI firmware functionality t= hat is\n\ standardized by the C Standard and the POSIX standard (a thin= ly\n\ @@ -3800,6 +3808,497 @@ edk2_abort(PyObject *self, PyObject *noargs) return NULL; } =20 +unsigned int ReadPCICfg( + unsigned char bus, + unsigned char dev, + unsigned char fun, + unsigned char off, + unsigned char len // 1, 2, 4 bytes + ) +{ + unsigned int result =3D 0; + + if (1 =3D=3D len) result =3D PciRead8(PCI_LIB_ADDRESS(bus, dev, fun, off= )); + else if (2 =3D=3D len) result =3D PciRead16(PCI_LIB_ADDRESS(bus, dev, fu= n,=20 +off)); + else if (4 =3D=3D len) result =3D PciRead32(PCI_LIB_ADDRESS(bus, dev, fu= n,=20 +off)); + return result; +} + +void WritePCICfg( + unsigned char bus, + unsigned char dev, + unsigned char fun, + unsigned char off, + unsigned char len, // 1, 2, 4 bytes + unsigned int val + ) +{ + if (1 =3D=3D len) PciWrite8(PCI_LIB_ADDRESS(bus, dev, fun, off), (val &= =20 +0xFF)); + else if (2 =3D=3D len) PciWrite16(PCI_LIB_ADDRESS(bus, dev, fun, off),=20 +(val & 0xFFFF)); + else if (4 =3D=3D len) PciWrite32(PCI_LIB_ADDRESS(bus, dev, fun, off),=20 +val); } + +PyDoc_STRVAR(efi_rdmsr__doc__, +"rdmsr(ecx) -> (eax,edx)\n\ +Read the given MSR."); + +static PyObject * +edk2_rdmsr(PyObject *self, PyObject *args) { + unsigned int vecx, veax, vedx; + UINT64 data =3D 0; + if (!PyArg_ParseTuple(args, "I", &vecx)) + return NULL; + Py_BEGIN_ALLOW_THREADS + data =3D AsmReadMsr64(vecx); + Py_END_ALLOW_THREADS + veax =3D (UINT32)data; + vedx =3D (UINT64)data >> 32; + return Py_BuildValue("(II)", (unsigned long)veax, (unsigned=20 +long)vedx); } + +PyDoc_STRVAR(efi_wrmsr__doc__, +"wrmsr(ecx, eax, edx) -> None\n\ +Write edx:eax to the given MSR."); + +static PyObject * +edk2_wrmsr(PyObject *self, PyObject *args) { + unsigned int vecx, veax, vedx; + UINT64 data =3D 0; + if (!PyArg_ParseTuple(args, "III", &vecx, &veax, &vedx)) + return NULL; + data =3D vedx << 32 | veax; + Py_BEGIN_ALLOW_THREADS + AsmWriteMsr64(vecx, data); + Py_END_ALLOW_THREADS + Py_INCREF(Py_None); + return Py_None; +} + +PyDoc_STRVAR(efi_swsmi__doc__, +"swsmi(smi_code_data, rax_value, rbx_value, rcx_value, rdx_value,=20 +rsi_value, rdi_value) -> None\n\ Triggering Software SMI"); + +static PyObject * +posix_swsmi(PyObject *self, PyObject *args) { + unsigned int smi_code_data, rax_value, rbx_value, rcx_value,=20 +rdx_value, rsi_value, rdi_value; + if (!PyArg_Parse(args, "(IIIIIII)", &smi_code_data, &rax_value, &rbx_val= ue, &rcx_value, &rdx_value, &rsi_value, &rdi_value)) + return NULL; + Py_BEGIN_ALLOW_THREADS + _swsmi( smi_code_data, rax_value, rbx_value, rcx_value, rdx_value,=20 +rsi_value, rdi_value ); + Py_END_ALLOW_THREADS + Py_INCREF(Py_None); + return Py_None; +} + +PyDoc_STRVAR(efi_cpuid__doc__, +"cpuid(eax, ecx) -> (eax:ebx:ecx:edx)\n\ Read the CPUID.";); + +static PyObject * +edk2_cpuid(PyObject *self, PyObject *args) { + UINT32 eax, ecx, rax_value, rbx_value, rcx_value, rdx_value; + if (!PyArg_ParseTuple(args, "II", &eax, &ecx)) + return NULL; + Py_BEGIN_ALLOW_THREADS + AsmCpuidEx( eax, ecx, &rax_value, &rbx_value, &rcx_value, &rdx_value); + Py_END_ALLOW_THREADS + return Py_BuildValue("(IIII))", (unsigned long)rax_value, =20 +(unsigned long)rbx_value, (unsigned long)rcx_value, (unsigned=20 +long)rdx_value); } + +PyDoc_STRVAR(efi_allocphysmem__doc__, +"allocphysmem(length, max_pa) -> (va)\n\ Use malloc to allocate space=20 +in memory.";); + +static PyObject * +posix_allocphysmem(PyObject *self, PyObject *args) { + unsigned int length, max_pa; + void *va; + if (!PyArg_ParseTuple(args, "II", &length, &max_pa)) + return NULL; + =20 + Py_BEGIN_ALLOW_THREADS + va =3D malloc(length); + Py_END_ALLOW_THREADS + + // return Py_BuildValue("(K)", (unsigned long)va); + return Py_BuildValue("(I)", (unsigned long)va); } + +PyDoc_STRVAR(efi_readio__doc__, +"readio(addr, size) -> (int)\n\ +Read the value (size =3D=3D 1, 2, or 4 bytes) of the specified IO port."); + +static PyObject * +edk2_readio(PyObject *self, PyObject *args) { + unsigned int addr, sz, result; + short addrs; + + if (!PyArg_ParseTuple(args, "II", &addr, &sz)) + return NULL; + + Py_BEGIN_ALLOW_THREADS + result =3D 0; + addrs =3D (short)(addr & 0xffff); + if (1 =3D=3D sz) result =3D (IoRead8(addrs) & 0xFF); + else if (2 =3D=3D sz) result =3D (IoRead16(addrs) & 0xFFFF); + else if (4 =3D=3D sz) result =3D IoRead32(addrs); + Py_END_ALLOW_THREADS + return PyLong_FromUnsignedLong((unsigned long)result); } + +PyDoc_STRVAR(efi_writeio__doc__, +"writeio(addr, size, value) -> None\n\ +Write the value (size =3D=3D 1, 2, or 4 bytes) of the specified IO port.")= ; + +static PyObject * +edk2_writeio(PyObject *self, PyObject *args) { + unsigned int addr, sz, value; + short addrs; + + if (!PyArg_ParseTuple(args, "III", &addr, &sz, &value)) + return NULL; + + Py_BEGIN_ALLOW_THREADS + addrs =3D (short)(addr & 0xffff); + if (1 =3D=3D sz) IoWrite8((unsigned char)(value & 0xFF), addrs); else i= f=20 + (2 =3D=3D sz) IoWrite16((unsigned short)(value & 0xFFFF), addrs); else i= f=20 + (4 =3D=3D sz) IoWrite32(value, addrs); Py_END_ALLOW_THREADS + + Py_INCREF(Py_None); + return Py_None; +} + +PyDoc_STRVAR(efi_readpci__doc__, +"readpci(bus,dev,func,addr,size) -> (int)\n\ Read the value (size =3D=3D 1= ,=20 +2, or 4 bytes) of the specified PCI b/d/f."); + +static PyObject * +edk2_readpci(PyObject *self, PyObject *args) { + unsigned int bus, dev, func, off, sz, result; + + if (!PyArg_ParseTuple(args, "IIIII", &bus, &dev, &func, &off, &sz)) + return NULL; + + Py_BEGIN_ALLOW_THREADS + result =3D ReadPCICfg( bus, dev, func, off, sz ); Py_END_ALLOW_THREADS + + return PyLong_FromUnsignedLong((unsigned long)result); } + +PyDoc_STRVAR(efi_writepci__doc__, +"writepci(bus,dev,func,addr,value,len) -> None\n\ Write the value to=20 +the specified PCI b/d/f. Len is value size (either 1, 2, or 4=20 +bytes)."); + +static PyObject * +edk2_writepci(PyObject *self, PyObject *args) { + unsigned int bus, dev, func, off, val, len; + + if (!PyArg_ParseTuple(args, "IIIIII", &bus, &dev, &func, &off, &val, &le= n)) + return NULL; + + Py_BEGIN_ALLOW_THREADS + WritePCICfg( bus, dev, func, off, len, val ); Py_END_ALLOW_THREADS + + Py_INCREF(Py_None); + return Py_None; +} + +PyDoc_STRVAR(efi_readmem__doc__, +"readmem(addr_lo, addr_hi, len) -> ByteString\n\ Read the given memory=20 +address."); + +static PyObject * +posix_readmem(PyObject *self, PyObject *args) { + PyObject *data; + UINT32 addr_lo, addr_hi; + char *buffer, *cbuffer, *addr; + int len, index; + + if (!PyArg_ParseTuple(args, "III", &addr_lo, &addr_hi, &len)) + return NULL; + +#ifdef MDE_CPU_X64 + addr =3D (unsigned char*)((UINT64)addr_lo | ((UINT64)addr_hi << 32));=20 +#else + addr =3D (unsigned char*)addr_lo; +#endif + + buffer =3D malloc(len); + if (buffer =3D=3D NULL) + return NULL; + + cbuffer =3D buffer; + index =3D len; + + Py_BEGIN_ALLOW_THREADS + + while(index--){ + *cbuffer =3D *addr; + cbuffer++; + addr++; + } + + Py_END_ALLOW_THREADS + =20 + data =3D Py_BuildValue("y#", buffer, len); free(buffer); + + return data; +} + +PyDoc_STRVAR(efi_readmem_dword__doc__, +"readmem_dword(addr_lo, addr_hi) -> (int32)\n\ Read the given memory=20 +address and return 32-bit value."); + +static PyObject * +posix_readmem_dword(PyObject *self, PyObject *args) { + unsigned int result, *addr; + UINT32 addr_lo, addr_hi; + + if (!PyArg_ParseTuple(args, "II", &addr_lo, &addr_hi)) + return NULL; + +#ifdef MDE_CPU_X64 + addr =3D (unsigned int*)((UINT64)addr_lo | ((UINT64)addr_hi << 32));=20 +#else + addr =3D (unsigned int*)addr_lo; +#endif + + Py_BEGIN_ALLOW_THREADS + result =3D *addr; + Py_END_ALLOW_THREADS + + return PyLong_FromUnsignedLong((unsigned long)result); } + +PyDoc_STRVAR(efi_writemem__doc__, +"writemem(addr_lo, addr_hi, buf) -> None\n\ Write the buf (PyString) to=20 +the given memory address."); + +static PyObject * +posix_writemem(PyObject *self, PyObject *args) { + char *buf, *addr; + int len; + UINT32 addr_lo, addr_hi; + + if (!PyArg_ParseTuple(args, "IIs#", &addr_lo, &addr_hi, &buf, &len)) + return NULL; + +#ifdef MDE_CPU_X64 + addr =3D (unsigned char*)((UINT64)addr_lo | ((UINT64)addr_hi << 32));=20 +#else + addr =3D (unsigned char*)addr_lo; +#endif + + Py_BEGIN_ALLOW_THREADS + while(len--){ + *addr =3D *buf; + buf++; + addr++; + } + Py_END_ALLOW_THREADS + + Py_INCREF(Py_None); + return Py_None; +} + +PyDoc_STRVAR(efi_writemem_dword__doc__, +"writemem_dword(addr_lo, addr_hi, val) -> None\n\ Write the 32-bit=20 +value to the given memory address."); + +static PyObject * +posix_writemem_dword(PyObject *self, PyObject *args) { + unsigned int *addr, val; + UINT32 addr_lo, addr_hi; + + if (!PyArg_ParseTuple(args, "III", &addr_lo, &addr_hi, &val)) + return NULL; + +#ifdef MDE_CPU_X64 + addr =3D (unsigned int*)((UINT64)addr_lo | ((UINT64)addr_hi << 32));=20 +#else + addr =3D (unsigned int*)addr_lo; +#endif + + Py_BEGIN_ALLOW_THREADS + *addr =3D val; + Py_END_ALLOW_THREADS + + Py_INCREF(Py_None); + return Py_None; +} + +PyDoc_STRVAR(MiscRT_GetVariable__doc__, +"(Status, Attributes, Data, DataSize) =3D GetVariable(VariableName, GUID,= =20 +DataSize)\n\n\ Returns the value of a variable."); + +static +PyObject * +MiscRT_GetVariable(PyObject *self, PyObject *args) { + PyObject *data_out; + CHAR16 *VariableName; + EFI_GUID VendorGuid; + UINT32 GuidSize; + UINT32 Attributes; + UINT64 DataSize; + char *Data; + const CHAR16 *GuidIn; + EFI_STATUS Status; + + if(!PyArg_ParseTuple(args, "uu#K", &VariableName, &GuidIn, &GuidSize,=20 + &DataSize)) { + return NULL; + } + + StrToGuid(GuidIn, &VendorGuid); + + Data =3D malloc(DataSize); + if (!Data) + return NULL; + + Py_BEGIN_ALLOW_THREADS + Status =3D gRT->GetVariable(VariableName, &VendorGuid, &Attributes,=20 + (UINTN *)&DataSize, (void*)Data); Py_END_ALLOW_THREADS + + data_out =3D Py_BuildValue("(IIy#K)", (UINT32)Status, Attributes, Data,= =20 + DataSize, DataSize); free(Data); + + return data_out; +} + +PyDoc_STRVAR(MiscRT_GetNextVariableName__doc__, +"(Status, VariableNameSize, VariableName, VendorGuid) =3D=20 +GetNextVariableName(NameSize, VariableName, GUID)\n\n\ Enumerates the=20 +current variable names."); + +static +PyObject * +MiscRT_GetNextVariableName(PyObject *self, PyObject *args) { + UINT64 NameSize; + CHAR16 *VariableName, *NameIn; + UINT32 GuidSize, VariableNameSize, i; + EFI_GUID VendorGuid; + EFI_STATUS Status; + const char *GuidIn;=20 + char *VendorGuidPtr, *GuidOut[37]; + + if(!PyArg_ParseTuple(args, "Ky#s#", &NameSize, &NameIn,=20 + &VariableNameSize, &GuidIn, &GuidSize)) { + return NULL; + } + + VendorGuidPtr =3D (char *)&VendorGuid; + for (i=3D0; iGetNextVariableName((UINTN *)&NameSize, (CHAR16=20 + *)VariableName, &VendorGuid); Py_END_ALLOW_THREADS + + GuidToStr((EFI_GUID *)&VendorGuid, (UINT8 *)GuidOut); + + return Py_BuildValue("(IuKs)", (UINT32) Status, VariableName,=20 +NameSize, &GuidOut); } + +PyDoc_STRVAR(MiscRT_SetVariable__doc__, +"(Status, DataSize, GUID) =3D SetVariable(VariableName, GUID, Attributes,= =20 +Data, DataSize)\n\n\ Sets the value of a variable."); + +static +PyObject * +MiscRT_SetVariable(PyObject *self, PyObject *args) { + CHAR16 *VariableName; + UINT64 DataSize; + char *Data, *guidptr, *VendorGuidPtr; + char *GuidOut[37]; + EFI_STATUS Status; + EFI_GUID VendorGuid; + UINT32 Attributes; + UINT32 GuidSize, strDataSize; + const CHAR16 *GuidIn; + + if(!PyArg_ParseTuple(args, "uu#Is#I", &VariableName, &GuidIn,=20 + &GuidSize, &Attributes, &Data, &strDataSize, &DataSize)) { + return NULL; + } + + StrToGuid(GuidIn, &VendorGuid); + + Py_BEGIN_ALLOW_THREADS + Status =3D gRT->SetVariable(VariableName, &VendorGuid, Attributes,=20 + (UINTN)DataSize, (void*)Data); Py_END_ALLOW_THREADS + + GuidToStr((EFI_GUID *)&VendorGuid, (UINT8 *)GuidOut); + +// return Py_BuildValue("(IKu#)", (UINT32) Status, DataSize, &VendorGuid= , sizeof(VendorGuid)); + return Py_BuildValue("(IKs)", (UINT32) Status, DataSize, &GuidOut); } + + +/** + This function prints a GUID to a buffer + =20 + @param guid Pointer to a GUID + =20 + @param str_buffer Pointer to a str buffer + =20 + + @retval EFI_SUCCESS GUID was printed + =20 + @retval EFI_INVALID_PARAMETER GUID was NULL + +**/ +EFI_STATUS +GuidToStr ( + IN EFI_GUID *guid, + IN OUT UINT8 *str_buffer + ) +{ + if (guid =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + sprintf ( + (CHAR8 *)str_buffer, + "%08X-%04X-%04X-%02X%02X-%02X%02X%02X%02X%02X%02X", + (unsigned) guid->Data1, + guid->Data2, + guid->Data3, + guid->Data4[0], + guid->Data4[1], + guid->Data4[2], + guid->Data4[3], + guid->Data4[4], + guid->Data4[5], + guid->Data4[6], + guid->Data4[7] + ); + + return EFI_SUCCESS; +} + static PyMethodDef edk2_methods[] =3D { {"access", edk2_access, METH_VARARGS, edk2_access__doc__}= , #ifdef HAVE_TTYNAME @@ -4057,7 +4556,23 @@ static PyMethodDef edk2_methods[] =3D { #ifdef HAVE= _PATHCONF {"pathconf", edk2_pathconf, METH_VARARGS, edk2_pathconf__doc__}= , #endif - {"abort", edk2_abort, METH_NOARGS, edk2_abort__doc__}, + {"abort", edk2_abort, METH_NOARGS, edk2_abort__doc= __}, + {"rdmsr", edk2_rdmsr, METH_VARARGS, efi_= rdmsr__doc__}, + {"wrmsr", edk2_wrmsr, METH_VARARGS, efi_= wrmsr__doc__}, + {"readpci", edk2_readpci, METH_VARARGS, efi_= readpci__doc__}, + {"writepci", edk2_writepci, METH_VARARGS, efi_= writepci__doc__}, + {"readmem", posix_readmem, METH_VARARGS, efi= _readmem__doc__}, + {"readmem_dword", posix_readmem_dword, METH_VARARGS, efi= _readmem_dword__doc__}, + {"writemem", posix_writemem, METH_VARARGS, efi= _writemem__doc__}, + {"writemem_dword", posix_writemem_dword, METH_VARARGS, efi= _writemem_dword__doc__}, + {"writeio", edk2_writeio, METH_VARARGS, efi_= writeio__doc__}, + {"readio", edk2_readio, METH_VARARGS, efi_= readio__doc__}, + {"swsmi", posix_swsmi, METH_VARARGS, efi= _swsmi__doc__}, + {"allocphysmem", posix_allocphysmem, METH_VARARGS, efi= _allocphysmem__doc__}, + {"cpuid", edk2_cpuid, METH_VARARGS, efi_= cpuid__doc__}, + {"GetVariable", MiscRT_GetVariable, METH_VARARGS, Mis= cRT_GetVariable__doc__}, + {"GetNextVariableName", MiscRT_GetNextVariableName, METH_VARARGS, Mis= cRT_GetNextVariableName__doc__}, + {"SetVariable", MiscRT_SetVariable, METH_VARARGS, Mis= cRT_SetVariable__doc__}, {NULL, NULL} /* Sentinel */ }; =20 -- 2.39.1.windows.1