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(version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6792.19; Thu, 14 Sep 2023 05:19:27 +0000 X-Received: from PH7PR11MB6377.namprd11.prod.outlook.com ([fe80::6d2a:92af:3ea8:a440]) by PH7PR11MB6377.namprd11.prod.outlook.com ([fe80::6d2a:92af:3ea8:a440%7]) with mapi id 15.20.6768.029; Thu, 14 Sep 2023 05:19:27 +0000 From: "Gao, Zhichao" To: Sami Mujawar , "devel@edk2.groups.io" CC: "pierre.gondois@arm.com" , "Anshuman.Khandual@arm.com" , "Matteo.Carlini@arm.com" , "Akanksha.Jain2@arm.com" , "Sibel.Allinson@arm.com" , "jeshuas@nvidia.com" , "nd@arm.com" Subject: Re: [edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt Thread-Topic: [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt Thread-Index: AQHZ5kDXshm+zj5SpEyvX7wWQWaW6rAZyXkA Date: Thu, 14 Sep 2023 05:19:27 +0000 Message-ID: References: <20230913124935.38768-1-sami.mujawar@arm.com> <20230913124935.38768-8-sami.mujawar@arm.com> In-Reply-To: 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spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=RhfKMGrF; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") Reviewed-by: Zhichao Gao Thanks, Zhichao > -----Original Message----- > From: Sami Mujawar > Sent: Wednesday, September 13, 2023 8:50 PM > To: devel@edk2.groups.io > Cc: Sami Mujawar ; Gao, Zhichao > ; pierre.gondois@arm.com; > Anshuman.Khandual@arm.com; Matteo.Carlini@arm.com; > Akanksha.Jain2@arm.com; Sibel.Allinson@arm.com; jeshuas@nvidia.com; > nd@arm.com > Subject: [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE > interrupt >=20 > ACPI 6.5 introduces a new filed to the MADT GICC structure to specify the > TRBE interrupt. The TRBE interrupt is a Processor Private interrupt (PPI)= and is > used to specify a platform-specific interrupt to signal TRBE events. >=20 > Therefore, update the MADT GICC structure parser to parse the new TRBE > interrupt field. Also, add validations to check that the TRBE interrupt i= s within > the PPI interrupt range. >=20 > Signed-off-by: Sami Mujawar > --- >=20 > Notes: > v2: > - No code change from v1 patch series. [SAMI] >=20 >=20 > ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser. > c | 48 +++++++++++++++++++- > 1 file changed, 46 insertions(+), 2 deletions(-) >=20 > diff --git > a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars > er.c > b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars > er.c > index > 41edcb9ffd1da90893c04e8284ea3317a9e3b45a..3a4f246347f8ad3489fda083e3 > 268e73baa9bc92 100644 > --- > a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars > er.c > +++ > b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars > +++ er.c > @@ -1,7 +1,7 @@ > /** @file > MADT table parser >=20 > - Copyright (c) 2016 - 2020, ARM Limited. All rights reserved. > + Copyright (c) 2016 - 2023, ARM Limited. All rights reserved. > Copyright (c) 2022, AMD Incorporated. All rights reserved. > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > @@ -97,6 +97,48 @@ ValidateSpeOverflowInterrupt ( > } > } >=20 > +/** > + This function validates the TRBE Interrupt in the GICC. > + > + @param [in] Ptr Pointer to the start of the field data. > + @param [in] Context Pointer to context specific information e.g. this > + could be a pointer to the ACPI table header. > +**/ > +STATIC > +VOID > +EFIAPI > +ValidateTrbeInterrupt ( > + IN UINT8 *Ptr, > + IN VOID *Context > + ) > +{ > + UINT16 TrbeInterrupt; > + > + TrbeInterrupt =3D *(UINT16 *)Ptr; > + > + // SPE not supported by this processor if (TrbeInterrupt =3D=3D 0) { > + return; > + } > + > + if ((TrbeInterrupt < ARM_PPI_ID_MIN) || > + ((TrbeInterrupt > ARM_PPI_ID_MAX) && > + (TrbeInterrupt < ARM_PPI_ID_EXTENDED_MIN)) || > + (TrbeInterrupt > ARM_PPI_ID_EXTENDED_MAX)) > + { > + IncrementErrorCount (); > + Print ( > + L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID " > + L"ranges of %d-%d or %d-%d (for GICv3.1 or later).", > + TrbeInterrupt, > + ARM_PPI_ID_MIN, > + ARM_PPI_ID_MAX, > + ARM_PPI_ID_EXTENDED_MIN, > + ARM_PPI_ID_EXTENDED_MAX > + ); > + } > +} > + > /** > An ACPI_PARSER array describing the GICC Interrupt Controller Structur= e. > **/ > @@ -122,7 +164,9 @@ STATIC CONST ACPI_PARSER GicCParser[] =3D { > NULL }, > { L"Reserved", 1, 77, L"0x%x", NULL, NULL, NU= LL, NULL }, > { L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL, > - ValidateSpeOverflowInterrupt, NULL } > + ValidateSpeOverflowInterrupt, NULL }, > + { L"TRBE Interrupt", 2, 80, L"0x%x", NULL, NULL, > + ValidateTrbeInterrupt, NULL } > }; >=20 > /** > -- > 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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