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* [edk2-devel] [PATCH] ShellPkg/Pci.c: Update supported link speed to PCIe Gen6
@ 2024-05-27  5:40 Lien, HoraceX
  2024-05-27 13:02 ` Gao, Zhichao
  0 siblings, 1 reply; 2+ messages in thread
From: Lien, HoraceX @ 2024-05-27  5:40 UTC (permalink / raw)
  To: devel; +Cc: HoraceX Lien, Zhichao Gao

From: HoraceX Lien <horacex.lien@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4779

Refer to PCI express base specification Reversion 6.2,
table 7-23 Link Capabilities Register.
Supported Link Speeds Vector bit 5: speed 64 GT/s.
Add the support to shell command 'pci'.

Signed-off-by: HoraceX Lien <horacex.lien@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
---
 ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
index 7b11f49d0d..93622733a5 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
@@ -4809,6 +4809,9 @@ ExplainPcieLinkCap (
     case 5:
       MaxLinkSpeed = L"32.0 GT/s";
       break;
+    case 6:
+      MaxLinkSpeed = L"64.0 GT/s";
+      break;
     default:
       MaxLinkSpeed = L"Reserved";
       break;
@@ -5015,6 +5018,9 @@ ExplainPcieLinkStatus (
     case 5:
       CurLinkSpeed = L"32.0 GT/s";
       break;
+    case 6:
+      CurLinkSpeed = L"64.0 GT/s";
+      break;
     default:
       CurLinkSpeed = L"Reserved";
       break;
-- 
2.43.0.windows.1



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2024-05-27  5:40 [edk2-devel] [PATCH] ShellPkg/Pci.c: Update supported link speed to PCIe Gen6 Lien, HoraceX
2024-05-27 13:02 ` Gao, Zhichao

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