Re: [PATCH v2 3/6] OvmfPkg/PlatformPei: unfix PcdPciExpressBaseAddress

["Abner Chang" <abner.chang@hpe.com>]

Reviewed-by: Abner Chang <abner.chang@hpe.com>

> -----Original Message-----
> From: Gerd Hoffmann <kraxel@redhat.com>
> Sent: Monday, January 17, 2022 6:02 PM
> To: devel@edk2.groups.io
> Cc: Gerd Hoffmann <kraxel@redhat.com>; Ray Ni <ray.ni@intel.com>;
> Liming Gao <gaoliming@byosoft.com.cn>; Chang, Abner (HPS SW/FW
> Technologist) <abner.chang@hpe.com>; Jiewen Yao
> <jiewen.yao@intel.com>; Jordan Justen <jordan.l.justen@intel.com>; Leif
> Lindholm <leif@nuviainc.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Jian J Wang <jian.j.wang@intel.com>; Pawel
> Polawski <ppolawsk@redhat.com>; Hao A Wu <hao.a.wu@intel.com>
> Subject: [PATCH v2 3/6] OvmfPkg/PlatformPei: unfix
> PcdPciExpressBaseAddress
> 
> Will be set by FdtPciHostBridgeLib, so it can't be an fixed when we
> want use that library.
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  OvmfPkg/PlatformPei/PlatformPei.inf | 2 +-
>  OvmfPkg/PlatformPei/MemDetect.c     | 4 ++--
>  OvmfPkg/PlatformPei/Platform.c      | 4 ++--
>  3 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf
> b/OvmfPkg/PlatformPei/PlatformPei.inf
> index 8ef404168c45..44bf482e855a 100644
> --- a/OvmfPkg/PlatformPei/PlatformPei.inf
> +++ b/OvmfPkg/PlatformPei/PlatformPei.inf
> @@ -92,6 +92,7 @@ [Pcd]
>    gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
>    gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase
>    gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
>    gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
> @@ -114,7 +115,6 @@ [Pcd]
>  [FixedPcd]
>    gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase
>    gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
>    gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
>    gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
>    gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
> diff --git a/OvmfPkg/PlatformPei/MemDetect.c
> b/OvmfPkg/PlatformPei/MemDetect.c
> index 1bcb5a08bca6..f87a6f48a1bf 100644
> --- a/OvmfPkg/PlatformPei/MemDetect.c
> +++ b/OvmfPkg/PlatformPei/MemDetect.c
> @@ -155,8 +155,8 @@ QemuUc32BaseInitialization (
>      // [PcdPciExpressBaseAddress, 4GB) range require a very small number of
>      // variable MTRRs (preferably 1 or 2).
>      //
> -    ASSERT (FixedPcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
> -    mQemuUc32Base = (UINT32)FixedPcdGet64 (PcdPciExpressBaseAddress);
> +    ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
> +    mQemuUc32Base = (UINT32)PcdGet64 (PcdPciExpressBaseAddress);
>      return;
>    }
> 
> diff --git a/OvmfPkg/PlatformPei/Platform.c
> b/OvmfPkg/PlatformPei/Platform.c
> index d0323c645162..27ada0c17577 100644
> --- a/OvmfPkg/PlatformPei/Platform.c
> +++ b/OvmfPkg/PlatformPei/Platform.c
> @@ -171,7 +171,7 @@ MemMapInitialization (
>      // The MMCONFIG area is expected to fall between the top of low RAM
> and
>      // the base of the 32-bit PCI host aperture.
>      //
> -    PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress);
> +    PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
>      ASSERT (TopOfLowRam <= PciExBarBase);
>      ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
>      PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
> @@ -302,7 +302,7 @@ PciExBarInitialization (
>    // determined in AddressWidthInitialization(), i.e., 36 bits, will suffice
>    // for DXE's page tables to cover the MMCONFIG area.
>    //
> -  PciExBarBase.Uint64 = FixedPcdGet64 (PcdPciExpressBaseAddress);
> +  PciExBarBase.Uint64 = PcdGet64 (PcdPciExpressBaseAddress);
>    ASSERT ((PciExBarBase.Uint32[1] & MCH_PCIEXBAR_HIGHMASK) == 0);
>    ASSERT ((PciExBarBase.Uint32[0] & MCH_PCIEXBAR_LOWMASK) == 0);
> 
> --
> 2.34.1