* [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
@ 2022-02-09 6:56 Chao Li
2022-04-08 11:26 ` [edk2-devel] " Abner Chang
0 siblings, 1 reply; 4+ messages in thread
From: Chao Li @ 2022-02-09 6:56 UTC (permalink / raw)
To: devel; +Cc: Michael D Kinney, Liming Gao, Zhiguang Liu
Implement LoongArch CPU related functions in BaseCpuLib.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 +++++++++++++++
MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15 +++++++++++++++
4 files changed, 39 insertions(+), 3 deletions(-)
create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index 950f5229b2..3101fc656e 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -8,6 +8,7 @@
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -25,7 +26,7 @@
#
-# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
#
[Sources.IA32]
@@ -63,6 +64,10 @@
[Sources.RISCV64]
RiscV/Cpu.S
+[Sources.LOONGARCH64]
+ LoongArch/CpuFlushTlb.S | GCC
+ LoongArch/CpuSleep.S | GCC
+
[Packages]
MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
index 80dc495786..7c5c8dfb37 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,13 +1,14 @@
// /** @file
// Instance of CPU Library for various architecture.
//
-// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
+// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
// PAL CALLs for IPF, and empty functions for EBC.
//
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -16,5 +17,5 @@
#string STR_MODULE_ABSTRACT #language en-US "Instance of CPU Library for various architectures"
-#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, and empty functions for EBC."
+#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, PAL CALLs for IPF, and empty functions for EBC."
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
new file mode 100644
index 0000000000..8b792f0a37
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
@@ -0,0 +1,15 @@
+#------------------------------------------------------------------------------
+#
+# CpuFlushTlb() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(CpuFlushTlb)
+
+ASM_PFX(CpuFlushTlb):
+ tlbflush
+ jirl $zero, $ra, 0
+ .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
new file mode 100644
index 0000000000..eb31b10714
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
@@ -0,0 +1,15 @@
+#------------------------------------------------------------------------------
+#
+# CpuSleep() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(CpuSleep)
+
+ASM_PFX(CpuSleep):
+ idle 0
+ jirl $zero, $ra, 0
+ .end
--
2.27.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
2022-02-09 6:56 [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation Chao Li
@ 2022-04-08 11:26 ` Abner Chang
2022-04-13 3:17 ` Chao Li
0 siblings, 1 reply; 4+ messages in thread
From: Abner Chang @ 2022-04-08 11:26 UTC (permalink / raw)
To: devel@edk2.groups.io, lichao@loongson.cn
Cc: Michael D Kinney, Liming Gao, Zhiguang Liu
[-- Attachment #1: Type: text/plain, Size: 5677 bytes --]
Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later.
Thanks
Abner
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33]
> MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
>
> Implement LoongArch CPU related functions in BaseCpuLib.
>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
>
> Signed-off-by: Chao Li <lichao@loongson.cn>
> ---
> MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
> MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
> MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15
> +++++++++++++++
> MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15
> +++++++++++++++
> 4 files changed, 39 insertions(+), 3 deletions(-)
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> index 950f5229b2..3101fc656e 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> @@ -8,6 +8,7 @@
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -25,7 +26,7 @@
>
>
> #
> -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> LOONGARCH64
> #
>
> [Sources.IA32]
> @@ -63,6 +64,10 @@
> [Sources.RISCV64]
> RiscV/Cpu.S
>
> +[Sources.LOONGARCH64]
> + LoongArch/CpuFlushTlb.S | GCC
> + LoongArch/CpuSleep.S | GCC
> +
> [Packages]
> MdePkg/MdePkg.dec
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> index 80dc495786..7c5c8dfb37 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> @@ -1,13 +1,14 @@
> // /** @file
> // Instance of CPU Library for various architecture.
> //
> -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
> +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64
> and LoongArch64,
> // PAL CALLs for IPF, and empty functions for EBC.
> //
> // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
> All rights reserved.<BR>
> //
> // SPDX-License-Identifier: BSD-2-Clause-Patent
> //
> @@ -16,5 +17,5 @@
>
> #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU
> Library for various architectures"
>
> -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for
> IPF, and empty functions for EBC."
> +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
> PAL CALLs for IPF, and empty functions for EBC."
>
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> new file mode 100644
> index 0000000000..8b792f0a37
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuFlushTlb() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuFlushTlb)
> +
> +ASM_PFX(CpuFlushTlb):
> + tlbflush
> + jirl $zero, $ra, 0
> + .end
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> new file mode 100644
> index 0000000000..eb31b10714
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuSleep() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuSleep)
> +
> +ASM_PFX(CpuSleep):
> + idle 0
> + jirl $zero, $ra, 0
> + .end
> --
> 2.27.0
>
>
>
>
>
[-- Attachment #2: Type: message/rfc822, Size: 19235 bytes --]
From: Yu Pu <yu.pu@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Yu Pu <yu.pu@intel.com>
Subject: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
Date: Tue, 29 Mar 2022 06:36:48 +0000
Message-ID: <20220329063703.549-1-yu.pu@intel.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3394
Today lots of duplicated code call CPUID and calculates the address
mask. Adding an API named GetPhysicalAddressBits in UefiCpuLib can
solve this problem, but at the same time cause MdeModulePkg depend
on UefiCpuPkg which does not meet the design spec. So merge UefiCpuLib
to CpuLib is a good way to sovle these problems. To minimize the impact,
this operation is divided into four steps.
Yu Pu (15):
IntelFsp2Pkg: Add CpuLib to module INFs that depend on UefiCpuLib
IntelFsp2WrapperPkg: Add CpuLib to module INFs that depend on
UefiCpuLib.
MdePkg: Add CpuLib to module INFs that depend on UefiCpuLib.
OvmfPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
UefiCpuPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
UefiPayloadPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
MdePkg: Move API and implementation from UefiCpuLib to CpuLib
UefiCpuPkg: Move API and implementation from UefiCpuLib to CpuLib
IntelFsp2Pkg: Remove UefiCpuLib from module INFs.
OvmfPkg: Remove UefiCpuLib from module INFs.
PcAtChipsetPkg: Remove UefiCpuLib from module INFs.
SourceLevelDebugPkg: Remove UefiCpuLib from module INFs.
UefiCpuPkg: Remove UefiCpuLib from module INFs.
UefiPayloadPkg: Remove UefiCpuLib from module INFs.
UefiCpuLib: Remove UefiCpuLib.
MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c | 122 ++++++++++++++++++++
OvmfPkg/Sec/SecMain.c | 2 +-
UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 81 -------------
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 2 +-
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 2 +-
IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 2 +-
IntelFsp2Pkg/FspSecCore/SecMain.h | 2 +-
IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 -
IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc | 1 -
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 2 +-
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 2 +-
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc | 1 -
MdePkg/Include/Library/CpuLib.h | 65 +++++++++++
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 6 +
{UefiCpuPkg/Library/BaseUefiCpuLib => MdePkg/Library/BaseCpuLib}/Ia32/InitializeFpu.nasm | 0
{UefiCpuPkg/Library/BaseUefiCpuLib => MdePkg/Library/BaseCpuLib}/X64/InitializeFpu.nasm | 0
MdePkg/MdeLibs.dsc.inc | 1 +
OvmfPkg/AmdSev/AmdSevX64.dsc | 1 -
OvmfPkg/Bhyve/BhyveX64.dsc | 1 -
OvmfPkg/CloudHv/CloudHvX64.dsc | 1 -
OvmfPkg/Microvm/MicrovmX64.dsc | 1 -
OvmfPkg/OvmfPkgIa32.dsc | 1 -
OvmfPkg/OvmfPkgIa32X64.dsc | 1 -
OvmfPkg/OvmfPkgX64.dsc | 1 -
OvmfPkg/OvmfXen.dsc | 1 -
OvmfPkg/Sec/SecMain.inf | 2 +-
PcAtChipsetPkg/PcAtChipsetPkg.dsc | 1 -
SourceLevelDebugPkg/SourceLevelDebugPkg.dsc | 1 -
UefiCpuPkg/CpuDxe/CpuDxe.h | 1 -
UefiCpuPkg/CpuDxe/CpuDxe.inf | 1 -
UefiCpuPkg/Include/Library/UefiCpuLib.h | 65 -----------
UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 41 -------
UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni | 16 ---
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf | 2 +-
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf | 2 +-
UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 1 -
UefiCpuPkg/Library/MpInitLib/MpLib.h | 1 -
UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 1 -
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 2 +-
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 -
UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 1 -
UefiCpuPkg/SecCore/SecCore.inf | 2 +-
UefiCpuPkg/SecCore/SecCoreNative.inf | 2 +-
UefiCpuPkg/SecCore/SecMain.h | 2 +-
UefiCpuPkg/UefiCpuPkg.dec | 5 -
UefiCpuPkg/UefiCpuPkg.dsc | 2 -
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h | 2 +-
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf | 2 +-
UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.inf | 2 +-
UefiPayloadPkg/UefiPayloadPkg.dsc | 1 -
50 files changed, 211 insertions(+), 248 deletions(-)
create mode 100644 MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
rename {UefiCpuPkg/Library/BaseUefiCpuLib => MdePkg/Library/BaseCpuLib}/Ia32/InitializeFpu.nasm (100%)
rename {UefiCpuPkg/Library/BaseUefiCpuLib => MdePkg/Library/BaseCpuLib}/X64/InitializeFpu.nasm (100%)
delete mode 100644 UefiCpuPkg/Include/Library/UefiCpuLib.h
delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni
--
2.30.0.windows.2
-=-=-=-=-=-=-=-=-=-=-=-
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
2022-04-08 11:26 ` [edk2-devel] " Abner Chang
@ 2022-04-13 3:17 ` Chao Li
2022-04-16 14:45 ` Abner Chang
0 siblings, 1 reply; 4+ messages in thread
From: Chao Li @ 2022-04-13 3:17 UTC (permalink / raw)
To: "Chang, Abner (HPS SW/FW Technologist)"
Cc: "devel@edk2.groups.io", Michael D Kinney, Liming Gao,
Zhiguang Liu
[-- Attachment #1: Type: text/plain, Size: 6196 bytes --]
Hi Abner,
You pointed out that you attached a patch to your last email, but I didn't find it, do you forgot to put it? In the current EDK II code repo, I can not find the patch which you mentioned.
--
Thanks,
Chao
------------------------
On 4月 8 2022, at 7:26 晚上, "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hpe.com> wrote:
> Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later.
>
> Thanks
> Abner
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
> > Sent: Wednesday, February 9, 2022 2:56 PM
> > To: devel@edk2.groups.io
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> > <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>
> > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33]
> > MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
> >
> > Implement LoongArch CPU related functions in BaseCpuLib.
> >
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> >
> > Signed-off-by: Chao Li <lichao@loongson.cn>
> > ---
> > MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
> > MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
> > MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15
> > +++++++++++++++
> > MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15
> > +++++++++++++++
> > 4 files changed, 39 insertions(+), 3 deletions(-)
> > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> >
> > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > index 950f5229b2..3101fc656e 100644
> > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > @@ -8,6 +8,7 @@
> > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> > # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> > reserved.<BR>
> > +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> > rights reserved.<BR>
> > #
> > # SPDX-License-Identifier: BSD-2-Clause-Patent
> > #
> > @@ -25,7 +26,7 @@
> >
> >
> > #
> > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> > LOONGARCH64
> > #
> >
> > [Sources.IA32]
> > @@ -63,6 +64,10 @@
> > [Sources.RISCV64]
> > RiscV/Cpu.S
> >
> > +[Sources.LOONGARCH64]
> > + LoongArch/CpuFlushTlb.S | GCC
> > + LoongArch/CpuSleep.S | GCC
> > +
> > [Packages]
> > MdePkg/MdePkg.dec
> >
> > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > index 80dc495786..7c5c8dfb37 100644
> > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> > @@ -1,13 +1,14 @@
> > // /** @file
> > // Instance of CPU Library for various architecture.
> > //
> > -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
> > +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64
> > and LoongArch64,
> > // PAL CALLs for IPF, and empty functions for EBC.
> > //
> > // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> > // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> > // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> > // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> > reserved.<BR>
> > +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
> > All rights reserved.<BR>
> > //
> > // SPDX-License-Identifier: BSD-2-Clause-Patent
> > //
> > @@ -16,5 +17,5 @@
> >
> > #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU
> > Library for various architectures"
> >
> > -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> > implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for
> > IPF, and empty functions for EBC."
> > +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> > implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
> > PAL CALLs for IPF, and empty functions for EBC."
> >
> > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > new file mode 100644
> > index 0000000000..8b792f0a37
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> > @@ -0,0 +1,15 @@
> > +#------------------------------------------------------------------------------
> > +#
> > +# CpuFlushTlb() for LoongArch64
> > +#
> > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> > reserved.<BR>
> > +#
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +#------------------------------------------------------------------------------
> > +ASM_GLOBAL ASM_PFX(CpuFlushTlb)
> > +
> > +ASM_PFX(CpuFlushTlb):
> > + tlbflush
> > + jirl $zero, $ra, 0
> > + .end
> > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> > new file mode 100644
> > index 0000000000..eb31b10714
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> > @@ -0,0 +1,15 @@
> > +#------------------------------------------------------------------------------
> > +#
> > +# CpuSleep() for LoongArch64
> > +#
> > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> > reserved.<BR>
> > +#
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +#------------------------------------------------------------------------------
> > +ASM_GLOBAL ASM_PFX(CpuSleep)
> > +
> > +ASM_PFX(CpuSleep):
> > + idle 0
> > + jirl $zero, $ra, 0
> > + .end
> > --
> > 2.27.0
> >
> >
> >
> >
>
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
2022-04-13 3:17 ` Chao Li
@ 2022-04-16 14:45 ` Abner Chang
0 siblings, 0 replies; 4+ messages in thread
From: Abner Chang @ 2022-04-16 14:45 UTC (permalink / raw)
To: Chao Li
Cc: "devel@edk2.groups.io", Michael D Kinney, Liming Gao,
Zhiguang Liu
[-- Attachment #1.1: Type: text/plain, Size: 6475 bytes --]
Hi Li,
Maybe I forget to attach it. The cover letter of that CpuLib patch set attached.
Regards,
Abner
________________________________
From: Chao Li <lichao@loongson.cn>
Sent: Wednesday, April 13, 2022 11:17 AM
To: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>
Cc: "devel@edk2.groups.io" <devel@edk2.groups.io>; Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>
Subject: Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
Hi Abner,
You pointed out that you attached a patch to your last email, but I didn't find it, do you forgot to put it? In the current EDK II code repo, I can not find the patch which you mentioned.
--
Thanks,
Chao
------------------------
On 4月 8 2022, at 7:26 晚上, "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hpe.com> wrote:
Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later.
Thanks
Abner
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33]
> MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
>
> Implement LoongArch CPU related functions in BaseCpuLib.
>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
>
> Signed-off-by: Chao Li <lichao@loongson.cn>
> ---
> MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++-
> MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
> MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15
> +++++++++++++++
> MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15
> +++++++++++++++
> 4 files changed, 39 insertions(+), 3 deletions(-)
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> index 950f5229b2..3101fc656e 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> @@ -8,6 +8,7 @@
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -25,7 +26,7 @@
>
>
> #
> -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
> LOONGARCH64
> #
>
> [Sources.IA32]
> @@ -63,6 +64,10 @@
> [Sources.RISCV64]
> RiscV/Cpu.S
>
> +[Sources.LOONGARCH64]
> + LoongArch/CpuFlushTlb.S | GCC
> + LoongArch/CpuSleep.S | GCC
> +
> [Packages]
> MdePkg/MdePkg.dec
>
> diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> index 80dc495786..7c5c8dfb37 100644
> --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
> @@ -1,13 +1,14 @@
> // /** @file
> // Instance of CPU Library for various architecture.
> //
> -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
> +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64
> and LoongArch64,
> // PAL CALLs for IPF, and empty functions for EBC.
> //
> // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
> // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
> All rights reserved.<BR>
> //
> // SPDX-License-Identifier: BSD-2-Clause-Patent
> //
> @@ -16,5 +17,5 @@
>
> #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU
> Library for various architectures"
>
> -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for
> IPF, and empty functions for EBC."
> +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library
> implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
> PAL CALLs for IPF, and empty functions for EBC."
>
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> new file mode 100644
> index 0000000000..8b792f0a37
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuFlushTlb() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuFlushTlb)
> +
> +ASM_PFX(CpuFlushTlb):
> + tlbflush
> + jirl $zero, $ra, 0
> + .end
> diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> new file mode 100644
> index 0000000000..eb31b10714
> --- /dev/null
> +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
> @@ -0,0 +1,15 @@
> +#------------------------------------------------------------------------------
> +#
> +# CpuSleep() for LoongArch64
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#------------------------------------------------------------------------------
> +ASM_GLOBAL ASM_PFX(CpuSleep)
> +
> +ASM_PFX(CpuSleep):
> + idle 0
> + jirl $zero, $ra, 0
> + .end
> --
> 2.27.0
>
>
>
>
[-- Attachment #1.2: Type: text/html, Size: 10628 bytes --]
[-- Attachment #2: Type: message/rfc822, Size: 19086 bytes --]
From: "gaoliming" <gaoliming@byosoft.com.cn>
To: <devel@edk2.groups.io>, <yu.pu@intel.com>
Subject: 回复: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
Date: Thu, 31 Mar 2022 08:51:04 +0800
Message-ID: <000c01d84499$6c9c5760$45d50620$@byosoft.com.cn>
The change in MdePkg is good to me. Reviewed-by: Liming Gao
<gaoliming@byosoft.com.cn>
> -----邮件原件-----
> 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Yu Pu
> 发送时间: 2022年3月29日 14:37
> 收件人: devel@edk2.groups.io
> 抄送: Yu Pu <yu.pu@intel.com>
> 主题: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3394
>
>
>
> Today lots of duplicated code call CPUID and calculates the address
>
> mask. Adding an API named GetPhysicalAddressBits in UefiCpuLib can
>
> solve this problem, but at the same time cause MdeModulePkg depend
>
> on UefiCpuPkg which does not meet the design spec. So merge UefiCpuLib
>
> to CpuLib is a good way to sovle these problems. To minimize the impact,
>
> this operation is divided into four steps.
>
> Yu Pu (15):
> IntelFsp2Pkg: Add CpuLib to module INFs that depend on UefiCpuLib
> IntelFsp2WrapperPkg: Add CpuLib to module INFs that depend on
> UefiCpuLib.
> MdePkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> OvmfPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> UefiCpuPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> UefiPayloadPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> MdePkg: Move API and implementation from UefiCpuLib to CpuLib
> UefiCpuPkg: Move API and implementation from UefiCpuLib to CpuLib
> IntelFsp2Pkg: Remove UefiCpuLib from module INFs.
> OvmfPkg: Remove UefiCpuLib from module INFs.
> PcAtChipsetPkg: Remove UefiCpuLib from module INFs.
> SourceLevelDebugPkg: Remove UefiCpuLib from module INFs.
> UefiCpuPkg: Remove UefiCpuLib from module INFs.
> UefiPayloadPkg: Remove UefiCpuLib from module INFs.
> UefiCpuLib: Remove UefiCpuLib.
>
> MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
> | 122 ++++++++++++++++++++
> OvmfPkg/Sec/SecMain.c
> | 2 +-
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
> | 81 -------------
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> | 2 +-
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> | 2 +-
> IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> | 2 +-
> IntelFsp2Pkg/FspSecCore/SecMain.h
> | 2 +-
> IntelFsp2Pkg/IntelFsp2Pkg.dsc
> | 1 -
> IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc
> | 1 -
> IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> | 2 +-
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> | 2 +-
> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> | 1 -
> MdePkg/Include/Library/CpuLib.h
> | 65 +++++++++++
> MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> | 6 +
> {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/Ia32/InitializeFpu.nasm | 0
> {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/X64/InitializeFpu.nasm | 0
> MdePkg/MdeLibs.dsc.inc
> | 1 +
> OvmfPkg/AmdSev/AmdSevX64.dsc
> | 1 -
> OvmfPkg/Bhyve/BhyveX64.dsc
> | 1 -
> OvmfPkg/CloudHv/CloudHvX64.dsc
> | 1 -
> OvmfPkg/Microvm/MicrovmX64.dsc
> | 1 -
> OvmfPkg/OvmfPkgIa32.dsc
> | 1 -
> OvmfPkg/OvmfPkgIa32X64.dsc
> | 1 -
> OvmfPkg/OvmfPkgX64.dsc
> | 1 -
> OvmfPkg/OvmfXen.dsc
> | 1 -
> OvmfPkg/Sec/SecMain.inf
> | 2 +-
> PcAtChipsetPkg/PcAtChipsetPkg.dsc
> | 1 -
> SourceLevelDebugPkg/SourceLevelDebugPkg.dsc
> | 1 -
> UefiCpuPkg/CpuDxe/CpuDxe.h
> | 1 -
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> | 1 -
> UefiCpuPkg/Include/Library/UefiCpuLib.h
> | 65 -----------
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
> | 41 -------
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni
> | 16 ---
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
> | 2 +-
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
> | 2 +-
> UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> | 1 -
> UefiCpuPkg/Library/MpInitLib/MpLib.h
> | 1 -
> UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
> | 1 -
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
> | 2 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
> | 1 -
> UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
> | 1 -
> UefiCpuPkg/SecCore/SecCore.inf
> | 2 +-
> UefiCpuPkg/SecCore/SecCoreNative.inf
> | 2 +-
> UefiCpuPkg/SecCore/SecMain.h
> | 2 +-
> UefiCpuPkg/UefiCpuPkg.dec
> | 5 -
> UefiCpuPkg/UefiCpuPkg.dsc
> | 2 -
> UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
> | 2 +-
> UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
> | 2 +-
> UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.inf
> | 2 +-
> UefiPayloadPkg/UefiPayloadPkg.dsc
> | 1 -
> 50 files changed, 211 insertions(+), 248 deletions(-)
> create mode 100644 MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
> delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
> rename {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/Ia32/InitializeFpu.nasm (100%)
> rename {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/X64/InitializeFpu.nasm (100%)
> delete mode 100644 UefiCpuPkg/Include/Library/UefiCpuLib.h
> delete mode 100644
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
> delete mode 100644
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni
>
> --
> 2.30.0.windows.2
>
>
>
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^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-04-16 14:45 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-02-09 6:56 [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation Chao Li
2022-04-08 11:26 ` [edk2-devel] " Abner Chang
2022-04-13 3:17 ` Chao Li
2022-04-16 14:45 ` Abner Chang
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