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boundary="_002_PH7PR84MB1885FEDED339D680394BAD74FFE99PH7PR84MB1885NAMP_" --_002_PH7PR84MB1885FEDED339D680394BAD74FFE99PH7PR84MB1885NAMP_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), = you may want to sync up your changes with that patch set. RISC-V will do th= e same work later. Thanks Abner > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] > MdePkg/BaseCpuLib: LoongArch Base CPU library implementation. >=20 > Implement LoongArch CPU related functions in BaseCpuLib. >=20 > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu >=20 > Signed-off-by: Chao Li > --- > MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++- > MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++-- > MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 > +++++++++++++++ > MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15 > +++++++++++++++ > 4 files changed, 39 insertions(+), 3 deletions(-) > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S >=20 > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > index 950f5229b2..3101fc656e 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > @@ -8,6 +8,7 @@ > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts > reserved.
> +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited.= All > rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -25,7 +26,7 @@ >=20 >=20 > # > -# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64 > LOONGARCH64 > # >=20 > [Sources.IA32] > @@ -63,6 +64,10 @@ > [Sources.RISCV64] > RiscV/Cpu.S >=20 > +[Sources.LOONGARCH64] > + LoongArch/CpuFlushTlb.S | GCC > + LoongArch/CpuSleep.S | GCC > + > [Packages] > MdePkg/MdePkg.dec >=20 > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > index 80dc495786..7c5c8dfb37 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > @@ -1,13 +1,14 @@ > // /** @file > // Instance of CPU Library for various architecture. > // > -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV6= 4, > +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 > and LoongArch64, > // PAL CALLs for IPF, and empty functions for EBC. > // > // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved. > // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts > reserved.
> +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. > All rights reserved.
> // > // SPDX-License-Identifier: BSD-2-Clause-Patent > // > @@ -16,5 +17,5 @@ >=20 > #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU > Library for various architectures" >=20 > -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for > IPF, and empty functions for EBC." > +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, > PAL CALLs for IPF, and empty functions for EBC." >=20 > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > new file mode 100644 > index 0000000000..8b792f0a37 > --- /dev/null > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > @@ -0,0 +1,15 @@ > +#-----------------------------------------------------------------------= ------- > +# > +# CpuFlushTlb() for LoongArch64 > +# > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All right= s > reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +#-----------------------------------------------------------------------= ------- > +ASM_GLOBAL ASM_PFX(CpuFlushTlb) > + > +ASM_PFX(CpuFlushTlb): > + tlbflush > + jirl $zero, $ra, 0 > + .end > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > new file mode 100644 > index 0000000000..eb31b10714 > --- /dev/null > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > @@ -0,0 +1,15 @@ > +#-----------------------------------------------------------------------= ------- > +# > +# CpuSleep() for LoongArch64 > +# > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All right= s > reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +#-----------------------------------------------------------------------= ------- > +ASM_GLOBAL ASM_PFX(CpuSleep) > + > +ASM_PFX(CpuSleep): > + idle 0 > + jirl $zero, $ra, 0 > + .end > -- > 2.27.0 >=20 >=20 >=20 >=20 >=20 --_002_PH7PR84MB1885FEDED339D680394BAD74FFE99PH7PR84MB1885NAMP_ Content-Type: message/rfc822 Content-Disposition: attachment; creation-date="Fri, 08 Apr 2022 11:26:31 GMT"; modification-date="Fri, 08 Apr 2022 11:26:34 GMT" Received: from DM4PR84MB1373.NAMPRD84.PROD.OUTLOOK.COM (2603:10b6:8:48::7) by PH7PR84MB1885.NAMPRD84.PROD.OUTLOOK.COM with HTTPS; Tue, 29 Mar 2022 19:59:28 +0000 Received: from MW4PR03CA0179.namprd03.prod.outlook.com (2603:10b6:303:8d::34) by DM4PR84MB1373.NAMPRD84.PROD.OUTLOOK.COM (2603:10b6:8:48::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5102.23; Tue, 29 Mar 2022 19:59:27 +0000 Received: from CO1NAM11FT035.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8d:cafe::7f) by MW4PR03CA0179.outlook.office365.com (2603:10b6:303:8d::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5102.18 via Frontend Transport; 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charset="iso-8859-1" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3394 Today lots of duplicated code call CPUID and calculates the address mask. Adding an API named GetPhysicalAddressBits in UefiCpuLib can solve this problem, but at the same time cause MdeModulePkg depend on UefiCpuPkg which does not meet the design spec. So merge UefiCpuLib to CpuLib is a good way to sovle these problems. To minimize the impact, this operation is divided into four steps. Yu Pu (15): IntelFsp2Pkg: Add CpuLib to module INFs that depend on UefiCpuLib IntelFsp2WrapperPkg: Add CpuLib to module INFs that depend on UefiCpuLib. MdePkg: Add CpuLib to module INFs that depend on UefiCpuLib. OvmfPkg: Add CpuLib to module INFs that depend on UefiCpuLib. UefiCpuPkg: Add CpuLib to module INFs that depend on UefiCpuLib. UefiPayloadPkg: Add CpuLib to module INFs that depend on UefiCpuLib. MdePkg: Move API and implementation from UefiCpuLib to CpuLib UefiCpuPkg: Move API and implementation from UefiCpuLib to CpuLib IntelFsp2Pkg: Remove UefiCpuLib from module INFs. OvmfPkg: Remove UefiCpuLib from module INFs. PcAtChipsetPkg: Remove UefiCpuLib from module INFs. SourceLevelDebugPkg: Remove UefiCpuLib from module INFs. UefiCpuPkg: Remove UefiCpuLib from module INFs. UefiPayloadPkg: Remove UefiCpuLib from module INFs. UefiCpuLib: Remove UefiCpuLib. MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c = | 122 ++++++++++++++++++++ OvmfPkg/Sec/SecMain.c = | 2 +- UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c = | 81 ------------- UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c = | 2 +- UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c = | 2 +- IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf = | 2 +- IntelFsp2Pkg/FspSecCore/SecMain.h = | 2 +- IntelFsp2Pkg/IntelFsp2Pkg.dsc = | 1 - IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc = | 1 - IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf = | 2 +- IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf = | 2 +- IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc = | 1 - MdePkg/Include/Library/CpuLib.h = | 65 +++++++++++ MdePkg/Library/BaseCpuLib/BaseCpuLib.inf = | 6 + {UefiCpuPkg/Library/BaseUefiCpuLib =3D> MdePkg/Library/BaseCpuLib}/Ia32/In= itializeFpu.nasm | 0 {UefiCpuPkg/Library/BaseUefiCpuLib =3D> MdePkg/Library/BaseCpuLib}/X64/Ini= tializeFpu.nasm | 0 MdePkg/MdeLibs.dsc.inc = | 1 + OvmfPkg/AmdSev/AmdSevX64.dsc = | 1 - OvmfPkg/Bhyve/BhyveX64.dsc = | 1 - OvmfPkg/CloudHv/CloudHvX64.dsc = | 1 - OvmfPkg/Microvm/MicrovmX64.dsc = | 1 - OvmfPkg/OvmfPkgIa32.dsc = | 1 - OvmfPkg/OvmfPkgIa32X64.dsc = | 1 - OvmfPkg/OvmfPkgX64.dsc = | 1 - OvmfPkg/OvmfXen.dsc = | 1 - OvmfPkg/Sec/SecMain.inf = | 2 +- PcAtChipsetPkg/PcAtChipsetPkg.dsc = | 1 - SourceLevelDebugPkg/SourceLevelDebugPkg.dsc = | 1 - UefiCpuPkg/CpuDxe/CpuDxe.h = | 1 - UefiCpuPkg/CpuDxe/CpuDxe.inf = | 1 - UefiCpuPkg/Include/Library/UefiCpuLib.h = | 65 ----------- UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf = | 41 ------- UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni = | 16 --- UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf = | 2 +- UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf = | 2 +- UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf = | 1 - UefiCpuPkg/Library/MpInitLib/MpLib.h = | 1 - UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf = | 1 - UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h = | 2 +- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf = | 1 - UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h = | 1 - UefiCpuPkg/SecCore/SecCore.inf = | 2 +- UefiCpuPkg/SecCore/SecCoreNative.inf = | 2 +- UefiCpuPkg/SecCore/SecMain.h = | 2 +- UefiCpuPkg/UefiCpuPkg.dec = | 5 - UefiCpuPkg/UefiCpuPkg.dsc = | 2 - UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h = | 2 +- UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf = | 2 +- UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.inf = | 2 +- UefiPayloadPkg/UefiPayloadPkg.dsc = | 1 - 50 files changed, 211 insertions(+), 248 deletions(-) create mode 100644 MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c rename {UefiCpuPkg/Library/BaseUefiCpuLib =3D> MdePkg/Library/BaseCpuLib}/= Ia32/InitializeFpu.nasm (100%) rename {UefiCpuPkg/Library/BaseUefiCpuLib =3D> MdePkg/Library/BaseCpuLib}/= X64/InitializeFpu.nasm (100%) delete mode 100644 UefiCpuPkg/Include/Library/UefiCpuLib.h delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf delete mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni -- 2.30.0.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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