Re: [PATCH v2 1/6] MdePkg/BaseLib: RISC-V: Support getting satp register value

["Andrei Warkentin" <andrei.warkentin@intel.com>]

Looks reasonable to me.

Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>

> -----Original Message-----
> From: Tuan Phan <tphan@ventanamicro.com>
> Sent: Friday, April 14, 2023 1:58 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming
> <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>;
> sunilvl@ventanamicro.com; git@danielschaefer.me; Warkentin, Andrei
> <andrei.warkentin@intel.com>; Tuan Phan <tphan@ventanamicro.com>
> Subject: [PATCH v2 1/6] MdePkg/BaseLib: RISC-V: Support getting satp
> register value
> 
> Add an API to retrieve satp register value.
> 
> Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
> ---
>  MdePkg/Include/Library/BaseLib.h          | 5 +++++
>  MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S | 8 ++++++++
>  2 files changed, 13 insertions(+)
> 
> diff --git a/MdePkg/Include/Library/BaseLib.h
> b/MdePkg/Include/Library/BaseLib.h
> index 8f2df76c29a3..5d7067ee854e 100644
> --- a/MdePkg/Include/Library/BaseLib.h
> +++ b/MdePkg/Include/Library/BaseLib.h
> @@ -181,6 +181,11 @@ RiscVSetSupervisorAddressTranslationRegister (
>    IN UINT64
> 
>    );
> 
> 
> 
> +UINT64
> 
> +RiscVGetSupervisorAddressTranslationRegister (
> 
> +  VOID
> 
> +  );
> 
> +
> 
>  UINT64
> 
>  RiscVReadTimer (
> 
>    VOID
> 
> diff --git a/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
> b/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
> index ac8f92f38aed..c9cf60c1664b 100644
> --- a/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
> +++ b/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
> @@ -21,3 +21,11 @@
>  ASM_FUNC (RiscVSetSupervisorAddressTranslationRegister)
> 
>      csrw  CSR_SATP, a0
> 
>      ret
> 
> +
> 
> +//
> 
> +// Get the value of Supervisor Address Translation and
> 
> +// Protection Register.
> 
> +//
> 
> +ASM_FUNC (RiscVGetSupervisorAddressTranslationRegister)
> 
> +    csrr  a0, CSR_SATP
> 
> +    ret
> 
> --
> 2.25.1