public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "Oram, Isaac W" <isaac.w.oram@intel.com>
To: "Sinha, Ankit" <ankit.sinha@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Chiu, Chasel" <chasel.chiu@intel.com>,
	"Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
	"Dong, Eric" <eric.dong@intel.com>
Subject: Re: [edk2-platforms PATCH V1 1/6] Platform/Intel: Modifying PCD class for some ACPI related PCDs
Date: Thu, 7 Jul 2022 23:51:14 +0000	[thread overview]
Message-ID: <SA1PR11MB580105B860EAEBC20F149EABD0839@SA1PR11MB5801.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220707173330.2066-2-ankit.sinha@intel.com>

Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

-----Original Message-----
From: Sinha, Ankit <ankit.sinha@intel.com> 
Sent: Thursday, July 7, 2022 10:33 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; Dong, Eric <eric.dong@intel.com>
Subject: [edk2-platforms PATCH V1 1/6] Platform/Intel: Modifying PCD class for some ACPI related PCDs

From: ankit13s <ankit.sinha@intel.com>

Some PCDs related to FADT entries need to be defined as dynamic for boottime customization and update.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Eric Dong <eric.dong@intel.com>

Signed-off-by: Ankit Sinha <ankit.sinha@intel.com>
---
 Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c   | 29 ++++++++++---------
 Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 24 +++++++++-------
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec               | 30 ++++++++++----------
 3 files changed, 44 insertions(+), 39 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 3c9f79de5c6c..c7e87cbd7d9d 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -1068,7 +1068,7 @@ InstallMcfgFromScratch (
              &McfgTable->Header,
              EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
              EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
-             0
+             FixedPcdGet32 (PcdAcpiDefaultOemRevision)
              );
   if (EFI_ERROR (Status)) {
     return Status;
@@ -1195,6 +1195,7 @@ PlatformUpdateTables (
     FadtHeader->PreferredPmProfile                = PcdGet8 (PcdFadtPreferredPmProfile);
     FadtHeader->IaPcBootArch                      = PcdGet16 (PcdFadtIaPcBootArch);
     FadtHeader->Flags                             = PcdGet32 (PcdFadtFlags);
+    FadtHeader->SmiCmd                            = PcdGet32 (PcdFadtSmiCmd);
     FadtHeader->AcpiEnable                        = PcdGet8 (PcdAcpiEnableSwSmi);
     FadtHeader->AcpiDisable                       = PcdGet8 (PcdAcpiDisableSwSmi);
     FadtHeader->Pm1aEvtBlk                        = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
@@ -1209,6 +1210,7 @@ PlatformUpdateTables (
     FadtHeader->Gpe1Base                          = PcdGet8 (PcdAcpiGpe1Base);
 
     FadtHeader->XPm1aEvtBlk.Address               = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+    FadtHeader->XPm1bEvtBlk.Address               = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
     FadtHeader->XPm1aCntBlk.Address               = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
     FadtHeader->XPm1bCntBlk.Address               = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
     FadtHeader->XPm2CntBlk.Address                = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
@@ -1216,7 +1218,7 @@ PlatformUpdateTables (
     FadtHeader->XGpe0Blk.Address                  = PcdGet16 (PcdAcpiGpe0BlockAddress);
     FadtHeader->XGpe1Blk.Address                  = PcdGet16 (PcdAcpiGpe1BlockAddress);
 
-    FadtHeader->ResetReg.AccessSize               = PcdGet8 (PcdAcpiResetRegAccessSize);
+    FadtHeader->ResetReg.AccessSize               = PcdGet8 (PcdAcpiResetRegisterAccessSize);
     FadtHeader->XPm1aEvtBlk.AccessSize            = PcdGet8 (PcdAcpiXPm1aEvtBlkAccessSize);
     FadtHeader->XPm1bEvtBlk.AccessSize            = PcdGet8 (PcdAcpiXPm1bEvtBlkAccessSize);
     FadtHeader->XPm1aCntBlk.AccessSize            = PcdGet8 (PcdAcpiXPm1aCntBlkAccessSize);
@@ -1226,22 +1228,23 @@ PlatformUpdateTables (
     FadtHeader->XGpe0Blk.AccessSize               = PcdGet8 (PcdAcpiXGpe0BlkAccessSize);
     FadtHeader->XGpe1Blk.AccessSize               = PcdGet8 (PcdAcpiXGpe1BlkAccessSize);
 
-    FadtHeader->SleepControlReg.AddressSpaceId    = PcdGet8 (PcdAcpiSleepControlRegAddressSpaceId);
-    FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepControlRegRegisterBitOffset);
-    FadtHeader->SleepControlReg.AccessSize        = PcdGet8 (PcdAcpiSleepControlRegAccessSize);
-    FadtHeader->SleepControlReg.Address           = PcdGet64 (PcdAcpiSleepControlRegAddress);
-    FadtHeader->SleepStatusReg.AddressSpaceId     = PcdGet8 (PcdAcpiSleepStatusRegAddressSpaceId);
-    FadtHeader->SleepStatusReg.RegisterBitWidth   = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitWidth);
-    FadtHeader->SleepStatusReg.RegisterBitOffset  = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitOffset);
-    FadtHeader->SleepStatusReg.AccessSize         = PcdGet8 (PcdAcpiSleepStatusRegAccessSize);
-    FadtHeader->SleepStatusReg.Address            = PcdGet64 (PcdAcpiSleepStatusRegAddress);
+    FadtHeader->SleepControlReg.AddressSpaceId    = PcdGet8 (PcdAcpiSleepControlRegisterAddressSpaceId);
+    FadtHeader->SleepControlReg.RegisterBitWidth  = PcdGet8 (PcdAcpiSleepControlRegisterBitWidth);
+    FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepControlRegisterBitOffset);
+    FadtHeader->SleepControlReg.AccessSize        = PcdGet8 (PcdAcpiSleepControlRegisterAccessSize);
+    FadtHeader->SleepControlReg.Address           = PcdGet64 (PcdAcpiSleepControlRegisterAddress);
+    FadtHeader->SleepStatusReg.AddressSpaceId     = PcdGet8 (PcdAcpiSleepStatusRegisterAddressSpaceId);
+    FadtHeader->SleepStatusReg.RegisterBitWidth   = PcdGet8 (PcdAcpiSleepStatusRegisterBitWidth);
+    FadtHeader->SleepStatusReg.RegisterBitOffset  = PcdGet8 (PcdAcpiSleepStatusRegisterBitOffset);
+    FadtHeader->SleepStatusReg.AccessSize         = PcdGet8 (PcdAcpiSleepStatusRegisterAccessSize);
+    FadtHeader->SleepStatusReg.Address            = PcdGet64 (PcdAcpiSleepStatusRegisterAddress);
 
     FadtHeader->S4BiosReq                         = PcdGet8 (PcdAcpiS4BiosReq);
     FadtHeader->XPm1aEvtBlk.Address               = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
     FadtHeader->XPm1bEvtBlk.Address               = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
 
-    FadtHeader->DutyOffset = PcdGet8 (PcdFadtDutyOffset);
-    FadtHeader->DutyWidth = PcdGet8 (PcdFadtDutyWidth);
+    FadtHeader->DutyOffset                        = PcdGet8 (PcdFadtDutyOffset);
+    FadtHeader->DutyWidth                         = PcdGet8 (PcdFadtDutyWidth);
 
     DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table));
     DEBUG ((DEBUG_INFO, "  IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)); diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
index 119212d2216b..31b6c3be3cc1 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
@@ -71,6 +71,8 @@
   gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
   gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
+  gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch
+  gMinPlatformPkgTokenSpaceGuid.PcdFadtSmiCmd
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress
@@ -82,7 +84,7 @@
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize
@@ -91,16 +93,16 @@
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddressSpaceI
+ d  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitWidth
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitOffset
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAccessSize
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddress
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddressSpaceId
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitWidth
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitOffset
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAccessSize
+  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddress
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq
 
 
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index 68ab1d702d6a..58fc5ba15908 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -112,9 +112,7 @@
   gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022
   gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023
 
-  gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025
-  gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026
-  gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtSmiCmd|0x000000B2|UINT32|0x900000
+ 2A
 
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
@@ -126,7 +124,7 @@
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x0001003C
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003D
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize|0x00|UINT8|0x00010042
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize|0x00|UINT
+ 8|0x00010042
 
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UINT8|0x00010043
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UINT8|0x00010044
@@ -136,17 +134,6 @@
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT8|0x00010048
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8|0x00010049
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8|0x0001004A
-
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId|0x00|UINT8|0x0001004B
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth|0x00|UINT8|0x0001004C
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset|0x00|UINT8|0x0001004D
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize|0x00|UINT8|0x0001004E
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress|0x0000000000000000|UINT64|0x0001004F
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId|0x00|UINT8|0x00010050
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth|0x00|UINT8|0x00010051
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset|0x00|UINT8|0x00010052
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize|0x00|UINT8|0x00010053
-  gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress|0x0000000000000000|UINT64|0x00010054
   gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055
 
   #
@@ -271,6 +258,19 @@
 
 [PcdsDynamic, PcdsDynamicEx]
   gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x9
+ 0000025
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x9000
+ 0026
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x9000002
+ 7  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddressSpaceI
+ d|0x00|UINT8|0x0001004B  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitWidth|0x00
+ |UINT8|0x0001004C  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitOffset|0x0
+ 0|UINT8|0x0001004D  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAccessSize|0x
+ 00|UINT8|0x0001004E  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddress|0x000
+ 0000000000000|UINT64|0x0001004F
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddressSpaceId
+ |0x00|UINT8|0x00010050
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitWidth|0x00|
+ UINT8|0x00010051
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitOffset|0x00
+ |UINT8|0x00010052
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAccessSize|0x0
+ 0|UINT8|0x00010053
+  
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddress|0x0000
+ 000000000000|UINT64|0x00010054
 
 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
 
--
2.27.0.windows.1


  reply	other threads:[~2022-07-07 23:51 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-07 17:33 [edk2-platforms PATCH V1 0/6] Re-organizing ACPI FADT PCD categories Sinha, Ankit
2022-07-07 17:33 ` [edk2-platforms PATCH V1 1/6] Platform/Intel: Modifying PCD class for some ACPI related PCDs Sinha, Ankit
2022-07-07 23:51   ` Oram, Isaac W [this message]
2022-07-07 17:33 ` [edk2-platforms PATCH V1 2/6] Platform/Intel: Removing ACPI FADT PCDs that are redefined Sinha, Ankit
2022-07-07 23:51   ` Oram, Isaac W
2022-07-07 17:33 ` [edk2-platforms PATCH V1 3/6] Platform/Intel: Modifying PCD category based on MinPlatformPkg Sinha, Ankit
2022-07-07 23:51   ` [edk2-devel] " Oram, Isaac W
2022-07-07 17:33 ` [edk2-platforms PATCH V1 4/6] Platform/Intel: Updating " Sinha, Ankit
2022-07-07 23:51   ` Oram, Isaac W
2022-07-07 17:33 ` [edk2-platforms PATCH V1 5/6] Platform/Intel: Removing ACPI FADT PCDs that are redefined Sinha, Ankit
2022-07-07 23:52   ` [edk2-devel] " Oram, Isaac W
2022-07-07 17:33 ` [edk2-platforms PATCH V1 6/6] Platform/Intel: Remove and re-categorize ACPI FADT PCDs Sinha, Ankit
2022-07-07 23:52   ` Oram, Isaac W
2022-07-12 16:18 ` [edk2-devel] [edk2-platforms PATCH V1 0/6] Re-organizing ACPI FADT PCD categories Oram, Isaac W
     [not found] ` <17012142FB8117E1.15323@groups.io>
2022-07-12 16:20   ` Oram, Isaac W

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=SA1PR11MB580105B860EAEBC20F149EABD0839@SA1PR11MB5801.namprd11.prod.outlook.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox