From: "Isaac Oram" <isaac.w.oram@intel.com>
To: Benjamin Doron <benjamin.doron00@gmail.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Sinha, Ankit" <ankit.sinha@intel.com>,
"Chiu, Chasel" <chasel.chiu@intel.com>,
"Soller, Jeremy" <jeremy@system76.com>,
"Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>
Subject: Re: [edk2-platforms][PATCH v3 4/4] KabylakeOpenBoardPkg: Example of board S3
Date: Mon, 12 Sep 2022 23:32:06 +0000 [thread overview]
Message-ID: <SA1PR11MB58019BBA2E424355B7B3CDF3D0449@SA1PR11MB5801.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220912171250.1515536-5-benjamin.doron00@gmail.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
-----Original Message-----
From: Benjamin Doron <benjamin.doron00@gmail.com>
Sent: Monday, September 12, 2022 10:13 AM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Sinha, Ankit <ankit.sinha@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Soller, Jeremy <jeremy@system76.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>
Subject: [edk2-platforms][PATCH v3 4/4] KabylakeOpenBoardPkg: Example of board S3
Use silicon code to detect S3 resume state. Apply some relevant policy modifications.
PcdPeiMemSize must be in common scope, for a DXE module to allocate required memory. Libraries that produce required PPIs are defined.
BootScriptExecutorDxe should only be linked against a functionally compatible debug stack.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ankit Sinha <ankit.sinha@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
---
.../PeiFspMiscUpdUpdateLib.c | 12 +++++-
.../PeiSaPolicyUpdate.c | 12 +++++-
.../PeiAspireVn7Dash572GInitPreMemLib.c | 38 +++++++++++--------
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 3 ++
.../AspireVn7Dash572G/OpenBoardPkg.dsc | 21 ++++++++++
.../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 16 ++------
.../PeiSiliconPolicyUpdateLib.c | 11 +++++-
.../PeiSiliconPolicyUpdateLib.inf | 1 +
.../PeiFspMiscUpdUpdateLib.c | 11 +++++-
.../PeiSaPolicyUpdate.c | 12 +++++-
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 1 +
.../BoardInitLib/PeiGalagoPro3InitPreMemLib.c | 27 ++++++++++++-
.../PeiMultiBoardInitPreMemLib.inf | 1 +
.../GalagoPro3/OpenBoardPkg.dsc | 15 ++++++++
.../GalagoPro3/OpenBoardPkgPcd.dsc | 2 +-
.../PeiFspMiscUpdUpdateLib.c | 12 +++++-
.../PeiSaPolicyUpdate.c | 12 +++++-
.../BoardInitLib/PeiBoardInitPreMemLib.inf | 1 +
.../PeiKabylakeRvp3InitPreMemLib.c | 27 ++++++++++++-
.../PeiMultiBoardInitPreMemLib.inf | 1 +
.../KabylakeRvp3/OpenBoardPkg.dsc | 12 ++++++
.../KabylakeRvp3/OpenBoardPkgPcd.dsc | 2 +-
.../PeiSiliconPolicyUpdateLib.c | 11 +++++-
.../PeiSiliconPolicyUpdateLib.inf | 1 +
24 files changed, 222 insertions(+), 40 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
index a9b7e446c8d6..7e4194bf4fe6 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/L
+++ ibrary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -11,6 +11,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/DebugLib.h> #include <Library/PciLib.h> #include <Library/PeiLib.h>+#include <Library/PeiServicesLib.h>+ #include <FspEas.h> #include <FspmUpd.h> #include <FspsUpd.h>@@ -32,11 +34,15 @@ PeiFspMiscUpdUpdatePreMem (
) { EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; UINTN VariableSize; VOID *FspNvsBufferPtr; UINT8 MorControl; VOID *MorControlPtr; + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ // // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths. //@@ -70,7 +76,11 @@ PeiFspMiscUpdUpdatePreMem (
&VariableSize ); DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));- if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {+ //+ // Do not set CleanMemory on S3 resume+ // TODO: Handle advanced features later - capsule update is in-memory list+ //+ if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode != BOOT_ON_S3_RESUME) { FspmUpd->FspmConfig.CleanMemory = (BOOLEAN)(MorControl & MOR_CLEAR_MEMORY_BIT_MASK); } diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
index 4621cbd3ca3a..98db86570368 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/L
+++ ibrary/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
@@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h> #include <Library/PeiSaPolicyLib.h> #include <Library/PeiLib.h>+#include <Library/PeiServicesLib.h> /** Performs FSP SA PEI Policy initialization.@@ -27,12 +28,17 @@ PeiFspSaPolicyUpdate (
IN OUT FSPS_UPD *FspsUpd ) {+ EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; VOID *Buffer; VOID *MemBuffer; UINT32 Size; DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n")); + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; Size = 0;@@ -40,7 +46,11 @@ PeiFspSaPolicyUpdate (
PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size); if (Buffer == NULL) { DEBUG((DEBUG_WARN, "Could not locate VBT\n"));- } else {+ //+ // Graphics initialization is unnecessary,+ // OS has present framebuffer.+ //+ } else if (BootMode != BOOT_ON_S3_RESUME) { MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)); if ((MemBuffer != NULL) && (Buffer != NULL)) { CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GInitPreMemLib.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GInitPreMemLib.c
index 1c9a65399b54..3029354b96cd 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GInitPreMemLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/Boar
+++ dInitLib/PeiAspireVn7Dash572GInitPreMemLib.c
@@ -11,7 +11,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/MemoryAllocationLib.h> #include <Library/PcdLib.h> #include <Library/PchCycleDecodingLib.h>+#include <Library/PchPmcLib.h> #include <Library/PchResetLib.h>+#include <Library/PciLib.h> #include <Library/SiliconInitLib.h> #include <Library/TimerLib.h> #include <Library/PeiLib.h>@@ -267,25 +269,31 @@ AspireVn7Dash572GBoardBootModeDetect (
VOID ) {- UINT16 ABase;+ EFI_BOOT_MODE BootMode; UINT32 SleepType; DEBUG ((DEBUG_INFO, "Performing boot mode detection\n")); - // TODO: Perform advanced detection (recovery/capsule)- // FIXME: This violates PI specification? But BOOT_WITH* would always take precedence- // over BOOT_ON_S{4,5}...- PchAcpiBaseGet (&ABase);- SleepType = IoRead32 (ABase + R_PCH_ACPI_PM1_CNT) & B_PCH_ACPI_PM1_CNT_SLP_TYP;+ // Known sane defaults; TODO: Consider "default"?+ BootMode = BOOT_WITH_FULL_CONFIGURATION; - switch (SleepType) {- case V_PCH_ACPI_PM1_CNT_S3:- return BOOT_ON_S3_RESUME;- case V_PCH_ACPI_PM1_CNT_S4:- return BOOT_ON_S4_RESUME;-// case V_PCH_ACPI_PM1_CNT_S5:-// return BOOT_ON_S5_RESUME;- default:- return BOOT_WITH_FULL_CONFIGURATION;+ // TODO: Perform advanced detection (capsule/recovery)+ // TODO: Perform "IsFirstBoot" test with VariablePpi for "minimal"/"assume"+ if (GetSleepTypeAfterWakeup (&SleepType)) {+ switch (SleepType) {+ case V_PCH_ACPI_PM1_CNT_S3:+ BootMode = BOOT_ON_S3_RESUME;+ break;+ case V_PCH_ACPI_PM1_CNT_S4:+ BootMode = BOOT_ON_S4_RESUME;+ break;+ case V_PCH_ACPI_PM1_CNT_S5:+ BootMode = BOOT_ON_S5_RESUME;+ break;+ } }++ DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));++ return BootMode; }diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
index cd9f979d313c..c53114e15450 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/Boar
+++ dInitLib/PeiBoardInitPreMemLib.inf
@@ -25,11 +25,14 @@
TimerLib PchCycleDecodingLib PchResetLib+ PciLib IoLib EcLib BoardEcLib GpioLib PeiLib+ PeiServicesLib+ PchPmcLib [Packages] MinPlatformPkg/MinPlatformPkg.decdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
index efe29c617a02..20c42a7c1c20 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg
+++ .dsc
@@ -249,6 +249,7 @@
# Silicon Package ####################################### ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf+ SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf ####################################### # Platform Package@@ -712,6 +713,26 @@
!endif } +!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable == TRUE+ MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf {+ <LibraryClasses>+ # On S3 resume, RSC is in end-of-BS state+ # - Moreover: Library cannot effectively use some end-of-BS events+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf+ # Reverse-ranked priority list+# TODO: Requires testing+# - Strongly suspect DebugLibSerialPort constructor presents PeiDxeSerialPortLibMem dependency on services as a bug+!if FALSE # $(USE_MEMORY_LOGGING) == TRUE+ SerialPortLib|MdeModulePkg/Library/PeiDxeSerialPortLibMem/DxeSerialPortLibMem.inf+!endif+ # Also, can debug CpuExceptionHandlerLib+!if $(USE_HDMI_DEBUG_PORT) == TRUE+ SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf+!endif+ }+!endif+ !endif #######################################diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
index 3ed7aa0a2b10..490c3ee6bf76 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg
+++ Pcd.dsc
@@ -127,10 +127,7 @@
# PcdIpmiFeatureEnable will not be enabled (no BMC) # TODO: Can be build-time (user) choice gNetworkFeaturePkgTokenSpaceGuid.PcdNetworkFeatureEnable |FALSE- # TODO: Continue developing support. Broken at present.- # - PeiSmmAccessLib in IntelSiliconPkg seems like a stub- # - May require a PeiSmmControlLib to SMM communicate- gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable |FALSE+ gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable |TRUE # TODO: Definitions (now added SmbiosDxe) gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable |TRUE # Requires actual hook-up@@ -335,6 +332,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|4 gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000+ gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 # # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags@@ -360,13 +358,8 @@
# 0x7F, 0xFF, 0x04, 0x00}<BR> gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x1F, 0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xFF, 0x04, 0x00} -!if $(TARGET) == RELEASE- gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x800-!else- gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B # TODO-!endif- # TODO: Consider using reserved space instead for debug log- gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x200+ gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x4800+ gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x100 !if $(TARGET) == RELEASE gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70 !else@@ -447,7 +440,6 @@
# Edk2 Configuration ###################################### gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148- gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 ###################################### # Platform Configurationdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
index 3764f7c3ac09..04cd2e741489 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Libra
+++ ry/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
@@ -20,6 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/DebugLib.h> #include <Library/ConfigBlockLib.h> #include <Library/PeiLib.h>+#include <Library/PeiServicesLib.h> #include <Library/BaseMemoryLib.h> #include <Library/MemoryAllocationLib.h> #include <Library/CpuPlatformLib.h>@@ -549,6 +550,7 @@ SiliconPolicyUpdatePostMem (
) { EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; VOID *Buffer; VOID *MemBuffer; UINT32 Size;@@ -557,6 +559,9 @@ SiliconPolicyUpdatePostMem (
DEBUG((DEBUG_INFO, "\nUpdating Policy in Post Mem\n")); + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ GtConfig = NULL; Status = GetConfigBlock ((VOID *) Policy, &gGraphicsPeiConfigGuid, (VOID *)&GtConfig); ASSERT_EFI_ERROR (Status);@@ -571,7 +576,11 @@ SiliconPolicyUpdatePostMem (
PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size); if (Buffer == NULL) { DEBUG((DEBUG_WARN, "Could not locate VBT\n"));- } else {+ //+ // Graphics initialization is unnecessary,+ // OS has present framebuffer.+ //+ } else if (BootMode != BOOT_ON_S3_RESUME) { MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)); if ((MemBuffer != NULL) && (Buffer != NULL)) { CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
index 1ce26fc3dcec..31a45292209d 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Libra
+++ ry/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -23,6 +23,7 @@
BaseMemoryLib MemoryAllocationLib PeiLib+ PeiServicesLib CpuPlatformLib PchPcieRpLib PchInfoLibdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
index dbc84631acaa..ce309bd378d2 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/
+++ PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/DebugLib.h> #include <Library/PeiLib.h> #include <Library/ConfigBlockLib.h>+#include <Library/PeiServicesLib.h> #include <FspEas.h> #include <FspmUpd.h>@@ -36,11 +37,15 @@ PeiFspMiscUpdUpdatePreMem (
) { EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; UINTN VariableSize; VOID *FspNvsBufferPtr; UINT8 MorControl; VOID *MorControlPtr; + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ // // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths. //@@ -75,7 +80,11 @@ PeiFspMiscUpdUpdatePreMem (
&VariableSize ); DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));- if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {+ //+ // Do not set CleanMemory on S3 resume+ // TODO: Handle advanced features later - capsule update is in-memory list+ //+ if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode != BOOT_ON_S3_RESUME) { FspmUpd->FspmConfig.CleanMemory = (BOOLEAN)(MorControl & MOR_CLEAR_MEMORY_BIT_MASK); } diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
index 133b8c963f65..6fd45cc79f61 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/
+++ PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h> #include <Library/PeiSaPolicyLib.h> #include <Library/PeiLib.h>+#include <Library/PeiServicesLib.h> /** Performs FSP SA PEI Policy initialization.@@ -33,12 +34,17 @@ PeiFspSaPolicyUpdate (
IN OUT FSPS_UPD *FspsUpd ) {+ EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; VOID *Buffer; VOID *MemBuffer; UINT32 Size; DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n")); + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; Size = 0;@@ -46,7 +52,11 @@ PeiFspSaPolicyUpdate (
PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size); if (Buffer == NULL) { DEBUG((DEBUG_WARN, "Could not locate VBT\n"));- } else {+ //+ // Graphics initialization is unnecessary,+ // OS has present framebuffer.+ //+ } else if (BootMode != BOOT_ON_S3_RESUME) { MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)); if ((MemBuffer != NULL) && (Buffer != NULL)) { CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
index d6c91cd2b94b..5b3a6921d0ee 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLi
+++ b/PeiBoardInitPreMemLib.inf
@@ -23,6 +23,7 @@
PcdLib SiliconInitLib PchResetLib+ PchPmcLib [Packages] MinPlatformPkg/MinPlatformPkg.decdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiGalagoPro3InitPreMemLib.c b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiGalagoPro3InitPreMemLib.c
index 051dac0b204d..1cd2baf4a4dd 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiGalagoPro3InitPreMemLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLi
+++ b/PeiGalagoPro3InitPreMemLib.c
@@ -14,6 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/HobLib.h> #include <Library/PcdLib.h> #include <Library/PchCycleDecodingLib.h>+#include <Library/PchPmcLib.h> #include <Library/PciLib.h> #include <Library/PcdLib.h> #include <Library/BaseMemoryLib.h>@@ -236,5 +237,29 @@ GalagoPro3BoardBootModeDetect (
VOID ) {- return BOOT_WITH_FULL_CONFIGURATION;+ EFI_BOOT_MODE BootMode;+ UINT32 SleepType;++ DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));++ // Known sane defaults+ BootMode = BOOT_WITH_FULL_CONFIGURATION;++ if (GetSleepTypeAfterWakeup (&SleepType)) {+ switch (SleepType) {+ case V_PCH_ACPI_PM1_CNT_S3:+ BootMode = BOOT_ON_S3_RESUME;+ break;+ case V_PCH_ACPI_PM1_CNT_S4:+ BootMode = BOOT_ON_S4_RESUME;+ break;+ case V_PCH_ACPI_PM1_CNT_S5:+ BootMode = BOOT_ON_S5_RESUME;+ break;+ }+ }++ DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));++ return BootMode; }diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
index fe31f421356e..20ddac1d994d 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLi
+++ b/PeiMultiBoardInitPreMemLib.inf
@@ -25,6 +25,7 @@
SiliconInitLib MultiBoardInitSupportLib PchResetLib+ PchPmcLib [Packages] MinPlatformPkg/MinPlatformPkg.decdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index f0e9a21ccad9..219ef20e55f0 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -180,6 +180,7 @@
# Silicon Package ####################################### ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf+ SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf ####################################### # Platform Package@@ -494,6 +495,20 @@
!endif } +!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable == TRUE+ MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf {+ <LibraryClasses>+ # On S3 resume, RSC is in end-of-BS state+ # - Moreover: Libraries cannot effectively use some end-of-BS events+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf+ # Reverse-ranked priority list+!if gKabylakeOpenBoardPkgTokenSpaceGuid.PcdI2cHdmiDebugPortEnable == TRUE+ SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf+!endif+ }+!endif+ !endif #######################################diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index 8180312f5ca5..7a73f5a831c6 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -279,6 +279,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000+ gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 # # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags@@ -380,7 +381,6 @@
###################################### gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148- gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 ###################################### # Platform Configurationdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
index 699f4297fad6..71b03f2da464 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Librar
+++ y/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -11,11 +11,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/DebugLib.h> #include <Library/PeiLib.h> #include <Library/ConfigBlockLib.h>+#include <Library/PeiServicesLib.h> #include <FspEas.h> #include <FspmUpd.h> #include <FspsUpd.h>- #include <Library/DebugLib.h> #include <Library/DebugPrintErrorLevelLib.h> #include <Library/PciLib.h>@@ -36,11 +36,15 @@ PeiFspMiscUpdUpdatePreMem (
) { EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; UINTN VariableSize; VOID *FspNvsBufferPtr; UINT8 MorControl; VOID *MorControlPtr; + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ // // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths. //@@ -73,7 +77,11 @@ PeiFspMiscUpdUpdatePreMem (
&VariableSize ); DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));- if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {+ //+ // Do not set CleanMemory on S3 resume+ // TODO: Handle advanced features later - capsule update is in-memory list+ //+ if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode != BOOT_ON_S3_RESUME) { FspmUpd->FspmConfig.CleanMemory = (BOOLEAN)(MorControl & MOR_CLEAR_MEMORY_BIT_MASK); } diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
index d6ec3e38dd7e..e855207af0d1 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Librar
+++ y/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h> #include <Library/PeiSaPolicyLib.h> #include <Library/PeiLib.h>+#include <Library/PeiServicesLib.h> /** Performs FSP SA PEI Policy initialization.@@ -33,12 +34,17 @@ PeiFspSaPolicyUpdate (
IN OUT FSPS_UPD *FspsUpd ) {+ EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; VOID *Buffer; VOID *MemBuffer; UINT32 Size; DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n")); + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1; Size = 0;@@ -46,7 +52,11 @@ PeiFspSaPolicyUpdate (
PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size); if (Buffer == NULL) { DEBUG((DEBUG_WARN, "Could not locate VBT\n"));- } else {+ //+ // Graphics initialization is unnecessary,+ // OS has present framebuffer.+ //+ } else if (BootMode != BOOT_ON_S3_RESUME) { MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)); if ((MemBuffer != NULL) && (Buffer != NULL)) { CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
index 850fc514188b..e0022e8d6118 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInit
+++ Lib/PeiBoardInitPreMemLib.inf
@@ -24,6 +24,7 @@
SiliconInitLib EcLib PchResetLib+ PchPmcLib [Packages] MinPlatformPkg/MinPlatformPkg.decdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiKabylakeRvp3InitPreMemLib.c b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiKabylakeRvp3InitPreMemLib.c
index 87ae3b531ed6..02cd37227e50 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiKabylakeRvp3InitPreMemLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInit
+++ Lib/PeiKabylakeRvp3InitPreMemLib.c
@@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/HobLib.h> #include <Library/PcdLib.h> #include <Library/PchCycleDecodingLib.h>+#include <Library/PchPmcLib.h> #include <Library/PciLib.h> #include <Library/PcdLib.h> #include <Library/BaseMemoryLib.h>@@ -330,5 +331,29 @@ KabylakeRvp3BoardBootModeDetect (
VOID ) {- return BOOT_WITH_FULL_CONFIGURATION;+ EFI_BOOT_MODE BootMode;+ UINT32 SleepType;++ DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));++ // Known sane defaults+ BootMode = BOOT_WITH_FULL_CONFIGURATION;++ if (GetSleepTypeAfterWakeup (&SleepType)) {+ switch (SleepType) {+ case V_PCH_ACPI_PM1_CNT_S3:+ BootMode = BOOT_ON_S3_RESUME;+ break;+ case V_PCH_ACPI_PM1_CNT_S4:+ BootMode = BOOT_ON_S4_RESUME;+ break;+ case V_PCH_ACPI_PM1_CNT_S5:+ BootMode = BOOT_ON_S5_RESUME;+ break;+ }+ }++ DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));++ return BootMode; }diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
index 23fe6b6f03c5..0112bf84a193 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInit
+++ Lib/PeiMultiBoardInitPreMemLib.inf
@@ -26,6 +26,7 @@
MultiBoardInitSupportLib EcLib PchResetLib+ PchPmcLib [Packages] MinPlatformPkg/MinPlatformPkg.decdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 37837eeb04bf..1634d9b31f00 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -202,6 +202,7 @@
# Silicon Package ####################################### ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf+ SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf ####################################### # Platform Package@@ -506,6 +507,17 @@
!endif } +!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable == TRUE+ MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf {+ <LibraryClasses>+ # On S3 resume, RSC is in end-of-BS state+ # - Moreover: Libraries cannot effectively use some end-of-BS events+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf+ # TODO: Insert a reverse-ranked priority list of compatible libraries here+ }+!endif+ !endif #######################################diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index cfd032814850..87510748783f 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d
+++ sc
@@ -279,6 +279,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000+ gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 # # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags@@ -349,7 +350,6 @@
###################################### gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148- gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 ###################################### # Platform Configurationdiff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
index 22aadc0221df..bd3da7f38416 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/Pe
+++ iSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
@@ -20,6 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/DebugLib.h> #include <Library/ConfigBlockLib.h> #include <Library/PeiLib.h>+#include <Library/PeiServicesLib.h> #include <Library/BaseMemoryLib.h> #include <Library/MemoryAllocationLib.h> #include <Library/CpuPlatformLib.h>@@ -513,6 +514,7 @@ SiliconPolicyUpdatePostMem (
) { EFI_STATUS Status;+ EFI_BOOT_MODE BootMode; VOID *Buffer; VOID *MemBuffer; UINT32 Size;@@ -521,6 +523,9 @@ SiliconPolicyUpdatePostMem (
DEBUG((DEBUG_INFO, "\nUpdating Policy in Post Mem\n")); + Status = PeiServicesGetBootMode (&BootMode);+ ASSERT_EFI_ERROR (Status);+ GtConfig = NULL; Status = GetConfigBlock ((VOID *) Policy, &gGraphicsPeiConfigGuid, (VOID *)&GtConfig); ASSERT_EFI_ERROR (Status);@@ -535,7 +540,11 @@ SiliconPolicyUpdatePostMem (
PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size); if (Buffer == NULL) { DEBUG((DEBUG_WARN, "Could not locate VBT\n"));- } else {+ //+ // Graphics initialization is unnecessary,+ // OS has present framebuffer.+ //+ } else if (BootMode != BOOT_ON_S3_RESUME) { MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)); if ((MemBuffer != NULL) && (Buffer != NULL)) { CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
index 25eae88f5989..e9a23593e133 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/Pe
+++ iSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -23,6 +23,7 @@
BaseMemoryLib MemoryAllocationLib PeiLib+ PeiServicesLib CpuPlatformLib PchPcieRpLib PchInfoLib--
2.37.2
next prev parent reply other threads:[~2022-09-12 23:32 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-12 17:12 [edk2-platforms][PATCH v3 0/4] Implement S3 resume Benjamin Doron
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 1/4] MinPlatformPkg: Add SmmLockBox to build Benjamin Doron
2022-09-12 23:31 ` Isaac Oram
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 2/4] S3FeaturePkg: Implement working S3 resume Benjamin Doron
2022-09-12 23:31 ` Isaac Oram
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 3/4] MinPlatformPkg: " Benjamin Doron
2022-09-13 1:00 ` Isaac Oram
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 4/4] KabylakeOpenBoardPkg: Example of board S3 Benjamin Doron
2022-09-12 23:32 ` Isaac Oram [this message]
2022-10-12 1:31 ` [edk2-platforms][PATCH v3 0/4] Implement S3 resume Isaac Oram
[not found] ` <171D2E406AE360FA.17458@groups.io>
2022-10-12 1:32 ` [edk2-devel] " Isaac Oram
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