From: "Isaac Oram" <isaac.w.oram@intel.com>
To: Benjamin Doron <benjamin.doron00@gmail.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Chiu, Chasel" <chasel.chiu@intel.com>,
"Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Sinha, Ankit" <ankit.sinha@intel.com>,
"Gao, Liming" <gaoliming@byosoft.com.cn>,
"Dong, Eric" <eric.dong@intel.com>
Subject: Re: [edk2-platforms][PATCH v3 3/4] MinPlatformPkg: Implement working S3 resume
Date: Tue, 13 Sep 2022 01:00:57 +0000 [thread overview]
Message-ID: <SA1PR11MB5801DE26CB98D8B6995DEBE3D0479@SA1PR11MB5801.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220912171250.1515536-4-benjamin.doron00@gmail.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
-----Original Message-----
From: Benjamin Doron <benjamin.doron00@gmail.com>
Sent: Monday, September 12, 2022 10:13 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Sinha, Ankit <ankit.sinha@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>
Subject: [edk2-platforms][PATCH v3 3/4] MinPlatformPkg: Implement working S3 resume
Consume S3 resume memory allocation on resume flow.
Also, include complementary FirmwarePerformanceDataTablePei module in MinPlatform FV for S3 resume performance measurement.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ankit Sinha <ankit.sinha@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
---
.../FspWrapperHobProcessLib.c | 69 ++++++++++++++++++-
.../PeiFspWrapperHobProcessLib.inf | 2 +
.../Include/Dsc/CorePeiInclude.dsc | 2 +
.../Include/Fdf/CorePostMemoryInclude.fdf | 4 ++
4 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
index 7ee4d3a31c49..9bd6fe6290c5 100644
--- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobP
+++ rocessLib/FspWrapperHobProcessLib.c
@@ -16,14 +16,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/HobLib.h> #include <Library/PcdLib.h> #include <Library/FspWrapperPlatformLib.h>+#include <Guid/AcpiS3Context.h> #include <Guid/GuidHobFspEas.h> #include <Guid/MemoryTypeInformation.h> #include <Guid/GraphicsInfoHob.h> #include <Guid/PcdDataBaseHobGuid.h> #include <Guid/ZeroGuid.h> #include <Ppi/Capsule.h>+#include <Ppi/ReadOnlyVariable2.h> #include <FspEas.h>+#include <AcpiS3MemoryNvData.h> // // Additional pages are used by DXE memory manager.@@ -130,6 +133,55 @@ GetPeiMemSize (
return MinSize + Size + PEI_ADDITIONAL_MEMORY_SIZE; } +/**+ Get S3 PEI memory information.++ @note At this point, memory is ready, and PeiServices are available to use.+ Platform can get some data from SMRAM directly.++ @param[out] S3PeiMemSize PEI memory size to be installed in S3 phase.+ @param[out] S3PeiMemBase PEI memory base to be installed in S3 phase.++ @return If S3 PEI memory information is got successfully.+**/+EFI_STATUS+EFIAPI+GetS3MemoryInfo (+ OUT UINT64 *S3PeiMemSize,+ OUT EFI_PHYSICAL_ADDRESS *S3PeiMemBase+ )+{+ EFI_STATUS Status;+ EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariablePpi;+ UINTN DataSize;+ ACPI_S3_MEMORY S3MemoryInfo;++ *S3PeiMemBase = 0;+ *S3PeiMemSize = 0;++ Status = PeiServicesLocatePpi (&gEfiPeiReadOnlyVariable2PpiGuid, 0, NULL, (VOID **) &VariablePpi);+ ASSERT_EFI_ERROR (Status);++ DataSize = sizeof (S3MemoryInfo);+ Status = VariablePpi->GetVariable (+ VariablePpi,+ ACPI_S3_MEMORY_NV_NAME,+ &gEfiAcpiVariableGuid,+ NULL,+ &DataSize,+ &S3MemoryInfo+ );+ ASSERT_EFI_ERROR (Status);++ if (EFI_ERROR (Status)) {+ return Status;+ }++ *S3PeiMemBase = S3MemoryInfo.S3PeiMemBase;+ *S3PeiMemSize = S3MemoryInfo.S3PeiMemSize;+ return EFI_SUCCESS;+}+ /** Post FSP-M HOB process for Memory Resource Descriptor. @@ -280,7 +332,7 @@ PostFspmHobProcess (
0x1000 ); -+ if (BootMode != BOOT_ON_S3_RESUME) { // // Capsule mode //@@ -337,7 +389,22 @@ PostFspmHobProcess (
if (Capsule != NULL) { Status = Capsule->CreateState ((EFI_PEI_SERVICES **)PeiServices, CapsuleBuffer, CapsuleBufferLength); }+ } else {+ Status = GetS3MemoryInfo (&PeiMemSize, &PeiMemBase);+ ASSERT_EFI_ERROR (Status); + DEBUG ((DEBUG_INFO, "S3 resume PeiMemBase : 0x%08x\n", PeiMemBase));+ DEBUG ((DEBUG_INFO, "S3 resume PeiMemSize : 0x%08x\n", PeiMemSize));++ //+ // Install efi memory+ //+ Status = PeiServicesInstallPeiMemory (+ PeiMemBase,+ PeiMemSize+ );+ ASSERT_EFI_ERROR (Status);+ } // // Create a memory allocation HOB at fixed location for MP Services PPI AP wait loop.diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
index b846e7af1d2d..e2aac36bf018 100644
--- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobP
+++ rocessLib/PeiFspWrapperHobProcessLib.inf
@@ -75,7 +75,9 @@
gZeroGuid gEfiGraphicsInfoHobGuid gEfiGraphicsDeviceInfoHobGuid+ gEfiAcpiVariableGuid [Ppis] gEfiPeiCapsulePpiGuid ## CONSUMES+ gEfiPeiReadOnlyVariable2PpiGuid ## CONSUMES gEdkiiSiliconInitializedPpiGuid ## PRODUCESdiff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc
index 08e50cac075f..f271fb26b189 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc
+++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc
@@ -41,3 +41,5 @@
NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256.inf } !endif++ MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.infdiff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf
index 3c2716d6728a..3edc239e5264 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fd
+++ f
@@ -6,3 +6,7 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent # ##++!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE+ INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf+!endif--
2.37.2
next prev parent reply other threads:[~2022-09-13 1:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-12 17:12 [edk2-platforms][PATCH v3 0/4] Implement S3 resume Benjamin Doron
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 1/4] MinPlatformPkg: Add SmmLockBox to build Benjamin Doron
2022-09-12 23:31 ` Isaac Oram
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 2/4] S3FeaturePkg: Implement working S3 resume Benjamin Doron
2022-09-12 23:31 ` Isaac Oram
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 3/4] MinPlatformPkg: " Benjamin Doron
2022-09-13 1:00 ` Isaac Oram [this message]
2022-09-12 17:12 ` [edk2-platforms][PATCH v3 4/4] KabylakeOpenBoardPkg: Example of board S3 Benjamin Doron
2022-09-12 23:32 ` Isaac Oram
2022-10-12 1:31 ` [edk2-platforms][PATCH v3 0/4] Implement S3 resume Isaac Oram
[not found] ` <171D2E406AE360FA.17458@groups.io>
2022-10-12 1:32 ` [edk2-devel] " Isaac Oram
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