From: "Michael D Kinney" <michael.d.kinney@intel.com>
To: Tuan Phan <tphan@ventanamicro.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Gao, Liming" <gaoliming@byosoft.com.cn>,
"Liu, Zhiguang" <zhiguang.liu@intel.com>,
"sunilvl@ventanamicro.com" <sunilvl@ventanamicro.com>,
"git@danielschaefer.me" <git@danielschaefer.me>,
"Warkentin, Andrei" <andrei.warkentin@intel.com>,
"ardb+tianocore@kernel.org" <ardb+tianocore@kernel.org>,
"Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [PATCH v4 2/7] MdePkg/Register: RISC-V: Add satp mode bits shift definition
Date: Tue, 27 Jun 2023 20:10:29 +0000 [thread overview]
Message-ID: <SA2PR11MB49381A35EF692DEAB5F82DEED227A@SA2PR11MB4938.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20230623183934.23905-3-tphan@ventanamicro.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
> -----Original Message-----
> From: Tuan Phan <tphan@ventanamicro.com>
> Sent: Friday, June 23, 2023 11:39 AM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming
> <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>;
> sunilvl@ventanamicro.com; git@danielschaefer.me; Warkentin, Andrei
> <andrei.warkentin@intel.com>; ardb+tianocore@kernel.org; Tuan Phan
> <tphan@ventanamicro.com>
> Subject: [PATCH v4 2/7] MdePkg/Register: RISC-V: Add satp mode bits shift
> definition
>
> The satp mode bits shift is used cross modules. It should be defined
> in one place.
>
> Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> MdePkg/Include/Register/RiscV64/RiscVEncoding.h | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
> b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
> index 5c2989b797bf..2bde8db478ff 100644
> --- a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
> +++ b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
> @@ -58,9 +58,10 @@
> #define PRV_S 1UL
>
> #define PRV_M 3UL
>
>
>
> -#define SATP64_MODE 0xF000000000000000ULL
>
> -#define SATP64_ASID 0x0FFFF00000000000ULL
>
> -#define SATP64_PPN 0x00000FFFFFFFFFFFULL
>
> +#define SATP64_MODE 0xF000000000000000ULL
>
> +#define SATP64_MODE_SHIFT 60
>
> +#define SATP64_ASID 0x0FFFF00000000000ULL
>
> +#define SATP64_PPN 0x00000FFFFFFFFFFFULL
>
>
>
> #define SATP_MODE_OFF 0UL
>
> #define SATP_MODE_SV32 1UL
>
> --
> 2.25.1
next prev parent reply other threads:[~2023-06-27 20:10 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-23 18:39 [PATCH v4 0/7] RISC-V: Add MMU support Tuan Phan
2023-06-23 18:39 ` [PATCH v4 1/7] MdePkg/BaseLib: RISC-V: Support getting satp register value Tuan Phan
2023-06-23 18:39 ` [PATCH v4 2/7] MdePkg/Register: RISC-V: Add satp mode bits shift definition Tuan Phan
2023-06-27 20:10 ` Michael D Kinney [this message]
2023-06-23 18:39 ` [PATCH v4 3/7] OvmfPkg/RiscVVirt: VirtNorFlashPlatformLib: Fix wrong flash size Tuan Phan
2023-06-23 18:39 ` [PATCH v4 4/7] OvmfPkg/RiscVVirt: SEC: Add IO memory resource hob for platform devices Tuan Phan
2023-06-23 18:39 ` [PATCH v4 5/7] OvmfPkg/RiscVVirt: Add VirtNorFlashDxe to APRIORI list Tuan Phan
2023-06-28 16:47 ` Sunil V L
2023-06-28 21:27 ` Tuan Phan
2023-07-04 5:07 ` Sunil V L
2023-07-04 6:45 ` Tuan Phan
2023-07-04 7:01 ` Sunil V L
2023-07-13 19:08 ` Tuan Phan
2023-07-14 4:19 ` Sunil V L
2023-06-23 18:39 ` [PATCH v4 6/7] OvmfPkg: RiscVVirt: Remove satp bare mode setting Tuan Phan
2023-06-23 18:39 ` [PATCH v4 7/7] UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode Tuan Phan
2023-07-14 10:24 ` Sunil V L
2023-07-14 19:10 ` Tuan Phan
2023-06-25 8:45 ` [edk2-devel] UsbNetworkPkg not find in UDK 202305 stable version Yoshinoya
2023-07-15 5:21 ` [PATCH v4 0/7] RISC-V: Add MMU support Sunil V L
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