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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Michael D Kinney > -----Original Message----- > From: Tuan Phan > Sent: Friday, June 23, 2023 11:39 AM > To: devel@edk2.groups.io > Cc: Kinney, Michael D ; Gao, Liming > ; Liu, Zhiguang ; > sunilvl@ventanamicro.com; git@danielschaefer.me; Warkentin, Andrei > ; ardb+tianocore@kernel.org; Tuan Phan > > Subject: [PATCH v4 2/7] MdePkg/Register: RISC-V: Add satp mode bits shift > definition >=20 > The satp mode bits shift is used cross modules. It should be defined > in one place. >=20 > Signed-off-by: Tuan Phan > Reviewed-by: Andrei Warkentin > Reviewed-by: Sunil V L > --- > MdePkg/Include/Register/RiscV64/RiscVEncoding.h | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) >=20 > diff --git a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h > b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h > index 5c2989b797bf..2bde8db478ff 100644 > --- a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h > +++ b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h > @@ -58,9 +58,10 @@ > #define PRV_S 1UL >=20 > #define PRV_M 3UL >=20 >=20 >=20 > -#define SATP64_MODE 0xF000000000000000ULL >=20 > -#define SATP64_ASID 0x0FFFF00000000000ULL >=20 > -#define SATP64_PPN 0x00000FFFFFFFFFFFULL >=20 > +#define SATP64_MODE 0xF000000000000000ULL >=20 > +#define SATP64_MODE_SHIFT 60 >=20 > +#define SATP64_ASID 0x0FFFF00000000000ULL >=20 > +#define SATP64_PPN 0x00000FFFFFFFFFFFULL >=20 >=20 >=20 > #define SATP_MODE_OFF 0UL >=20 > #define SATP_MODE_SV32 1UL >=20 > -- > 2.25.1