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Thread-Topic: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add PCD for shadowing all microcode. Thread-Index: AQHWcH3xyuJZ6EUoG028rAn2IG6CzKl2AuzAgAFBYQCAAGSP4IAdgNSAgAALapCAAxBYIA== Date: Thu, 15 Oct 2020 01:35:20 +0000 Message-ID: References: <20200812075452.9054-1-aaron.li@intel.com> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.198.147.198] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: d16fb7bf-ddec-40ba-709a-08d870aa9408 x-ms-traffictypediagnostic: BY5PR11MB4322: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7219; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 4/sg7ZMCxQ8PjSj43j/IfmqVrAbxJKqO1VFh/AnwLFO+D3eypMfoBIni01U/qQKq3npKLiLYsx3a7bIs5ZNwoi/tiDZ1tqDrQ8zKJj/MAHaz7xNwmEW1aZY5yvUzWqB94K6vV5Ly24MPdZPncOFOJ6AcDWF8gTesMWXM+eSkeawG2MW3/55+eGP+BvVHbtsDLW8A9bPuCMdpyGB7Q/4SR0ziGiJQopbhqxb1V9lLOJRvy4SQFqpwfhZ1qM3ip4LbBQcImjmVr1kedihHRvlDcLobED17cXKmvtpY8jyHNlG++bT6F40ESbSTRWiiqjdV77Cq4DpmLa8n3gAQIalZ4HUgUK1JGfBKMcLaOUDx7He5pAvoSBlTXcHWNaRLGZ5md1UiG2oWKivyZ8Ysi0HD3UvoTxcWtnUkCV4GCwMGCsWNd7DAzHb2fdxHg1SF5ibgEk0eVIHCzZEj7iIeLvH64w== x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR11MB4895.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(39860400002)(376002)(396003)(136003)(366004)(346002)(53546011)(33656002)(110136005)(966005)(83080400001)(316002)(5660300002)(2906002)(7696005)(478600001)(52536014)(55016002)(26005)(186003)(107886003)(86362001)(76116006)(66476007)(66556008)(64756008)(8936002)(83380400001)(6506007)(66946007)(66446008)(9686003)(4326008)(8676002)(71200400001)(14943795004);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata: N2AwGuC9Jcz8v+gK0NOnGMHjkE9+DOWtwswGAI0srOoDHCfJlecWvgiYbk4fl0nLKbMCrl5mv8BRKVFZsBFiysBsxxwQiqAVcbcXDWl5CEY/r4FUA5Jx7AkaQYURjkbRyrHnHZ3a2xhhNUdUR2zSLiKfmTlvGBlktffEmONHHt1u2Sq4udwfShEXvViHfKJqx8Kaazo4Q8OLtrZI7wA5mGS3jnMpGbARqO1vEtNJQCCZue3CXvWjoq6xcEryrTnRo8jZ/q5FPXv9iVSR1r+ywaL1c4HgFgvJgUqSjZDMtaQw7aBkeJFKD/iOBjEz+hiYPx4dDMXw/CU1Y7lIchhojRRxJzJHssaiS4yS24fzlQegO8gUcidWHyg/C4GrimtkFsm+BscEIGR7uki9RNHSMlSMLEhEEMJYoWTkx7rAlVHuXicgIhyOQoi8POdRN+dDDwOljbuw+RRsUrK85DV87ZPWdsSxI1WxnhbRV0GqtADy8in8Lwtt6XiU7lwK5D0F3ltzV9vPd/1kGT33RgCSvrc6PnblnAYAe8sBX3XM/khQ9q8YMIoLaxTH5D7jCBNbfzjKjLegLWgNEmVcckibe4H++jSh+FoEdloDo0Vmr4d+1/vEZcBzl9Imo3E3rGAuAPRqr9w9/SEIBzCgRQSS+g== MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR11MB4895.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d16fb7bf-ddec-40ba-709a-08d870aa9408 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Oct 2020 01:35:20.2331 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: HYE/bTeLxnfF3GJu6Xmbkan+V1boFPop6ZUaMEd6IInFzWVJIYTsw/nHdVbE28/jxU60Hf82gjstA2usCVJqOw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR11MB4322 Return-Path: aaron.li@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable Hi Ray, Could you please help to push this patch to edk2-platform? Thanks. Best, Aaron > -----Original Message----- > From: Ni, Ray > Sent: Tuesday, October 13, 2020 10:47 AM > To: Fu, Siyuan ; Li, Aaron ; > devel@edk2.groups.io > Cc: Chaganty, Rangasai V > Subject: RE: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add PCD > for shadowing all microcode. >=20 > Reviewed-by: Ray Ni >=20 > > -----Original Message----- > > From: Fu, Siyuan > > Sent: Tuesday, October 13, 2020 10:06 AM > > To: Ni, Ray ; Li, Aaron ; > devel@edk2.groups.io > > Cc: Chaganty, Rangasai V > > Subject: RE: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add PCD > for shadowing all microcode. > > > > > -----Original Message----- > > > From: Ni, Ray > > > Sent: 2020=1B$BG/=1B(B9=1B$B7n=1B(B24=1B$BF|=1B(B 16:56 > > > To: Li, Aaron ; devel@edk2.groups.io > > > Cc: Chaganty, Rangasai V ; Fu, Siyuan > > > > > > Subject: RE: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add > PCD for > > > shadowing all microcode. > > > > > > Aaron, > > > I understand the requirement now. > > > Can we avoid adding new PCD but re-interpret the ShadowMicrocode() > > > parameter to achieve the same result? > > > > > > For example, we can say when CpuIdCount is 0 and MicrocodeCpuId =3D= =3D > NULL, it > > > means all microcode need to be shadowed. > > > > > > The benefit is: platform can use the single interface to control the > behavior. > > > > Hi, Ray > > > > It's the platform PEIM (the ShadowMicrocode() function itself) to decid= e > which > > Microcode it should shadow to memory, not the caller. So we can't use t= he > input > > Parameter to control the behavior. > > > > Thanks. > > Siyuan > > > > > > > > Thanks, > > > Ray > > > > > > > -----Original Message----- > > > > From: Li, Aaron > > > > Sent: Thursday, September 24, 2020 9:38 AM > > > > To: Ni, Ray ; devel@edk2.groups.io > > > > Cc: Chaganty, Rangasai V ; Fu, Siyua= n > > > > > > > > Subject: RE: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add > PCD for > > > > shadowing all microcode. > > > > > > > > Hi Ray, > > > > > > > > Accroding to > > > > > > > > https://edk2.groups.io/g/devel/files/Designs/2020/0214/Support%20the%20 > 2n > > > d > > > > %20Microcode%20FV%20Flash%20Region.pdf > > > > The ShadowMicrocodePei provide a FIT based shadow microcode ppi to > > > > MpInitLib. It's needed. > > > > > > > > > > > > Best, > > > > Aaron > > > > > > > > > -----Original Message----- > > > > > From: Ni, Ray > > > > > Sent: Wednesday, September 23, 2020 2:25 PM > > > > > To: Li, Aaron ; devel@edk2.groups.io > > > > > Cc: Chaganty, Rangasai V ; Fu, > Siyuan > > > > > > > > > > Subject: RE: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: > Add PCD > > > > > for shadowing all microcode. > > > > > > > > > > MpInitLib already contains logic to shadow microcode to memory. > > > > > Is this still needed? > > > > > > > > > > > -----Original Message----- > > > > > > From: Li, Aaron > > > > > > Sent: Wednesday, August 12, 2020 3:55 PM > > > > > > To: devel@edk2.groups.io > > > > > > Cc: Ni, Ray ; Chaganty, Rangasai V > > > > > > ; Fu, Siyuan > > > > > > Subject: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add > PCD for > > > > > > shadowing all microcode. > > > > > > > > > > > > This patch is to add a PCD PcdShadowAllMicrocode to support > shadowing > > > > > > all microcode patch to memory. > > > > > > > > > > > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2891 > > > > > > > > > > > > Signed-off-by: Aaron Li > > > > > > Cc: Ray Ni > > > > > > Cc: Rangasai V Chaganty > > > > > > Cc: Siyuan Fu > > > > > > --- > > > > > > > > > > > > > > > > > > Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodeP > > > > > ei.c > > > > > > | 4 ++++ > > > > > > > > > > > > > > > > > > Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodeP > > > > > ei.i > > > > > > nf | 3 +++ > > > > > > Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 7 > > > > +++++++ > > > > > > 3 files changed, 14 insertions(+) > > > > > > > > > > > > diff --git > > > > > > > > > > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .c > > > > > > > > > > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .c > > > > > > index 8d6574f66794..5c7ee6910c8e 100644 > > > > > > --- > > > > > > > > > > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .c > > > > > > +++ > > > > > > > > > > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .c > > > > > > @@ -132,6 +132,10 @@ IsMicrocodePatchNeedLoad ( > > > > > > CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable; > > > > > > > > > > > > UINTN Index; > > > > > > > > > > > > > > > > > > > > > > > > + if (FeaturePcdGet (PcdShadowAllMicrocode)) { > > > > > > > > > > > > + return TRUE; > > > > > > > > > > > > + } > > > > > > > > > > > > + > > > > > > > > > > > > // > > > > > > > > > > > > // Check the 'ProcessorSignature' and 'ProcessorFlags' in > microcode > > > patch > > > > > > header. > > > > > > > > > > > > // > > > > > > > > > > > > diff --git > > > > > > > > > > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .inf > > > > > > > > > > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .inf > > > > > > index 019400ab31da..581780add891 100644 > > > > > > --- > > > > > > > > > > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .inf > > > > > > +++ > > > > > > > > > > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > > > > > ePei > > > > > > .inf > > > > > > @@ -39,5 +39,8 @@ [Guids] > > > > > > gEdkiiMicrocodeShadowInfoHobGuid > > > > > > > > > > > > gEdkiiMicrocodeStorageTypeFlashGuid > > > > > > > > > > > > > > > > > > > > > > > > +[Pcd] > > > > > > > > > > > > + gIntelSiliconPkgTokenSpaceGuid.PcdShadowAllMicrocode > > > > > > > > > > > > + > > > > > > > > > > > > [Depex] > > > > > > > > > > > > TRUE > > > > > > > > > > > > diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > > > > > b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > > > > > index e4a7fec3a3ea..3a12fe99fac6 100644 > > > > > > --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > > > > > +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > > > > > @@ -76,6 +76,13 @@ [Protocols] > > > > > > # Include/Protocol/PlatformDeviceSecurityPolicy.h > > > > > > > > > > > > gEdkiiDeviceSecurityPolicyProtocolGuid =3D {0x7ea41a99, 0x5e= 32, > 0x4c97, > > > > > > {0x88, 0xc4, 0xd6, 0xe7, 0x46, 0x84, 0x9, 0xd4}} > > > > > > > > > > > > > > > > > > > > > > > > +[PcdsFeatureFlag] > > > > > > > > > > > > + ## Indicates if all microcode update patches shall be shadow= ed to > > > > > memory. > > > > > > > > > > > > + # TRUE - All microcode patches will be shadowed.
> > > > > > > > > > > > + # FALSE - Only the microcode for current present processor= s will > be > > > > > > shadowed.
> > > > > > > > > > > > + # @Prompt Shadow all microcode update patches. > > > > > > > > > > > > + > > > > > > > > > > > > gIntelSiliconPkgTokenSpaceGuid.PcdShadowAllMicrocode|FALSE|BOOLEAN| > > > > > 0x > > > > > > 00000006 > > > > > > > > > > > > + > > > > > > > > > > > > [PcdsFixedAtBuild, PcdsPatchableInModule] > > > > > > > > > > > > ## Error code for VTd error.

> > > > > > > > > > > > # EDKII_ERROR_CODE_VTD_ERROR =3D (EFI_IO_BUS_UNSPECIFIED > | > > > > > > (EFI_OEM_SPECIFIC | 0x00000000)) =3D 0x02008000
> > > > > > > > > > > > -- > > > > > > 2.23.0.windows.1