From: "Kirkendall, Garrett" <Garrett.Kirkendall@amd.com>
To: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: How do I access Prefetchable Memory region through EFI_PCI_IO_PROTOCOL
Date: Fri, 14 Sep 2018 18:24:38 +0000 [thread overview]
Message-ID: <SN1PR12MB01589E6106E17D1818160FF585190@SN1PR12MB0158.namprd12.prod.outlook.com> (raw)
Hopefully someone can help me understand.
I assume I should be able to access MMIO pointed to by a PCI devices Prefetchable Memory BAR. I would think I would use EFI_PCI_IO_PROTOCOL.Mem.Read or Write. This in turn will send the request up to EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.Mem.Read or Write.
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c: RootBridgeIoMemRead (Write) calls RootBridgeIoCheckParameter() to verify that the request falls within the confines of the PCI root bridge. The below code verifies the address against non-prefetchable MMIO regions and skips the prefetchable memory regions. Is this correct, and if so what is the method to read/write prefetchable memory regions? If I force EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM, then I can access prefetchable memory regions because they are forced within Mem.* and MemAbove4G.*
EFI_STATUS
RootBridgeIoCheckParameter (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
IN OPERATION_TYPE OperationType,
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
IN VOID *Buffer
)
{
...
} else if (OperationType == MemOperation) {
//
// Allow Legacy MMIO access
//
if ((Address >= 0xA0000) && (Address + MultU64x32 (Count, Size)) <= 0xC0000) {
if ((RootBridge->Attributes & EFI_PCI_ATTRIBUTE_VGA_MEMORY) != 0) {
return EFI_SUCCESS;
}
}
//
// By comparing the Address against Limit we know which range to be used
// for checking
//
if (Address + MultU64x32 (Count, Size) <= RootBridge->Mem.Limit + 1) {
Base = RootBridge->Mem.Base;
Limit = RootBridge->Mem.Limit;
} else {
Base = RootBridge->MemAbove4G.Base;
Limit = RootBridge->MemAbove4G.Limit;
}
} else {
...
GARRETT KIRKENDALL
SMTS Firmware Engineer | CTE
7171 Southwest Parkway, Austin, TX 78735 USA
AMD facebook | amd.com
next reply other threads:[~2018-09-14 18:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-14 18:24 Kirkendall, Garrett [this message]
2018-09-16 10:19 ` How do I access Prefetchable Memory region through EFI_PCI_IO_PROTOCOL Laszlo Ersek
2018-09-19 1:53 ` Kirkendall, Garrett
2018-09-21 7:25 ` Ni, Ruiyu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=SN1PR12MB01589E6106E17D1818160FF585190@SN1PR12MB0158.namprd12.prod.outlook.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox