From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "Esakkithevar, Kathappan" <kathappan.esakkithevar@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>,
"Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Kethi Reddy, Deepika" <deepika.kethi.reddy@intel.com>
Subject: Re: [Patch V1 1/1] CometlakeOpenBoardPkg: Fix build error due to Ddr4MixedUDimm2DpcLimit
Date: Tue, 12 May 2020 23:58:37 +0000 [thread overview]
Message-ID: <SN6PR11MB281409E7458073A777E81589E6BE0@SN6PR11MB2814.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20200512172555.56680-1-kathappan.esakkithevar@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Esakkithevar, Kathappan <kathappan.esakkithevar@intel.com>
> Sent: Wednesday, May 13, 2020 1:26 AM
> To: devel@edk2.groups.io
> Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Chiu, Chasel
> <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Kethi Reddy, Deepika
> <deepika.kethi.reddy@intel.com>
> Subject: [Patch V1 1/1] CometlakeOpenBoardPkg: Fix build error due to
> Ddr4MixedUDimm2DpcLimit
>
> The Ddr4MixedUDimm2DpcLimit FSP-M Upd has been renamed as
> Ddr4Mixed2DpcLimit at CometLakeFspBinPkg\CometLake1.
> FSP wrapper driver need to use FSP-M Upd name Ddr4Mixed2DpcLimit from
> CometLake1 FSP at CometlakeOpenBoardPkg.
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2714
>
> Signed-off-by: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
> ---
> .../FspWrapper/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c | 2
> +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
> a/Platform/Intel/CometlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI
> nitLib/PeiFspSaPolicyInitLib.c
> b/Platform/Intel/CometlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicy
> InitLib/PeiFspSaPolicyInitLib.c
> index 45d76ad5e4..53f26d824f 100644
> ---
> a/Platform/Intel/CometlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI
> nitLib/PeiFspSaPolicyInitLib.c
> +++
> b/Platform/Intel/CometlakeOpenBoardPkg/FspWrapper/Library/PeiFspPoli
> +++ cyInitLib/PeiFspSaPolicyInitLib.c
> @@ -344,7 +344,7 @@ PeiFspSaPolicyInitPreMem (
> FspmUpd->FspmConfig.GdxcIotSize =
> MemConfig->GdxcIotSize;
> FspmUpd->FspmConfig.GdxcMotSize =
> MemConfig->GdxcMotSize;
> FspmUpd->FspmConfig.DualDimmPerChannelBoardType =(UINT8)
> MemConfig->DualDimmPerChannelBoardType;
> - FspmUpd->FspmConfig.Ddr4MixedUDimm2DpcLimit =(UINT8)
> MemConfig->Ddr4MixedUDimm2DpcLimit;
> + FspmUpd->FspmConfig.Ddr4Mixed2DpcLimit =(UINT8)
> MemConfig->Ddr4MixedUDimm2DpcLimit;
> //
> // Update UPD:CaVrefConfig
> //
> --
> 2.16.2.windows.1
next prev parent reply other threads:[~2020-05-12 23:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-12 17:25 [Patch V1 1/1] CometlakeOpenBoardPkg: Fix build error due to Ddr4MixedUDimm2DpcLimit Kathappan Esakkithevar
2020-05-12 23:58 ` Chiu, Chasel [this message]
2020-05-13 0:11 ` Chaganty, Rangasai V
2020-05-14 1:24 ` [edk2-devel] " Dong, Eric
2020-05-14 3:16 ` Kathappan Esakkithevar
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