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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Jason Lou > Sent: Wednesday, April 14, 2021 10:34 AM > To: devel@edk2.groups.io > Cc: Lou, Yun ; Ni, Ray > Subject: [edk2-devel] [PATCH v1] IntelFsp2WrapperPkg: Remove microcode > PCDs >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3334 >=20 > IntelFsp2WrapperPkg defines following PCDs: > PcdCpuMicrocodePatchAddress > PcdCpuMicrocodePatchRegionSize > PcdFlashMicrocodeOffset >=20 > But the meanings of PcdCpuMicrocodePatchAddress and > PcdCpuMicrocodePatchRegionSize are different from the ones that have The > same name in UefiCpuPkg. To avoid confusion, remove the three PCDs define= d > in IntelFsp2WrapperPkg. >=20 > Signed-off-by: Jason Lou > Cc: Ray Ni > --- >=20 > IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInit > Data.c | 6 +++--- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > | 8 +------- >=20 > IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWra > pperPlatformSecLibSample.inf | 7 +++---- > 3 files changed, 7 insertions(+), 14 deletions(-) >=20 > diff --git > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI > nitData.c > b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI > nitData.c > index 96b47e23da..e57b5b57be 100644 > --- > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI > nitData.c > +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecR > +++ amInitData.c > @@ -1,7 +1,7 @@ > /** @file Sample to provide TempRamInitParams data. - Copyright (c) 2= 014 - > 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - = 2021, > Intel Corporation. All rights reserved.
SPDX-License-Identifier: BS= D-2- > Clause-Patent **/@@ -52,8 +52,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED > CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr =3D { > } }, {- ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) = + > FixedPcdGet32 (PcdFlashMicrocodeOffset)),- ((UINT32)FixedPcdGet64 > (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 > (PcdFlashMicrocodeOffset)),+ FixedPcdGet32 > (PcdCpuMicrocodePatchAddress),+ FixedPcdGet32 > (PcdCpuMicrocodePatchRegionSize), FixedPcdGet32 > (PcdFlashCodeCacheAddress), FixedPcdGet32 (PcdFlashCodeCacheSize), = }diff > --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index 6852bf1271..a3b9363779 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -1,7 +1,7 @@ > ## @file # Provides drivers and definitions to support fsp in EDKII bios= . #-# > Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
+# > Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
# = SPDX- > License-Identifier: BSD-2-Clause-Patent # ##@@ -56,12 +56,6 @@ > ## Provides the size of the BIOS Flash Device. > gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT > 32|0x10000002 - ## Indicates the base address of the first Microcode Pat= ch in > the Microcode Region- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT6 > 4|0x10000005- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UI > NT64|0x10000006- ## Indicates the offset of the Cpu Microcode.- > gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset|0x90|UINT32|0x > 10000007- ## Indicate the PEI memory size platform want to report > gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x > 40000004 ## Indicate the PEI memory size platform want to reportdiff --= git > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspW > rapperPlatformSecLibSample.inf > b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspW > rapperPlatformSecLibSample.inf > index d7f8301bef..027b127724 100644 > --- > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspW > rapperPlatformSecLibSample.inf > +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecF > +++ spWrapperPlatformSecLibSample.inf > @@ -1,7 +1,7 @@ > ## @file # Sample to provide FSP wrapper platform sec related function.= #-# > Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# > Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
# = # SPDX- > License-Identifier: BSD-2-Clause-Patent #@@ -76,8 +76,7 @@ > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## > CONSUMES [FixedPcd]- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## > CONSUMES- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## > CONSUMES- gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset > ## CONSUMES+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress > ## CONSUMES+ > gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## > CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress > ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize > ## CONSUMES-- > 2.28.0.windows.1 >=20 >=20 >=20 > -=3D-=3D-=3D-=3D-=3D-=3D > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#74076): https://edk2.groups.io/g/devel/message/74076 > Mute This Topic: https://groups.io/mt/82082551/1777047 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [chasel.chiu@intel.com]= -=3D- > =3D-=3D-=3D-=3D-=3D >=20