From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"Chiu, Chasel" <chasel.chiu@intel.com>
Cc: "Ma, Maurice" <maurice.ma@intel.com>,
"Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Zeng, Star" <star.zeng@intel.com>
Subject: Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Support FSP private temporary memory.
Date: Thu, 7 Jan 2021 02:52:54 +0000 [thread overview]
Message-ID: <SN6PR11MB2814E728E938AE16F7C5D4FCE6AF0@SN6PR11MB2814.namprd11.prod.outlook.com> (raw)
In-Reply-To: <16574B3F98009B5A.29174@groups.io>
Patch pushed: 379e5098a4836b21b893b4801baa34b570c24599
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel
> Sent: Tuesday, January 5, 2021 5:15 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Ma, Maurice
> <maurice.ma@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>
> Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Support FSP private temporary
> memory.
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3153
>
> When FSP sharing same bootloader stack, the bootloader provided temporary
> memory for FSP will be totally given to PeiCore as Heap, but in some cases FSP
> may have to reserve some more temporary memory for private usage.
>
> This commit adds this flexibility for FSP to reserve some temporary memory
> before giving them to PeiCore.
>
> Cc: Maurice Ma <maurice.ma@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
> ---
> IntelFsp2Pkg/FspSecCore/SecMain.c | 11 +++++++----
> IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 3 ++-
> IntelFsp2Pkg/IntelFsp2Pkg.dec | 7 ++++++-
> 3 files changed, 15 insertions(+), 6 deletions(-)
>
> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
> b/IntelFsp2Pkg/FspSecCore/SecMain.c
> index c8de52e1d5..540571187a 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.c
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
> @@ -1,6 +1,6 @@
> /** @file - Copyright (c) 2014 - 2020, Intel Corporation. All rights
> reserved.<BR>+ Copyright (c) 2014 - 2021, Intel Corporation. All rights
> reserved.<BR> SPDX-License-Identifier: BSD-2-Clause-Patent **/@@ -150,15
> +150,18 @@ SecStartup (
> SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
> SecCoreData.BootFirmwareVolumeSize =
> (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)BootFirmwareVolume)-
> >FvLength; - SecCoreData.TemporaryRamBase = (VOID*)(UINTN)
> TempRamBase;+ //+ // Support FSP reserved temporary memory from the
> whole temporary memory provided by bootloader.+ // FSP reserved temporary
> memory will not be given to PeiCore.+ //+ SecCoreData.TemporaryRamBase
> = (UINT8 *)(UINTN) TempRamBase + PcdGet32
> (PcdFspPrivateTemporaryRamSize);+ SecCoreData.TemporaryRamSize =
> SizeOfRam - PcdGet32 (PcdFspPrivateTemporaryRamSize); if (PcdGet8
> (PcdFspHeapSizePercentage) == 0) {- SecCoreData.TemporaryRamSize =
> SizeOfRam; // stack size that is going to be copied to the permanent memory
> SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
> SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize;
> SecCoreData.StackBase = (VOID *)GetFspEntryStack(); // Share the same
> boot loader stack SecCoreData.StackSize = 0; } else {-
> SecCoreData.TemporaryRamSize = SizeOfRam;
> SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
> SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize *
> PcdGet8 (PcdFspHeapSizePercentage) / 100; SecCoreData.StackBase =
> (VOID*)(UINTN)((UINTN)SecCoreData.TemporaryRamBase +
> SecCoreData.PeiTemporaryRamSize);diff --git
> a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> index 61b7ddca4c..7b05cae641 100644
> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> @@ -1,7 +1,7 @@
> ## @file # Sec Core for FSP #-# Copyright (c) 2016 - 2019, Intel Corporation. All
> rights reserved.<BR>+# Copyright (c) 2016 - 2021, Intel Corporation. All rights
> reserved.<BR> # # SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -59,6
> +59,7 @@
> gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
> gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage ## CONSUMES
> gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported ##
> CONSUMES+ gIntelFsp2PkgTokenSpaceGuid.PcdFspPrivateTemporaryRamSize
> ## CONSUMES [Ppis] gEfiTemporaryRamSupportPpiGuid ##
> PRODUCESdiff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dec
> b/IntelFsp2Pkg/IntelFsp2Pkg.dec
> index 60d40ab6b9..ec7b9a7702 100644
> --- a/IntelFsp2Pkg/IntelFsp2Pkg.dec
> +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dec
> @@ -1,7 +1,7 @@
> ## @file # Provides driver and definitions to build fsp in EDKII bios. #-#
> Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>+#
> Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR> # SPDX-
> License-Identifier: BSD-2-Clause-Patent # ##@@ -98,6 +98,11 @@
> # Maximal Interrupt supported in IDT table. #
> gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported | 34|
> UINT8|0x10000005+ #+ # Allows FSP-M to reserve a section of Temporary
> RAM for implementation specific use.+ # Reduces the amount of memory
> available for the PeiCore heap.+ #+
> gIntelFsp2PkgTokenSpaceGuid.PcdFspPrivateTemporaryRamSize
> |0x00000000|UINT32|0x10000006
> [PcdsFixedAtBuild,PcdsDynamic,PcdsDynamicEx]
> gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength
> |0x00100000|UINT32|0x46530000--
> 2.28.0.windows.1
>
>
>
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parent reply other threads:[~2021-01-07 2:53 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
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