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Fri, 5 Feb 2021 02:09:41 +0000 From: "Chiu, Chasel" To: "Loo, Tung Lun" , "devel@edk2.groups.io" CC: "Loo, Tung Lun" , "Ma, Maurice" , "Desimone, Nathaniel L" , "Zeng, Star" Subject: Re: [PATCH v2] IntelFsp2Pkg: Add YAML file generation support Thread-Topic: [PATCH v2] IntelFsp2Pkg: Add YAML file generation support Thread-Index: AQHW+qpLXAvduUYjuUa421gBLBJPnapI0n4g Date: Fri, 5 Feb 2021 02:09:41 +0000 Message-ID: References: <20210204035953.1123-1-tung.lun.loo@intel.com> In-Reply-To: <20210204035953.1123-1-tung.lun.loo@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [220.129.127.112] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 76a8b332-47df-4be8-6bca-08d8c97b1932 x-ms-traffictypediagnostic: SN6PR11MB3216: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5797; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Chasel Chiu > -----Original Message----- > From: Loo Tung Lun > Sent: Thursday, February 4, 2021 12:00 PM > To: devel@edk2.groups.io > Cc: Loo, Tung Lun ; Ma, Maurice > ; Desimone, Nathaniel L > ; Zeng, Star ; Chiu, > Chasel > Subject: [PATCH v2] IntelFsp2Pkg: Add YAML file generation support >=20 > Add support for YAML format file generation in addition > to current BSF structure. Configuration of YAML format > output will be supported by an open source ConfigEditor. >=20 > Reference to YAML code, test and ConfigEditor is at > https://github.com/joshloo/fsp_yaml_cfg/tree/master/Tools >=20 > A unit test is also added in Tests folder. This test compares > the generated yaml file against the expected output to know > if it is constructing the yaml data structure as expected. >=20 > Cc: Maurice Ma > Cc: Nate DeSimone > Cc: Star Zeng > Cc: Chasel Chiu > Signed-off-by: Loo Tung Lun > --- > IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py | 875 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++++++++ > IntelFsp2Pkg/Tools/GenCfgOpt.py | 470 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++------------------------------------------------------------= ------------------ > ------------------------------------------------------ > IntelFsp2Pkg/Tools/Tests/ExpectedFspUpd.h | 16 +++++++= +++++++++ > IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h | 75 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++ > IntelFsp2Pkg/Tools/Tests/ExpectedFspsUpd.h | 69 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++ > IntelFsp2Pkg/Tools/Tests/ExpectedFsptUpd.h | 87 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++ > IntelFsp2Pkg/Tools/Tests/ExpectedOutput.bsf | 88 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++ > IntelFsp2Pkg/Tools/Tests/ExpectedOutput.yaml | 270 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++ > IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc | 469 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++ > IntelFsp2Pkg/Tools/Tests/test_yaml.py | 96 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++ > IntelFsp2Pkg/Tools/UserManuals/FspDscBsf2YamlUserManual.md | 39 > +++++++++++++++++++++++++++++++++++++++ > 11 files changed, 2422 insertions(+), 132 deletions(-) >=20 > diff --git a/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py > b/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py > new file mode 100644 > index 0000000000..2a2ee72ac2 > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py > @@ -0,0 +1,875 @@ > +#!/usr/bin/env python >=20 > +## @ FspDscBsf2Yaml.py >=20 > +# This script convert DSC or BSF format file into YAML format >=20 > +# >=20 > +# Copyright(c) 2021, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > +import os >=20 > +import re >=20 > +import sys >=20 > +from datetime import date >=20 > +from collections import OrderedDict >=20 > +from functools import reduce >=20 > + >=20 > +from GenCfgOpt import CGenCfgOpt >=20 > + >=20 > +__copyright_tmp__ =3D """## @file >=20 > +# >=20 > +# YAML CFGDATA %s File. >=20 > +# >=20 > +# Copyright(c) %4d, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > +""" >=20 > + >=20 > +__copyright_dsc__ =3D """## @file >=20 > +# >=20 > +# Copyright (c) %04d, Intel Corporation. All rights reserved.
>=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > +[PcdsDynamicVpd.Upd] >=20 > + # >=20 > + # Global definitions in BSF >=20 > + # !BSF BLOCK:{NAME:"FSP UPD Configuration", VER:"0.1"} >=20 > + # >=20 > + >=20 > +""" >=20 > + >=20 > + >=20 > +def Bytes2Val(Bytes): >=20 > + return reduce(lambda x, y: (x << 8) | y, Bytes[::-1]) >=20 > + >=20 > + >=20 > +class CFspBsf2Dsc: >=20 > + >=20 > + def __init__(self, bsf_file): >=20 > + self.cfg_list =3D CFspBsf2Dsc.parse_bsf(bsf_file) >=20 > + >=20 > + def get_dsc_lines(self): >=20 > + return CFspBsf2Dsc.generate_dsc(self.cfg_list) >=20 > + >=20 > + def save_dsc(self, dsc_file): >=20 > + return CFspBsf2Dsc.generate_dsc(self.cfg_list, dsc_file) >=20 > + >=20 > + @staticmethod >=20 > + def parse_bsf(bsf_file): >=20 > + >=20 > + fd =3D open(bsf_file, 'r') >=20 > + bsf_txt =3D fd.read() >=20 > + fd.close() >=20 > + >=20 > + find_list =3D [] >=20 > + regex =3D re.compile(r'\s+Find\s+"(.*?)"(.*?)^\s+\$(.*?)\s+', re= .S | > re.MULTILINE) >=20 > + for match in regex.finditer(bsf_txt): >=20 > + find =3D match.group(1) >=20 > + name =3D match.group(3) >=20 > + if not name.endswith('_Revision'): >=20 > + raise Exception("Unexpected CFG item following 'Find' !"= ) >=20 > + find_list.append((name, find)) >=20 > + >=20 > + idx =3D 0 >=20 > + count =3D 0 >=20 > + prefix =3D '' >=20 > + chk_dict =3D {} >=20 > + cfg_list =3D [] >=20 > + cfg_temp =3D {'find': '', 'cname': '', 'length': 0, 'value': '0'= , 'type': 'Reserved', >=20 > + 'embed': '', 'page': '', 'option': '', 'instance': 0= } >=20 > + regex =3D > re.compile(r'^\s+(\$(.*?)|Skip)\s+(\d+)\s+bytes(\s+\$_DEFAULT_\s+=3D\s+(.= +?))?$', >=20 > + re.S | re.MULTILINE) >=20 > + >=20 > + for match in regex.finditer(bsf_txt): >=20 > + dlen =3D int(match.group(3)) >=20 > + if match.group(1) =3D=3D 'Skip': >=20 > + key =3D 'gPlatformFspPkgTokenSpaceGuid_BsfSkip%d' % idx >=20 > + val =3D ', '.join(['%02X' % ord(i) for i in '\x00' * dle= n]) >=20 > + idx +=3D 1 >=20 > + option =3D '$SKIP' >=20 > + else: >=20 > + key =3D match.group(2) >=20 > + val =3D match.group(5) >=20 > + option =3D '' >=20 > + >=20 > + cfg_item =3D dict(cfg_temp) >=20 > + finds =3D [i for i in find_list if i[0] =3D=3D key] >=20 > + if len(finds) > 0: >=20 > + if count >=3D 1: >=20 > + # Append a dummy one >=20 > + cfg_item['cname'] =3D 'Dummy' >=20 > + cfg_list.append(dict(cfg_item)) >=20 > + cfg_list[-1]['embed'] =3D '%s:TAG_%03X:END' % (prefi= x, ord(prefix[-1])) >=20 > + prefix =3D finds[0][1] >=20 > + cfg_item['embed'] =3D '%s:TAG_%03X:START' % (prefix, ord= (prefix[-1])) >=20 > + cfg_item['find'] =3D prefix >=20 > + cfg_item['cname'] =3D 'Signature' >=20 > + cfg_item['length'] =3D len(finds[0][1]) >=20 > + cfg_item['value'] =3D '0x%X' % Bytes2Val(finds[0][1].enc= ode('UTF-8')) >=20 > + cfg_list.append(dict(cfg_item)) >=20 > + cfg_item =3D dict(cfg_temp) >=20 > + find_list.pop(0) >=20 > + count =3D 0 >=20 > + >=20 > + cfg_item['cname'] =3D key >=20 > + cfg_item['length'] =3D dlen >=20 > + cfg_item['value'] =3D val >=20 > + cfg_item['option'] =3D option >=20 > + >=20 > + if key not in chk_dict.keys(): >=20 > + chk_dict[key] =3D 0 >=20 > + else: >=20 > + chk_dict[key] +=3D 1 >=20 > + cfg_item['instance'] =3D chk_dict[key] >=20 > + >=20 > + cfg_list.append(cfg_item) >=20 > + count +=3D 1 >=20 > + >=20 > + if prefix: >=20 > + cfg_item =3D dict(cfg_temp) >=20 > + cfg_item['cname'] =3D 'Dummy' >=20 > + cfg_item['embed'] =3D '%s:%03X:END' % (prefix, ord(prefix[-1= ])) >=20 > + cfg_list.append(cfg_item) >=20 > + >=20 > + option_dict =3D {} >=20 > + selreg =3D re.compile(r'\s+Selection\s*(.+?)\s*,\s*"(.*?)"$', re= .S | > re.MULTILINE) >=20 > + regex =3D re.compile(r'^List\s&(.+?)$(.+?)^EndList$', re.S | re.= MULTILINE) >=20 > + for match in regex.finditer(bsf_txt): >=20 > + key =3D match.group(1) >=20 > + option_dict[key] =3D [] >=20 > + for select in selreg.finditer(match.group(2)): >=20 > + option_dict[key].append((int(select.group(1), 0), select= .group(2))) >=20 > + >=20 > + chk_dict =3D {} >=20 > + pagereg =3D re.compile(r'^Page\s"(.*?)"$(.+?)^EndPage$', re.S | > re.MULTILINE) >=20 > + for match in pagereg.finditer(bsf_txt): >=20 > + page =3D match.group(1) >=20 > + for line in match.group(2).splitlines(): >=20 > + match =3D re.match(r'\s+(Combo|EditNum)\s\$(.+?),\s"(.*?= )",\s(.+?),$', > line) >=20 > + if match: >=20 > + cname =3D match.group(2) >=20 > + if cname not in chk_dict.keys(): >=20 > + chk_dict[cname] =3D 0 >=20 > + else: >=20 > + chk_dict[cname] +=3D 1 >=20 > + instance =3D chk_dict[cname] >=20 > + cfg_idxs =3D [i for i, j in enumerate(cfg_list) if j= ['cname'] =3D=3D cname and > j['instance'] =3D=3D instance] >=20 > + if len(cfg_idxs) !=3D 1: >=20 > + raise Exception("Multiple CFG item '%s' found !"= % cname) >=20 > + cfg_item =3D cfg_list[cfg_idxs[0]] >=20 > + cfg_item['page'] =3D page >=20 > + cfg_item['type'] =3D match.group(1) >=20 > + cfg_item['prompt'] =3D match.group(3) >=20 > + cfg_item['range'] =3D None >=20 > + if cfg_item['type'] =3D=3D 'Combo': >=20 > + cfg_item['option'] =3D option_dict[match.group(4= )[1:]] >=20 > + elif cfg_item['type'] =3D=3D 'EditNum': >=20 > + cfg_item['option'] =3D match.group(4) >=20 > + match =3D re.match(r'\s+ Help\s"(.*?)"$', line) >=20 > + if match: >=20 > + cfg_item['help'] =3D match.group(1) >=20 > + >=20 > + match =3D re.match(r'\s+"Valid\srange:\s(.*)"$', line) >=20 > + if match: >=20 > + parts =3D match.group(1).split() >=20 > + cfg_item['option'] =3D ( >=20 > + (int(parts[0], 0), int(parts[2], 0), cfg_item['o= ption'])) >=20 > + >=20 > + return cfg_list >=20 > + >=20 > + @staticmethod >=20 > + def generate_dsc(option_list, dsc_file=3DNone): >=20 > + dsc_lines =3D [] >=20 > + header =3D '%s' % (__copyright_dsc__ % date.today().year) >=20 > + dsc_lines.extend(header.splitlines()) >=20 > + >=20 > + pages =3D [] >=20 > + for cfg_item in option_list: >=20 > + if cfg_item['page'] and (cfg_item['page'] not in pages): >=20 > + pages.append(cfg_item['page']) >=20 > + >=20 > + page_id =3D 0 >=20 > + for page in pages: >=20 > + dsc_lines.append(' # !BSF PAGES:{PG%02X::"%s"}' % (page_id,= page)) >=20 > + page_id +=3D 1 >=20 > + dsc_lines.append('') >=20 > + >=20 > + last_page =3D '' >=20 > + for option in option_list: >=20 > + dsc_lines.append('') >=20 > + default =3D option['value'] >=20 > + pos =3D option['cname'].find('_') >=20 > + name =3D option['cname'][pos + 1:] >=20 > + >=20 > + if option['find']: >=20 > + dsc_lines.append(' # !BSF FIND:{%s}' % option['find']) >=20 > + dsc_lines.append('') >=20 > + >=20 > + if option['instance'] > 0: >=20 > + name =3D name + '_%s' % option['instance'] >=20 > + >=20 > + if option['embed']: >=20 > + dsc_lines.append(' # !HDR EMBED:{%s}' % option['embed']= ) >=20 > + >=20 > + if option['type'] =3D=3D 'Reserved': >=20 > + dsc_lines.append(' # !BSF NAME:{Reserved} TYPE:{Reserve= d}') >=20 > + if option['option'] =3D=3D '$SKIP': >=20 > + dsc_lines.append(' # !BSF OPTION:{$SKIP}') >=20 > + else: >=20 > + prompt =3D option['prompt'] >=20 > + >=20 > + if last_page !=3D option['page']: >=20 > + last_page =3D option['page'] >=20 > + dsc_lines.append(' # !BSF PAGE:{PG%02X}' % > (pages.index(option['page']))) >=20 > + >=20 > + if option['type'] =3D=3D 'Combo': >=20 > + dsc_lines.append(' # !BSF NAME:{%s} TYPE:{%s}' % >=20 > + (prompt, option['type'])) >=20 > + ops =3D [] >=20 > + for val, text in option['option']: >=20 > + ops.append('0x%x:%s' % (val, text)) >=20 > + dsc_lines.append(' # !BSF OPTION:{%s}' % (', '.join= (ops))) >=20 > + elif option['type'] =3D=3D 'EditNum': >=20 > + cfg_len =3D option['length'] >=20 > + if ',' in default and cfg_len > 8: >=20 > + dsc_lines.append(' # !BSF NAME:{%s} TYPE:{Table= }' % (prompt)) >=20 > + if cfg_len > 16: >=20 > + cfg_len =3D 16 >=20 > + ops =3D [] >=20 > + for i in range(cfg_len): >=20 > + ops.append('%X:1:HEX' % i) >=20 > + dsc_lines.append(' # !BSF OPTION:{%s}' % (', '.= join(ops))) >=20 > + else: >=20 > + dsc_lines.append( >=20 > + ' # !BSF NAME:{%s} TYPE:{%s, %s,(0x%X, 0x%X= )}' % >=20 > + (prompt, option['type'], option['option'][2]= , >=20 > + option['option'][0], option['option'][1])) >=20 > + dsc_lines.append(' # !BSF HELP:{%s}' % option['help']) >=20 > + >=20 > + if ',' in default: >=20 > + default =3D '{%s}' % default >=20 > + dsc_lines.append(' gCfgData.%-30s | * | 0x%04X | %s' % >=20 > + (name, option['length'], default)) >=20 > + >=20 > + if dsc_file: >=20 > + fd =3D open(dsc_file, 'w') >=20 > + fd.write('\n'.join(dsc_lines)) >=20 > + fd.close() >=20 > + >=20 > + return dsc_lines >=20 > + >=20 > + >=20 > +class CFspDsc2Yaml(): >=20 > + >=20 > + def __init__(self): >=20 > + self._Hdr_key_list =3D ['EMBED', 'STRUCT'] >=20 > + self._Bsf_key_list =3D ['NAME', 'HELP', 'TYPE', 'PAGE', 'PAGES',= 'OPTION', >=20 > + 'CONDITION', 'ORDER', 'MARKER', 'SUBT', 'F= IELD', 'FIND'] >=20 > + self.gen_cfg_data =3D None >=20 > + self.cfg_reg_exp =3D re.compile(r"^([_a-zA-Z0-9$\(\)]+)\s*\|\s*(= 0x[0-9A- > F]+|\*)\s*\|" >=20 > + + r"\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s= *(.+)") >=20 > + self.bsf_reg_exp =3D re.compile(r"(%s):{(.+?)}(?:$|\s+)" % > '|'.join(self._Bsf_key_list)) >=20 > + self.hdr_reg_exp =3D re.compile(r"(%s):{(.+?)}" % '|'.join(self.= _Hdr_key_list)) >=20 > + self.prefix =3D '' >=20 > + self.unused_idx =3D 0 >=20 > + self.offset =3D 0 >=20 > + self.base_offset =3D 0 >=20 > + >=20 > + def load_config_data_from_dsc(self, file_name): >=20 > + """ >=20 > + Load and parse a DSC CFGDATA file. >=20 > + """ >=20 > + gen_cfg_data =3D CGenCfgOpt('FSP') >=20 > + if file_name.endswith('.dsc'): >=20 > + # if gen_cfg_data.ParseDscFileYaml(file_name, '') !=3D 0: >=20 > + if gen_cfg_data.ParseDscFile(file_name, '') !=3D 0: >=20 > + raise Exception('DSC file parsing error !') >=20 > + if gen_cfg_data.CreateVarDict() !=3D 0: >=20 > + raise Exception('DSC variable creation error !') >=20 > + else: >=20 > + raise Exception('Unsupported file "%s" !' % file_name) >=20 > + gen_cfg_data.UpdateDefaultValue() >=20 > + self.gen_cfg_data =3D gen_cfg_data >=20 > + >=20 > + def print_dsc_line(self): >=20 > + """ >=20 > + Debug function to print all DSC lines. >=20 > + """ >=20 > + for line in self.gen_cfg_data._DscLines: >=20 > + print(line) >=20 > + >=20 > + def format_value(self, field, text, indent=3D''): >=20 > + """ >=20 > + Format a CFGDATA item into YAML format. >=20 > + """ >=20 > + if(not text.startswith('!expand')) and (': ' in text): >=20 > + tgt =3D ':' if field =3D=3D 'option' else '- ' >=20 > + text =3D text.replace(': ', tgt) >=20 > + lines =3D text.splitlines() >=20 > + if len(lines) =3D=3D 1 and field !=3D 'help': >=20 > + return text >=20 > + else: >=20 > + return '>\n ' + '\n '.join([indent + i.lstrip() for i in= lines]) >=20 > + >=20 > + def reformat_pages(self, val): >=20 > + # Convert XXX:YYY into XXX::YYY format for page definition >=20 > + parts =3D val.split(',') >=20 > + if len(parts) <=3D 1: >=20 > + return val >=20 > + >=20 > + new_val =3D [] >=20 > + for each in parts: >=20 > + nodes =3D each.split(':') >=20 > + if len(nodes) =3D=3D 2: >=20 > + each =3D '%s::%s' % (nodes[0], nodes[1]) >=20 > + new_val.append(each) >=20 > + ret =3D ','.join(new_val) >=20 > + return ret >=20 > + >=20 > + def reformat_struct_value(self, utype, val): >=20 > + # Convert DSC UINT16/32/64 array into new format by >=20 > + # adding prefix 0:0[WDQ] to provide hint to the array format >=20 > + if utype in ['UINT16', 'UINT32', 'UINT64']: >=20 > + if val and val[0] =3D=3D '{' and val[-1] =3D=3D '}': >=20 > + if utype =3D=3D 'UINT16': >=20 > + unit =3D 'W' >=20 > + elif utype =3D=3D 'UINT32': >=20 > + unit =3D 'D' >=20 > + else: >=20 > + unit =3D 'Q' >=20 > + val =3D '{ 0:0%s, %s }' % (unit, val[1:-1]) >=20 > + return val >=20 > + >=20 > + def process_config(self, cfg): >=20 > + if 'page' in cfg: >=20 > + cfg['page'] =3D self.reformat_pages(cfg['page']) >=20 > + >=20 > + if 'struct' in cfg: >=20 > + cfg['value'] =3D self.reformat_struct_value(cfg['struct'], c= fg['value']) >=20 > + >=20 > + def parse_dsc_line(self, dsc_line, config_dict, init_dict, include): >=20 > + """ >=20 > + Parse a line in DSC and update the config dictionary accordingly= . >=20 > + """ >=20 > + init_dict.clear() >=20 > + match =3D re.match(r'g(CfgData|\w+FspPkgTokenSpaceGuid)\.(.+)', = dsc_line) >=20 > + if match: >=20 > + match =3D self.cfg_reg_exp.match(match.group(2)) >=20 > + if not match: >=20 > + return False >=20 > + config_dict['cname'] =3D self.prefix + match.group(1) >=20 > + value =3D match.group(4).strip() >=20 > + length =3D match.group(3).strip() >=20 > + config_dict['length'] =3D length >=20 > + config_dict['value'] =3D value >=20 > + if match.group(2) =3D=3D '*': >=20 > + self.offset +=3D int(length, 0) >=20 > + else: >=20 > + org_offset =3D int(match.group(2), 0) >=20 > + if org_offset =3D=3D 0: >=20 > + self.base_offset =3D self.offset >=20 > + offset =3D org_offset + self.base_offset >=20 > + if self.offset !=3D offset: >=20 > + if offset > self.offset: >=20 > + init_dict['padding'] =3D offset - self.offset >=20 > + self.offset =3D offset + int(length, 0) >=20 > + return True >=20 > + >=20 > + match =3D re.match(r"^\s*#\s+!([<>])\s+include\s+(.+)", dsc_line= ) >=20 > + if match and len(config_dict) =3D=3D 0: >=20 > + # !include should not be inside a config field >=20 > + # if so, do not convert include into YAML >=20 > + init_dict =3D dict(config_dict) >=20 > + config_dict.clear() >=20 > + config_dict['cname'] =3D '$ACTION' >=20 > + if match.group(1) =3D=3D '<': >=20 > + config_dict['include'] =3D match.group(2) >=20 > + else: >=20 > + config_dict['include'] =3D '' >=20 > + return True >=20 > + >=20 > + match =3D re.match(r"^\s*#\s+(!BSF|!HDR)\s+(.+)", dsc_line) >=20 > + if not match: >=20 > + return False >=20 > + >=20 > + remaining =3D match.group(2) >=20 > + if match.group(1) =3D=3D '!BSF': >=20 > + result =3D self.bsf_reg_exp.findall(remaining) >=20 > + if not result: >=20 > + return False >=20 > + >=20 > + for each in result: >=20 > + key =3D each[0].lower() >=20 > + val =3D each[1] >=20 > + if key =3D=3D 'field': >=20 > + name =3D each[1] >=20 > + if ':' not in name: >=20 > + raise Exception('Incorrect bit field format !') >=20 > + parts =3D name.split(':') >=20 > + config_dict['length'] =3D parts[1] >=20 > + config_dict['cname'] =3D '@' + parts[0] >=20 > + return True >=20 > + elif key in ['pages', 'page', 'find']: >=20 > + init_dict =3D dict(config_dict) >=20 > + config_dict.clear() >=20 > + config_dict['cname'] =3D '$ACTION' >=20 > + if key =3D=3D 'find': >=20 > + config_dict['find'] =3D val >=20 > + else: >=20 > + config_dict['page'] =3D val >=20 > + return True >=20 > + elif key =3D=3D 'subt': >=20 > + config_dict.clear() >=20 > + parts =3D each[1].split(':') >=20 > + tmp_name =3D parts[0][:-5] >=20 > + if tmp_name =3D=3D 'CFGHDR': >=20 > + cfg_tag =3D '_$FFF_' >=20 > + sval =3D '!expand { %s_TMPL : [ ' % tmp_name + '= %s, %s, ' % > (parts[1], cfg_tag) \ >=20 > + + ', '.join(parts[2:]) + ' ] }' >=20 > + else: >=20 > + sval =3D '!expand { %s_TMPL : [ ' % tmp_name + '= , '.join(parts[1:]) + > ' ] }' >=20 > + config_dict.clear() >=20 > + config_dict['cname'] =3D tmp_name >=20 > + config_dict['expand'] =3D sval >=20 > + return True >=20 > + else: >=20 > + if key in ['name', 'help', 'option'] and val.startsw= ith('+'): >=20 > + val =3D config_dict[key] + '\n' + val[1:] >=20 > + if val.strip() =3D=3D '': >=20 > + val =3D "''" >=20 > + config_dict[key] =3D val >=20 > + >=20 > + else: >=20 > + match =3D self.hdr_reg_exp.match(remaining) >=20 > + if not match: >=20 > + return False >=20 > + key =3D match.group(1) >=20 > + remaining =3D match.group(2) >=20 > + if key =3D=3D 'EMBED': >=20 > + parts =3D remaining.split(':') >=20 > + names =3D parts[0].split(',') >=20 > + if parts[-1] =3D=3D 'END': >=20 > + prefix =3D '>' >=20 > + else: >=20 > + prefix =3D '<' >=20 > + skip =3D False >=20 > + if parts[1].startswith('TAG_'): >=20 > + tag_txt =3D '%s:%s' % (names[0], parts[1]) >=20 > + else: >=20 > + tag_txt =3D names[0] >=20 > + if parts[2] in ['START', 'END']: >=20 > + if names[0] =3D=3D 'PCIE_RP_PIN_CTRL[]': >=20 > + skip =3D True >=20 > + else: >=20 > + tag_txt =3D '%s:%s' % (names[0], parts[1]) >=20 > + if not skip: >=20 > + config_dict.clear() >=20 > + config_dict['cname'] =3D prefix + tag_txt >=20 > + return True >=20 > + >=20 > + if key =3D=3D 'STRUCT': >=20 > + text =3D remaining.strip() >=20 > + config_dict[key.lower()] =3D text >=20 > + >=20 > + return False >=20 > + >=20 > + def process_template_lines(self, lines): >=20 > + """ >=20 > + Process a line in DSC template section. >=20 > + """ >=20 > + template_name =3D '' >=20 > + bsf_temp_dict =3D OrderedDict() >=20 > + temp_file_dict =3D OrderedDict() >=20 > + include_file =3D ['.'] >=20 > + >=20 > + for line in lines: >=20 > + match =3D re.match(r"^\s*#\s+!([<>])\s+include\s+(.+)", line= ) >=20 > + if match: >=20 > + if match.group(1) =3D=3D '<': >=20 > + include_file.append(match.group(2)) >=20 > + else: >=20 > + include_file.pop() >=20 > + >=20 > + match =3D re.match(r"^\s*#\s+(!BSF)\s+DEFT:{(.+?):(START|END= )}", line) >=20 > + if match: >=20 > + if match.group(3) =3D=3D 'START' and not template_name: >=20 > + template_name =3D match.group(2).strip() >=20 > + temp_file_dict[template_name] =3D list(include_file) >=20 > + bsf_temp_dict[template_name] =3D [] >=20 > + if match.group(3) =3D=3D 'END' and (template_name =3D=3D > match.group(2).strip()) \ >=20 > + and template_name: >=20 > + template_name =3D '' >=20 > + else: >=20 > + if template_name: >=20 > + bsf_temp_dict[template_name].append(line) >=20 > + return bsf_temp_dict, temp_file_dict >=20 > + >=20 > + def process_option_lines(self, lines): >=20 > + """ >=20 > + Process a line in DSC config section. >=20 > + """ >=20 > + cfgs =3D [] >=20 > + struct_end =3D False >=20 > + config_dict =3D dict() >=20 > + init_dict =3D dict() >=20 > + include =3D [''] >=20 > + for line in lines: >=20 > + ret =3D self.parse_dsc_line(line, config_dict, init_dict, in= clude) >=20 > + if ret: >=20 > + if 'padding' in init_dict: >=20 > + num =3D init_dict['padding'] >=20 > + init_dict.clear() >=20 > + padding_dict =3D {} >=20 > + cfgs.append(padding_dict) >=20 > + padding_dict['cname'] =3D 'UnusedUpdSpace%d' % self.= unused_idx >=20 > + padding_dict['length'] =3D '0x%x' % num >=20 > + padding_dict['value'] =3D '{ 0 }' >=20 > + self.unused_idx +=3D 1 >=20 > + >=20 > + if cfgs and cfgs[-1]['cname'][0] !=3D '@' and config_dic= t['cname'][0] =3D=3D > '@': >=20 > + # it is a bit field, mark the previous one as virtua= l >=20 > + cname =3D cfgs[-1]['cname'] >=20 > + new_cfg =3D dict(cfgs[-1]) >=20 > + new_cfg['cname'] =3D '@$STRUCT' >=20 > + cfgs[-1].clear() >=20 > + cfgs[-1]['cname'] =3D cname >=20 > + cfgs.append(new_cfg) >=20 > + >=20 > + if cfgs and cfgs[-1]['cname'] =3D=3D 'CFGHDR' and config= _dict['cname'][0] > =3D=3D '<': >=20 > + # swap CfgHeader and the CFG_DATA order >=20 > + if ':' in config_dict['cname']: >=20 > + # replace the real TAG for CFG_DATA >=20 > + cfgs[-1]['expand'] =3D cfgs[-1]['expand'].replac= e( >=20 > + '_$FFF_', '0x%s' % >=20 > + config_dict['cname'].split(':')[1][4:]) >=20 > + cfgs.insert(-1, config_dict) >=20 > + else: >=20 > + self.process_config(config_dict) >=20 > + if struct_end: >=20 > + struct_end =3D False >=20 > + cfgs.insert(-1, config_dict) >=20 > + else: >=20 > + cfgs.append(config_dict) >=20 > + if config_dict['cname'][0] =3D=3D '>': >=20 > + struct_end =3D True >=20 > + >=20 > + config_dict =3D dict(init_dict) >=20 > + return cfgs >=20 > + >=20 > + def variable_fixup(self, each): >=20 > + """ >=20 > + Fix up some variable definitions for SBL. >=20 > + """ >=20 > + key =3D each >=20 > + val =3D self.gen_cfg_data._MacroDict[each] >=20 > + return key, val >=20 > + >=20 > + def template_fixup(self, tmp_name, tmp_list): >=20 > + """ >=20 > + Fix up some special config templates for SBL >=20 > + """ >=20 > + return >=20 > + >=20 > + def config_fixup(self, cfg_list): >=20 > + """ >=20 > + Fix up some special config items for SBL. >=20 > + """ >=20 > + >=20 > + # Insert FSPT_UPD/FSPM_UPD/FSPS_UPD tag so as to create C strctu= re >=20 > + idxs =3D [] >=20 > + for idx, cfg in enumerate(cfg_list): >=20 > + if cfg['cname'].startswith('=20 > + idxs.append(idx) >=20 > + >=20 > + if len(idxs) !=3D 3: >=20 > + return >=20 > + >=20 > + # Handle insert backwards so that the index does not change in t= he loop >=20 > + fsp_comp =3D 'SMT' >=20 > + idx_comp =3D 0 >=20 > + for idx in idxs[::-1]: >=20 > + # Add current FSP?_UPD start tag >=20 > + cfgfig_dict =3D {} >=20 > + cfgfig_dict['cname'] =3D '=20 > + cfg_list.insert(idx, cfgfig_dict) >=20 > + if idx_comp < 2: >=20 > + # Add previous FSP?_UPD end tag >=20 > + cfgfig_dict =3D {} >=20 > + cfgfig_dict['cname'] =3D '>FSP%s_UPD' % fsp_comp[idx_com= p + 1] >=20 > + cfg_list.insert(idx, cfgfig_dict) >=20 > + idx_comp +=3D 1 >=20 > + >=20 > + # Add final FSPS_UPD end tag >=20 > + cfgfig_dict =3D {} >=20 > + cfgfig_dict['cname'] =3D '>FSP%s_UPD' % fsp_comp[0] >=20 > + cfg_list.append(cfgfig_dict) >=20 > + >=20 > + return >=20 > + >=20 > + def get_section_range(self, section_name): >=20 > + """ >=20 > + Extract line number range from config file for a given section n= ame. >=20 > + """ >=20 > + start =3D -1 >=20 > + end =3D -1 >=20 > + for idx, line in enumerate(self.gen_cfg_data._DscLines): >=20 > + if start < 0 and line.startswith('[%s]' % section_name): >=20 > + start =3D idx >=20 > + elif start >=3D 0 and line.startswith('['): >=20 > + end =3D idx >=20 > + break >=20 > + if start =3D=3D -1: >=20 > + start =3D 0 >=20 > + if end =3D=3D -1: >=20 > + end =3D len(self.gen_cfg_data._DscLines) >=20 > + return start, end >=20 > + >=20 > + def normalize_file_name(self, file, is_temp=3DFalse): >=20 > + """ >=20 > + Normalize file name convention so that it is consistent. >=20 > + """ >=20 > + if file.endswith('.dsc'): >=20 > + file =3D file[:-4] + '.yaml' >=20 > + dir_name =3D os.path.dirname(file) >=20 > + base_name =3D os.path.basename(file) >=20 > + if is_temp: >=20 > + if 'Template_' not in file: >=20 > + base_name =3D base_name.replace('Template', 'Template_') >=20 > + else: >=20 > + if 'CfgData_' not in file: >=20 > + base_name =3D base_name.replace('CfgData', 'CfgData_') >=20 > + if dir_name: >=20 > + path =3D dir_name + '/' + base_name >=20 > + else: >=20 > + path =3D base_name >=20 > + return path >=20 > + >=20 > + def output_variable(self): >=20 > + """ >=20 > + Output variable block into a line list. >=20 > + """ >=20 > + lines =3D [] >=20 > + for each in self.gen_cfg_data._MacroDict: >=20 > + key, value =3D self.variable_fixup(each) >=20 > + lines.append('%-30s : %s' % (key, value)) >=20 > + return lines >=20 > + >=20 > + def output_template(self): >=20 > + """ >=20 > + Output template block into a line list. >=20 > + """ >=20 > + self.offset =3D 0 >=20 > + self.base_offset =3D 0 >=20 > + start, end =3D self.get_section_range('PcdsDynamicVpd.Tmp') >=20 > + bsf_temp_dict, temp_file_dict =3D > self.process_template_lines(self.gen_cfg_data._DscLines[start:end]) >=20 > + template_dict =3D dict() >=20 > + lines =3D [] >=20 > + file_lines =3D {} >=20 > + last_file =3D '.' >=20 > + file_lines[last_file] =3D [] >=20 > + >=20 > + for tmp_name in temp_file_dict: >=20 > + temp_file_dict[tmp_name][-1] =3D > self.normalize_file_name(temp_file_dict[tmp_name][-1], True) >=20 > + if len(temp_file_dict[tmp_name]) > 1: >=20 > + temp_file_dict[tmp_name][-2] =3D > self.normalize_file_name(temp_file_dict[tmp_name][-2], True) >=20 > + >=20 > + for tmp_name in bsf_temp_dict: >=20 > + file =3D temp_file_dict[tmp_name][-1] >=20 > + if last_file !=3D file and len(temp_file_dict[tmp_name]) > 1= : >=20 > + inc_file =3D temp_file_dict[tmp_name][-2] >=20 > + file_lines[inc_file].extend(['', '- !include %s' % > temp_file_dict[tmp_name][-1], '']) >=20 > + last_file =3D file >=20 > + if file not in file_lines: >=20 > + file_lines[file] =3D [] >=20 > + lines =3D file_lines[file] >=20 > + text =3D bsf_temp_dict[tmp_name] >=20 > + tmp_list =3D self.process_option_lines(text) >=20 > + self.template_fixup(tmp_name, tmp_list) >=20 > + template_dict[tmp_name] =3D tmp_list >=20 > + lines.append('%s: >' % tmp_name) >=20 > + lines.extend(self.output_dict(tmp_list, False)['.']) >=20 > + lines.append('\n') >=20 > + return file_lines >=20 > + >=20 > + def output_config(self): >=20 > + """ >=20 > + Output config block into a line list. >=20 > + """ >=20 > + self.offset =3D 0 >=20 > + self.base_offset =3D 0 >=20 > + start, end =3D self.get_section_range('PcdsDynamicVpd.Upd') >=20 > + cfgs =3D self.process_option_lines(self.gen_cfg_data._DscLines[s= tart:end]) >=20 > + self.config_fixup(cfgs) >=20 > + file_lines =3D self.output_dict(cfgs, True) >=20 > + return file_lines >=20 > + >=20 > + def output_dict(self, cfgs, is_configs): >=20 > + """ >=20 > + Output one config item into a line list. >=20 > + """ >=20 > + file_lines =3D {} >=20 > + level =3D 0 >=20 > + file =3D '.' >=20 > + for each in cfgs: >=20 > + if 'length' in each and int(each['length'], 0) =3D=3D 0: >=20 > + continue >=20 > + >=20 > + if 'include' in each: >=20 > + if each['include']: >=20 > + each['include'] =3D self.normalize_file_name(each['i= nclude']) >=20 > + file_lines[file].extend(['', '- !include %s' % each[= 'include'], '']) >=20 > + file =3D each['include'] >=20 > + else: >=20 > + file =3D '.' >=20 > + continue >=20 > + >=20 > + if file not in file_lines: >=20 > + file_lines[file] =3D [] >=20 > + >=20 > + lines =3D file_lines[file] >=20 > + name =3D each['cname'] >=20 > + >=20 > + prefix =3D name[0] >=20 > + if prefix =3D=3D '<': >=20 > + level +=3D 1 >=20 > + >=20 > + padding =3D ' ' * level >=20 > + if prefix not in '<>@': >=20 > + padding +=3D ' ' >=20 > + else: >=20 > + name =3D name[1:] >=20 > + if prefix =3D=3D '@': >=20 > + padding +=3D ' ' >=20 > + >=20 > + if ':' in name: >=20 > + parts =3D name.split(':') >=20 > + name =3D parts[0] >=20 > + >=20 > + padding =3D padding[2:] if is_configs else padding >=20 > + >=20 > + if prefix !=3D '>': >=20 > + if 'expand' in each: >=20 > + lines.append('%s- %s' % (padding, each['expand'])) >=20 > + else: >=20 > + lines.append('%s- %-12s :' % (padding, name)) >=20 > + >=20 > + for field in each: >=20 > + if field in ['cname', 'expand', 'include']: >=20 > + continue >=20 > + value_str =3D self.format_value(field, each[field], padd= ing + ' ' * 16) >=20 > + full_line =3D ' %s %-12s : %s' % (padding, field, valu= e_str) >=20 > + lines.extend(full_line.splitlines()) >=20 > + >=20 > + if prefix =3D=3D '>': >=20 > + level -=3D 1 >=20 > + if level =3D=3D 0: >=20 > + lines.append('') >=20 > + >=20 > + return file_lines >=20 > + >=20 > + >=20 > +def bsf_to_dsc(bsf_file, dsc_file): >=20 > + fsp_dsc =3D CFspBsf2Dsc(bsf_file) >=20 > + dsc_lines =3D fsp_dsc.get_dsc_lines() >=20 > + fd =3D open(dsc_file, 'w') >=20 > + fd.write('\n'.join(dsc_lines)) >=20 > + fd.close() >=20 > + return >=20 > + >=20 > + >=20 > +def dsc_to_yaml(dsc_file, yaml_file): >=20 > + dsc2yaml =3D CFspDsc2Yaml() >=20 > + dsc2yaml.load_config_data_from_dsc(dsc_file) >=20 > + >=20 > + cfgs =3D {} >=20 > + for cfg in ['Template', 'Option']: >=20 > + if cfg =3D=3D 'Template': >=20 > + file_lines =3D dsc2yaml.output_template() >=20 > + else: >=20 > + file_lines =3D dsc2yaml.output_config() >=20 > + for file in file_lines: >=20 > + lines =3D file_lines[file] >=20 > + if file =3D=3D '.': >=20 > + cfgs[cfg] =3D lines >=20 > + else: >=20 > + if('/' in file or '\\' in file): >=20 > + continue >=20 > + file =3D os.path.basename(file) >=20 > + fo =3D open(os.path.join(file), 'w') >=20 > + fo.write(__copyright_tmp__ % (cfg, date.today().year) + = '\n\n') >=20 > + for line in lines: >=20 > + fo.write(line + '\n') >=20 > + fo.close() >=20 > + >=20 > + variables =3D dsc2yaml.output_variable() >=20 > + fo =3D open(yaml_file, 'w') >=20 > + fo.write(__copyright_tmp__ % ('Default', date.today().year)) >=20 > + if len(variables) > 0: >=20 > + fo.write('\n\nvariable:\n') >=20 > + for line in variables: >=20 > + fo.write(' ' + line + '\n') >=20 > + >=20 > + fo.write('\n\ntemplate:\n') >=20 > + for line in cfgs['Template']: >=20 > + fo.write(' ' + line + '\n') >=20 > + >=20 > + fo.write('\n\nconfigs:\n') >=20 > + for line in cfgs['Option']: >=20 > + fo.write(' ' + line + '\n') >=20 > + >=20 > + fo.close() >=20 > + >=20 > + >=20 > +def get_fsp_name_from_path(bsf_file): >=20 > + name =3D '' >=20 > + parts =3D bsf_file.split(os.sep) >=20 > + for part in parts: >=20 > + if part.endswith('FspBinPkg'): >=20 > + name =3D part[:-9] >=20 > + break >=20 > + if not name: >=20 > + raise Exception('Could not get FSP name from file path!') >=20 > + return name >=20 > + >=20 > + >=20 > +def usage(): >=20 > + print('\n'.join([ >=20 > + "FspDscBsf2Yaml Version 0.10", >=20 > + "Usage:", >=20 > + " FspDscBsf2Yaml BsfFile|DscFile YamlFile" >=20 > + ])) >=20 > + >=20 > + >=20 > +def main(): >=20 > + # >=20 > + # Parse the options and args >=20 > + # >=20 > + argc =3D len(sys.argv) >=20 > + if argc < 3: >=20 > + usage() >=20 > + return 1 >=20 > + >=20 > + bsf_file =3D sys.argv[1] >=20 > + yaml_file =3D sys.argv[2] >=20 > + if os.path.isdir(yaml_file): >=20 > + yaml_file =3D os.path.join(yaml_file, get_fsp_name_from_path(bsf= _file) + > '.yaml') >=20 > + >=20 > + if bsf_file.endswith('.dsc'): >=20 > + dsc_file =3D bsf_file >=20 > + bsf_file =3D '' >=20 > + else: >=20 > + dsc_file =3D os.path.splitext(yaml_file)[0] + '.dsc' >=20 > + bsf_to_dsc(bsf_file, dsc_file) >=20 > + >=20 > + dsc_to_yaml(dsc_file, yaml_file) >=20 > + >=20 > + print("'%s' was created successfully!" % yaml_file) >=20 > + >=20 > + return 0 >=20 > + >=20 > + >=20 > +if __name__ =3D=3D '__main__': >=20 > + sys.exit(main()) >=20 > diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py > b/IntelFsp2Pkg/Tools/GenCfgOpt.py > index a0b8bba81e..660824b740 100644 > --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py > +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py > @@ -1,6 +1,6 @@ > ## @ GenCfgOpt.py >=20 > # >=20 > -# Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
>=20 > +# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
>=20 > # SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > # >=20 > ## >=20 > @@ -283,10 +283,10 @@ class CLogicalExpression: > return Result >=20 >=20 >=20 > class CGenCfgOpt: >=20 > - def __init__(self): >=20 > + def __init__(self, Mode =3D ''): >=20 > self.Debug =3D False >=20 > self.Error =3D '' >=20 > - >=20 > + self.Mode =3D Mode >=20 > self._GlobalDataDef =3D """ >=20 > GlobalDataDef >=20 > SKUID =3D 0, "DEFAULT" >=20 > @@ -300,18 +300,20 @@ List &EN_DIS > EndList >=20 >=20 >=20 > """ >=20 > - >=20 > - self._BsfKeyList =3D ['FIND','NAME','HELP','TYPE','PAGE','OPT= ION','ORDER'] >=20 > + self._BsfKeyList =3D ['FIND','NAME','HELP','TYPE','PAGE', 'PA= GES', 'BLOCK', > 'OPTION','CONDITION','ORDER', 'MARKER', 'SUBT'] >=20 > self._HdrKeyList =3D ['HEADER','STRUCT', 'EMBED', 'COMMENT'] >=20 > self._BuidinOption =3D {'$EN_DIS' : 'EN_DIS'} >=20 >=20 >=20 > self._MacroDict =3D {} >=20 > + self._VarDict =3D {} >=20 > self._PcdsDict =3D {} >=20 > self._CfgBlkDict =3D {} >=20 > self._CfgPageDict =3D {} >=20 > + self._BsfTempDict =3D {} >=20 > self._CfgItemList =3D [] >=20 > + self._DscLines =3D [] >=20 > self._DscFile =3D '' >=20 > - self._FvDir =3D '' >=20 > + >=20 > self._MapVer =3D 0 >=20 > self._DscTime =3D 0 >=20 >=20 >=20 > @@ -351,7 +353,7 @@ EndList > print ("INFO : Eval Ifdef [%s] : %s" % (Macro, Result)) >=20 > return Result >=20 >=20 >=20 > - def ExpandMacros (self, Input): >=20 > + def ExpandMacros (self, Input, Preserve =3D False): >=20 > Line =3D Input >=20 > Match =3D re.findall("\$\(\w+\)", Input) >=20 > if Match: >=20 > @@ -362,7 +364,8 @@ EndList > else: >=20 > if self.Debug: >=20 > print ("WARN : %s is not defined" % Each) >=20 > - Line =3D Line.replace(Each, Each[2:-1]) >=20 > + if not Preserve: >=20 > + Line =3D Line.replace(Each, Each[2:-1]) >=20 > return Line >=20 >=20 >=20 > def ExpandPcds (self, Input): >=20 > @@ -386,6 +389,70 @@ EndList > print ("INFO : Eval Express [%s] : %s" % (Expr, Result)) >=20 > return Result >=20 >=20 >=20 > + def ValueToByteArray (self, ValueStr, Length): >=20 > + Match =3D re.match("\{\s*FILE:(.+)\}", ValueStr) >=20 > + if Match: >=20 > + FileList =3D Match.group(1).split(',') >=20 > + Result =3D bytearray() >=20 > + for File in FileList: >=20 > + File =3D File.strip() >=20 > + BinPath =3D os.path.join(os.path.dirname(self._DscFile), Fil= e) >=20 > + Result.extend(bytearray(open(BinPath, 'rb').read())) >=20 > + else: >=20 > + try: >=20 > + Result =3D bytearray(self.ValueToList(ValueStr, Length)= ) >=20 > + except ValueError as e: >=20 > + raise Exception ("Bytes in '%s' must be in range 0~255 != " % ValueStr) >=20 > + if len(Result) < Length: >=20 > + Result.extend(b'\x00' * (Length - len(Result))) >=20 > + elif len(Result) > Length: >=20 > + raise Exception ("Value '%s' is too big to fit into %d bytes= !" % (ValueStr, > Length)) >=20 > + >=20 > + return Result[:Length] >=20 > + >=20 > + def ValueToList (self, ValueStr, Length): >=20 > + if ValueStr[0] =3D=3D '{': >=20 > + Result =3D [] >=20 > + BinList =3D ValueStr[1:-1].split(',') >=20 > + InBitField =3D False >=20 > + LastInBitField =3D False >=20 > + Value =3D 0 >=20 > + BitLen =3D 0 >=20 > + for Element in BinList: >=20 > + InBitField =3D False >=20 > + Each =3D Element.strip() >=20 > + if len(Each) =3D=3D 0: >=20 > + pass >=20 > + else: >=20 > + if Each[0] in ['"', "'"]: >=20 > + Result.extend(list(bytearray(Each[1:-1], 'utf-8'= ))) >=20 > + elif ':' in Each: >=20 > + Match =3D re.match("(.+):(\d+)b", Each) >=20 > + if Match is None: >=20 > + raise Exception("Invald value list format '%= s' !" % Each) >=20 > + InBitField =3D True >=20 > + CurrentBitLen =3D int(Match.group(2)) >=20 > + CurrentValue =3D ((self.EvaluateExpress(Match.g= roup(1)) & > (1<=20 > + else: >=20 > + Result.append(self.EvaluateExpress(Each.strip())= ) >=20 > + if InBitField: >=20 > + Value +=3D CurrentValue >=20 > + BitLen +=3D CurrentBitLen >=20 > + if LastInBitField and ((not InBitField) or (Element =3D= =3D BinList[-1])): >=20 > + if BitLen % 8 !=3D 0: >=20 > + raise Exception("Invald bit field length!") >=20 > + Result.extend(Val2Bytes(Value, BitLen // 8)) >=20 > + Value =3D 0 >=20 > + BitLen =3D 0 >=20 > + LastInBitField =3D InBitField >=20 > + elif ValueStr.startswith("'") and ValueStr.endswith("'"): >=20 > + Result =3D Str2Bytes (ValueStr, Length) >=20 > + elif ValueStr.startswith('"') and ValueStr.endswith('"'): >=20 > + Result =3D Str2Bytes (ValueStr, Length) >=20 > + else: >=20 > + Result =3D Val2Bytes (self.EvaluateExpress(ValueStr), Length= ) >=20 > + return Result >=20 > + >=20 > def FormatListValue(self, ConfigDict): >=20 > Struct =3D ConfigDict['struct'] >=20 > if Struct not in ['UINT8','UINT16','UINT32','UINT64']: >=20 > @@ -424,28 +491,53 @@ EndList > self._DscFile =3D DscFile >=20 > self._FvDir =3D FvDir >=20 >=20 >=20 > + self._DscLines =3D [] >=20 > + self._BsfTempDict =3D {} >=20 > + >=20 > # Initial DSC time is parent DSC time. >=20 > self._DscTime =3D os.path.getmtime(DscFile) >=20 >=20 >=20 > + CfgDict =3D {} >=20 > + >=20 > IsDefSect =3D False >=20 > IsPcdSect =3D False >=20 > IsUpdSect =3D False >=20 > IsVpdSect =3D False >=20 > + IsTmpSect =3D False >=20 > + >=20 > + TemplateName =3D '' >=20 >=20 >=20 > IfStack =3D [] >=20 > ElifStack =3D [] >=20 > Error =3D 0 >=20 > ConfigDict =3D {} >=20 >=20 >=20 > - DscFd =3D open(DscFile, "r") >=20 > - DscLines =3D DscFd.readlines() >=20 > - DscFd.close() >=20 > + >=20 > + if type(DscFile) is list: >=20 > + # it is DSC lines already >=20 > + DscLines =3D DscFile >=20 > + self._DscFile =3D '.' >=20 > + else: >=20 > + DscFd =3D open(DscFile, "r") >=20 > + DscLines =3D DscFd.readlines() >=20 > + DscFd.close() >=20 > + self._DscFile =3D DscFile >=20 > + >=20 > + SkipLines =3D 0 >=20 >=20 >=20 > MaxAlign =3D 32 #Default align to 32, but if there are 64 bit = unit, align to 64 >=20 > SizeAlign =3D 0 #record the struct max align >=20 > Base =3D 0 #Starting offset of sub-structure. >=20 > + >=20 > while len(DscLines): >=20 > DscLine =3D DscLines.pop(0).strip() >=20 > + if SkipLines =3D=3D 0: >=20 > + self._DscLines.append (DscLine) >=20 > + else: >=20 > + SkipLines =3D SkipLines - 1 >=20 > + if len(DscLine) =3D=3D 0: >=20 > + continue >=20 > + >=20 > Handle =3D False >=20 > Match =3D re.match("^\[(.+)\]", DscLine) >=20 > if Match is not None: >=20 > @@ -453,11 +545,15 @@ EndList > IsPcdSect =3D False >=20 > IsVpdSect =3D False >=20 > IsUpdSect =3D False >=20 > - if Match.group(1).lower() =3D=3D "Defines".lower(): >=20 > + IsTmpSect =3D False >=20 > + SectionName =3D Match.group(1).lower() >=20 > + if SectionName =3D=3D "Defines".lower(): >=20 > IsDefSect =3D True >=20 > - if (Match.group(1).lower() =3D=3D "PcdsFeatureFlag".low= er() or > Match.group(1).lower() =3D=3D "PcdsFixedAtBuild".lower()): >=20 > + if (SectionName =3D=3D "PcdsFeatureFlag".lower() or Sec= tionName =3D=3D > "PcdsFixedAtBuild".lower()): >=20 > IsPcdSect =3D True >=20 > - elif Match.group(1).lower() =3D=3D "PcdsDynamicVpd.Upd".= lower(): >=20 > + elif SectionName =3D=3D "PcdsDynamicVpd.Tmp".lower(): >=20 > + IsTmpSect =3D True >=20 > + elif SectionName =3D=3D "PcdsDynamicVpd.Upd".lower(): >=20 > ConfigDict =3D {} >=20 > ConfigDict['header'] =3D 'ON' >=20 > ConfigDict['region'] =3D 'UPD' >=20 > @@ -465,90 +561,98 @@ EndList > ConfigDict['page'] =3D '' >=20 > ConfigDict['name'] =3D '' >=20 > ConfigDict['find'] =3D '' >=20 > + ConfigDict['marker'] =3D '' >=20 > ConfigDict['struct'] =3D '' >=20 > ConfigDict['embed'] =3D '' >=20 > ConfigDict['comment'] =3D '' >=20 > ConfigDict['subreg'] =3D [] >=20 > + ConfigDict['condition'] =3D '' >=20 > + ConfigDict['option'] =3D '' >=20 > IsUpdSect =3D True >=20 > Offset =3D 0 >=20 > else: >=20 > - if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect: >=20 > - if re.match("^!else($|\s+#.+)", DscLine): >=20 > + if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect or I= sTmpSect: >=20 > + >=20 > + Match =3D False if DscLine[0] !=3D '!' else True >=20 > + if Match: >=20 > + Match =3D > re.match("^!(else|endif|ifdef|ifndef|if|elseif|include)\s*(.+)?$", > DscLine.split("#")[0]) >=20 > + Keyword =3D Match.group(1) if Match else '' >=20 > + Remaining =3D Match.group(2) if Match else '' >=20 > + Remaining =3D '' if Remaining is None else Remaining= .strip() >=20 > + >=20 > + if Keyword in ['if', 'elseif', 'ifdef', 'ifndef', 'i= nclude'] and not > Remaining: >=20 > + raise Exception ("ERROR: Expression is expected = after '!if' > or !elseif' for line '%s'" % DscLine) >=20 > + >=20 > + if Keyword =3D=3D 'else': >=20 > if IfStack: >=20 > IfStack[-1] =3D not IfStack[-1] >=20 > else: >=20 > - print("ERROR: No paired '!if' found for '!el= se' for line '%s'" % > DscLine) >=20 > - raise SystemExit >=20 > - elif re.match("^!endif($|\s+#.+)", DscLine): >=20 > + raise Exception ("ERROR: No paired '!if' fou= nd for '!else' for line > '%s'" % DscLine) >=20 > + elif Keyword =3D=3D 'endif': >=20 > if IfStack: >=20 > IfStack.pop() >=20 > Level =3D ElifStack.pop() >=20 > if Level > 0: >=20 > del IfStack[-Level:] >=20 > else: >=20 > - print("ERROR: No paired '!if' found for '!en= dif' for line '%s'" % > DscLine) >=20 > - raise SystemExit >=20 > - else: >=20 > - Result =3D False >=20 > - Match =3D re.match("!(ifdef|ifndef)\s+(.+)", Dsc= Line) >=20 > - if Match: >=20 > - Result =3D self.EvaulateIfdef (Match.group(2= )) >=20 > - if Match.group(1) =3D=3D 'ifndef': >=20 > - Result =3D not Result >=20 > - IfStack.append(Result) >=20 > + raise Exception ("ERROR: No paired '!if' fou= nd for '!endif' for > line '%s'" % DscLine) >=20 > + elif Keyword =3D=3D 'ifdef' or Keyword =3D=3D 'ifnde= f': >=20 > + Result =3D self.EvaulateIfdef (Remaining) >=20 > + if Keyword =3D=3D 'ifndef': >=20 > + Result =3D not Result >=20 > + IfStack.append(Result) >=20 > + ElifStack.append(0) >=20 > + elif Keyword =3D=3D 'if' or Keyword =3D=3D 'elseif': >=20 > + Result =3D self.EvaluateExpress(Remaining) >=20 > + if Keyword =3D=3D "if": >=20 > ElifStack.append(0) >=20 > + IfStack.append(Result) >=20 > + else: #elseif >=20 > + if IfStack: >=20 > + IfStack[-1] =3D not IfStack[-1] >=20 > + IfStack.append(Result) >=20 > + ElifStack[-1] =3D ElifStack[-1] + 1 >=20 > + else: >=20 > + raise Exception ("ERROR: No paired '!if'= found for '!elif' for > line '%s'" % DscLine) >=20 > + else: >=20 > + if IfStack: >=20 > + Handle =3D reduce(lambda x,y: x and y, IfSta= ck) >=20 > else: >=20 > - Match =3D re.match("!(if|elseif)\s+(.+)", D= scLine.split("#")[0]) >=20 > + Handle =3D True >=20 > + if Handle: >=20 > + Match =3D re.match("!include\s+(.+)", DscLin= e) >=20 > if Match: >=20 > - Result =3D self.EvaluateExpress(Match.gr= oup(2)) >=20 > - if Match.group(1) =3D=3D "if": >=20 > - ElifStack.append(0) >=20 > - IfStack.append(Result) >=20 > - else: #elseif >=20 > - if IfStack: >=20 > - IfStack[-1] =3D not IfStack[-1] >=20 > - IfStack.append(Result) >=20 > - ElifStack[-1] =3D ElifStack[-1] = + 1 >=20 > - else: >=20 > - print("ERROR: No paired '!if' fo= und for '!elif' for line '%s'" > % DscLine) >=20 > - raise SystemExit >=20 > - else: >=20 > - if IfStack: >=20 > - Handle =3D reduce(lambda x,y: x and = y, IfStack) >=20 > + IncludeFilePath =3D Match.group(1) >=20 > + IncludeFilePath =3D self.ExpandMacros(In= cludeFilePath) >=20 > + PackagesPath =3D os.getenv("PACKAGES_PAT= H") >=20 > + if PackagesPath: >=20 > + for PackagePath in PackagesPath.split(= os.pathsep): >=20 > + IncludeFilePathAbs =3D > os.path.join(os.path.normpath(PackagePath), > os.path.normpath(IncludeFilePath)) >=20 > + if os.path.exists(IncludeFilePathA= bs): >=20 > + IncludeDsc =3D open(IncludeFi= lePathAbs, "r") >=20 > + break >=20 > else: >=20 > - Handle =3D True >=20 > - if Handle: >=20 > - Match =3D re.match("!include\s+(.+)"= , DscLine) >=20 > - if Match: >=20 > - IncludeFilePath =3D Match.group(= 1) >=20 > - IncludeFilePath =3D self.ExpandM= acros(IncludeFilePath) >=20 > - PackagesPath =3D os.getenv("PACK= AGES_PATH") >=20 > - if PackagesPath: >=20 > - for PackagePath in PackagesPat= h.split(os.pathsep): >=20 > - IncludeFilePathAbs =3D > os.path.join(os.path.normpath(PackagePath), > os.path.normpath(IncludeFilePath)) >=20 > - if os.path.exists(IncludeF= ilePathAbs): >=20 > - IncludeDsc =3D open(I= ncludeFilePathAbs, "r") >=20 > - break >=20 > - else: >=20 > - IncludeDsc =3D open(IncludeFi= lePath, "r") >=20 > - if IncludeDsc =3D=3D None: >=20 > - print("ERROR: Cannot open fi= le '%s'" % IncludeFilePath) >=20 > - raise SystemExit >=20 > - >=20 > - # Update DscTime when newer DSC = time found. >=20 > - CurrentDscTime =3D > os.path.getmtime(os.path.realpath(IncludeDsc.name)) >=20 > - if CurrentDscTime > self._DscTim= e: >=20 > - self._DscTime =3D CurrentDsc= Time >=20 > - >=20 > - NewDscLines =3D IncludeDsc.readl= ines() >=20 > - IncludeDsc.close() >=20 > - DscLines =3D NewDscLines + DscLi= nes >=20 > - Offset =3D 0 >=20 > - else: >=20 > - if DscLine.startswith('!'): >=20 > - print("ERROR: Unrecognized d= irective for line '%s'" % > DscLine) >=20 > - raise SystemExit >=20 > + IncludeDsc =3D open(IncludeFilePath, = "r") >=20 > + if IncludeDsc =3D=3D None: >=20 > + print("ERROR: Cannot open file '%s'"= % IncludeFilePath) >=20 > + raise SystemExit >=20 > + >=20 > + # Update DscTime when newer DSC time fou= nd. >=20 > + CurrentDscTime =3D > os.path.getmtime(os.path.realpath(IncludeDsc.name)) >=20 > + if CurrentDscTime > self._DscTime: >=20 > + self._DscTime =3D CurrentDscTime >=20 > + >=20 > + NewDscLines =3D IncludeDsc.readlines() >=20 > + IncludeDsc.close() >=20 > + DscLines =3D NewDscLines + DscLines >=20 > + del self._DscLines[-1] >=20 > + Offset =3D 0 >=20 > + else: >=20 > + if DscLine.startswith('!'): >=20 > + print("ERROR: Unrecognized directive= for line '%s'" % > DscLine) >=20 > + raise SystemExit >=20 > if not Handle: >=20 > + del self._DscLines[-1] >=20 > continue >=20 >=20 >=20 > if IsDefSect: >=20 > @@ -556,7 +660,7 @@ EndList > #DEFINE FSP_T_UPD_TOOL_GUID =3D 34686CA3-34F9-4901-B82A- > BA630F0714C6 >=20 > #DEFINE FSP_M_UPD_TOOL_GUID =3D 39A250DB-E465-4DD1-A2AC- > E2BD3C0E2385 >=20 > #DEFINE FSP_S_UPD_TOOL_GUID =3D CAE3605B-5B34-4C85-B3D7- > 27D54273C40F >=20 > - Match =3D re.match("^\s*(?:DEFINE\s+)*(\w+)\s*=3D\s*([/$= ()-.\w]+)", > DscLine) >=20 > + Match =3D re.match("^\s*(?:DEFINE\s+)*(\w+)\s*=3D\s*(.+)= ", DscLine) >=20 > if Match: >=20 > self._MacroDict[Match.group(1)] =3D > self.ExpandMacros(Match.group(2)) >=20 > if self.Debug: >=20 > @@ -575,6 +679,23 @@ EndList > if Match: >=20 > self._PcdsDict[Match.group(1)] =3D Match.gro= up(2) >=20 > i +=3D 1 >=20 > + >=20 > + elif IsTmpSect: >=20 > + # !BSF DEFT:{GPIO_TMPL:START} >=20 > + Match =3D re.match("^\s*#\s+(!BSF)\s+DEFT:{(.+?):(START|= END)}", > DscLine) >=20 > + if Match: >=20 > + if Match.group(3) =3D=3D 'START' and not TemplateNam= e: >=20 > + TemplateName =3D Match.group(2).strip() >=20 > + self._BsfTempDict[TemplateName] =3D [] >=20 > + if Match.group(3) =3D=3D 'END' and (TemplateName =3D= =3D > Match.group(2).strip()) and TemplateName: >=20 > + TemplateName =3D '' >=20 > + else: >=20 > + if TemplateName: >=20 > + Match =3D re.match("^!include\s*(.+)?$", DscLine= ) >=20 > + if Match: >=20 > + continue >=20 > + self._BsfTempDict[TemplateName].append(DscLine) >=20 > + >=20 > else: >=20 > Match =3D re.match("^\s*#\s+(!BSF|@Bsf|!HDR)\s+(.+)", Ds= cLine) >=20 > if Match: >=20 > @@ -630,9 +751,9 @@ EndList > Match =3D re.match("^\s*#\s*@ValidRange\s*(.+)\s*\|\s*(.= +)\s*- > \s*(.+)\s*", DscLine) >=20 > if Match: >=20 > if "0x" in Match.group(2) or "0x" in Match.group(3): >=20 > - ConfigDict['type'] =3D "EditNum, HEX, (%s,%s)" % = (Match.group(2), > Match.group(3)) >=20 > + ConfigDict['type'] =3D "EditNum, HEX, (%s,%s)" %= (Match.group(2), > Match.group(3)) >=20 > else: >=20 > - ConfigDict['type'] =3D "EditNum, DEC, (%s,%s)" % = (Match.group(2), > Match.group(3)) >=20 > + ConfigDict['type'] =3D "EditNum, DEC, (%s,%s)" %= (Match.group(2), > Match.group(3)) >=20 >=20 >=20 > Match =3D re.match("^\s*##\s+(.+)", DscLine) >=20 > if Match: >=20 > @@ -748,6 +869,7 @@ EndList > ConfigDict['struct'] =3D '' >=20 > ConfigDict['embed'] =3D '' >=20 > ConfigDict['comment'] =3D '' >=20 > + ConfigDict['marker'] =3D '' >=20 > ConfigDict['order'] =3D -1 >=20 > ConfigDict['subreg'] =3D [] >=20 > ConfigDict['option'] =3D '' >=20 > @@ -786,9 +908,8 @@ EndList > bitsvalue =3D bitsvalue[::-1] >=20 > bitslen =3D len(bitsvalue) >=20 > if start > bitslen or end > bitslen: >=20 > - print ("Invalid bits offset [%d,%d] for %s" % (start, end, s= ubitem['name'])) >=20 > - raise SystemExit >=20 > - return hex(int(bitsvalue[start:end][::-1], 2)) >=20 > + raise Exception ("Invalid bits offset [%d,%d] %d for %s" % (= start, end, > bitslen, subitem['name'])) >=20 > + return '0x%X' % (int(bitsvalue[start:end][::-1], 2)) >=20 >=20 >=20 > def UpdateSubRegionDefaultValue (self): >=20 > Error =3D 0 >=20 > @@ -888,63 +1009,142 @@ EndList > TxtFd.close() >=20 > return 0 >=20 >=20 >=20 > - def ProcessMultilines (self, String, MaxCharLength): >=20 > - Multilines =3D '' >=20 > - StringLength =3D len(String) >=20 > - CurrentStringStart =3D 0 >=20 > - StringOffset =3D 0 >=20 > - BreakLineDict =3D [] >=20 > - if len(String) <=3D MaxCharLength: >=20 > - while (StringOffset < StringLength): >=20 > - if StringOffset >=3D 1: >=20 > - if String[StringOffset - 1] =3D=3D '\\' and Stri= ng[StringOffset] =3D=3D 'n': >=20 > - BreakLineDict.append (StringOffset + 1) >=20 > - StringOffset +=3D 1 >=20 > - if BreakLineDict !=3D []: >=20 > - for Each in BreakLineDict: >=20 > - Multilines +=3D " %s\n" % String[CurrentStringS= tart:Each].lstrip() >=20 > - CurrentStringStart =3D Each >=20 > - if StringLength - CurrentStringStart > 0: >=20 > - Multilines +=3D " %s\n" % String[CurrentStringS= tart:].lstrip() >=20 > + def CreateVarDict (self): >=20 > + Error =3D 0 >=20 > + self._VarDict =3D {} >=20 > + if len(self._CfgItemList) > 0: >=20 > + Item =3D self._CfgItemList[-1] >=20 > + self._VarDict['_LENGTH_'] =3D '%d' % (Item['offset'] + Item[= 'length']) >=20 > + for Item in self._CfgItemList: >=20 > + Embed =3D Item['embed'] >=20 > + Match =3D re.match("^(\w+):(\w+):(START|END)", Embed) >=20 > + if Match: >=20 > + StructName =3D Match.group(1) >=20 > + VarName =3D '_%s_%s_' % (Match.group(3), StructName) >=20 > + if Match.group(3) =3D=3D 'END': >=20 > + self._VarDict[VarName] =3D Item['offset'] + Item['le= ngth'] >=20 > + self._VarDict['_LENGTH_%s_' % StructName] =3D \ >=20 > + self._VarDict['_END_%s_' % StructName] - > self._VarDict['_START_%s_' % StructName] >=20 > + if Match.group(2).startswith('TAG_'): >=20 > + if (self.Mode !=3D 'FSP') and (self._VarDict['_L= ENGTH_%s_' % > StructName] % 4): >=20 > + raise Exception("Size of structure '%s' is %= d, not DWORD > aligned !" % (StructName, self._VarDict['_LENGTH_%s_' % StructName])) >=20 > + self._VarDict['_TAG_%s_' % StructName] =3D int > (Match.group(2)[4:], 16) & 0xFFF >=20 > else: >=20 > - Multilines =3D " %s\n" % String >=20 > + self._VarDict[VarName] =3D Item['offset'] >=20 > + if Item['marker']: >=20 > + self._VarDict['_OFFSET_%s_' % Item['marker'].strip()] = =3D Item['offset'] >=20 > + return Error >=20 > + >=20 > + def UpdateBsfBitUnit (self, Item): >=20 > + BitTotal =3D 0 >=20 > + BitOffset =3D 0 >=20 > + StartIdx =3D 0 >=20 > + Unit =3D None >=20 > + UnitDec =3D {1:'BYTE', 2:'WORD', 4:'DWORD', 8:'QWORD'} >=20 > + for Idx, SubItem in enumerate(Item['subreg']): >=20 > + if Unit is None: >=20 > + Unit =3D SubItem['bitunit'] >=20 > + BitLength =3D SubItem['bitlength'] >=20 > + BitTotal +=3D BitLength >=20 > + BitOffset +=3D BitLength >=20 > + >=20 > + if BitOffset > 64 or BitOffset > Unit * 8: >=20 > + break >=20 > + >=20 > + if BitOffset =3D=3D Unit * 8: >=20 > + for SubIdx in range (StartIdx, Idx + 1): >=20 > + Item['subreg'][SubIdx]['bitunit'] =3D Unit >=20 > + BitOffset =3D 0 >=20 > + StartIdx =3D Idx + 1 >=20 > + Unit =3D None >=20 > + >=20 > + if BitOffset > 0: >=20 > + raise Exception ("Bit fields cannot fit into %s for '%s.%s' = !" % > (UnitDec[Unit], Item['cname'], SubItem['cname'])) >=20 > + >=20 > + ExpectedTotal =3D Item['length'] * 8 >=20 > + if Item['length'] * 8 !=3D BitTotal: >=20 > + raise Exception ("Bit fields total length (%d) does not matc= h length (%d) > of '%s' !" % (BitTotal, ExpectedTotal, Item['cname'])) >=20 > + >=20 > + def UpdateDefaultValue (self): >=20 > + Error =3D 0 >=20 > + for Idx, Item in enumerate(self._CfgItemList): >=20 > + if len(Item['subreg']) =3D=3D 0: >=20 > + Value =3D Item['value'] >=20 > + if (len(Value) > 0) and (Value[0] =3D=3D '{' or Value[0]= =3D=3D "'" or Value[0] =3D=3D > '"'): >=20 > + # {XXX} or 'XXX' strings >=20 > + self.FormatListValue(self._CfgItemList[Idx]) >=20 > + else: >=20 > + Match =3D re.match("(0x[0-9a-fA-F]+|[0-9]+)", Value) >=20 > + if not Match: >=20 > + NumValue =3D self.EvaluateExpress (Value) >=20 > + Item['value'] =3D '0x%X' % NumValue >=20 > else: >=20 > - NewLineStart =3D 0 >=20 > - NewLineCount =3D 0 >=20 > - FoundSpaceChar =3D False >=20 > - while (StringOffset < StringLength): >=20 > - if StringOffset >=3D 1: >=20 > - if NewLineCount >=3D MaxCharLength - 1: >=20 > - if String[StringOffset] =3D=3D ' ' and Strin= gLength - StringOffset > 10: >=20 > - BreakLineDict.append (NewLineStart + New= LineCount) >=20 > - NewLineStart =3D NewLineStart + NewLineC= ount >=20 > - NewLineCount =3D 0 >=20 > - FoundSpaceChar =3D True >=20 > - elif StringOffset =3D=3D StringLength - 1 an= d FoundSpaceChar =3D=3D > False: >=20 > - BreakLineDict.append (0) >=20 > - if String[StringOffset - 1] =3D=3D '\\' and Stri= ng[StringOffset] =3D=3D 'n': >=20 > - BreakLineDict.append (StringOffset + 1) >=20 > - NewLineStart =3D StringOffset + 1 >=20 > + ValArray =3D self.ValueToByteArray (Item['value'], Item[= 'length']) >=20 > + for SubItem in Item['subreg']: >=20 > + SubItem['value'] =3D self.GetBsfBitFields(SubItem,= ValArray) >=20 > + self.UpdateBsfBitUnit (Item) >=20 > + return Error >=20 > + >=20 > + def ProcessMultilines (self, String, MaxCharLength): >=20 > + Multilines =3D '' >=20 > + StringLength =3D len(String) >=20 > + CurrentStringStart =3D 0 >=20 > + StringOffset =3D 0 >=20 > + BreakLineDict =3D [] >=20 > + if len(String) <=3D MaxCharLength: >=20 > + while (StringOffset < StringLength): >=20 > + if StringOffset >=3D 1: >=20 > + if String[StringOffset - 1] =3D=3D '\\' and String[S= tringOffset] =3D=3D 'n': >=20 > + BreakLineDict.append (StringOffset + 1) >=20 > + StringOffset +=3D 1 >=20 > + if BreakLineDict !=3D []: >=20 > + for Each in BreakLineDict: >=20 > + Multilines +=3D " %s\n" % String[CurrentStringStart= :Each].lstrip() >=20 > + CurrentStringStart =3D Each >=20 > + if StringLength - CurrentStringStart > 0: >=20 > + Multilines +=3D " %s\n" % String[CurrentStringStart= :].lstrip() >=20 > + else: >=20 > + Multilines =3D " %s\n" % String >=20 > + else: >=20 > + NewLineStart =3D 0 >=20 > + NewLineCount =3D 0 >=20 > + FoundSpaceChar =3D False >=20 > + while (StringOffset < StringLength): >=20 > + if StringOffset >=3D 1: >=20 > + if NewLineCount >=3D MaxCharLength - 1: >=20 > + if String[StringOffset] =3D=3D ' ' and StringLen= gth - StringOffset > 10: >=20 > + BreakLineDict.append (NewLineStart + NewLine= Count) >=20 > + NewLineStart =3D NewLineStart + NewLineCount >=20 > NewLineCount =3D 0 >=20 > - StringOffset +=3D 1 >=20 > - NewLineCount +=3D 1 >=20 > - if BreakLineDict !=3D []: >=20 > - BreakLineDict.sort () >=20 > - for Each in BreakLineDict: >=20 > - if Each > 0: >=20 > - Multilines +=3D " %s\n" % String[CurrentStr= ingStart:Each].lstrip() >=20 > - CurrentStringStart =3D Each >=20 > - if StringLength - CurrentStringStart > 0: >=20 > - Multilines +=3D " %s\n" % String[CurrentStringS= tart:].lstrip() >=20 > - return Multilines >=20 > - >=20 > - def CreateField (self, Item, Name, Length, Offset, Struct, BsfName, = Help, > Option): >=20 > + FoundSpaceChar =3D True >=20 > + elif StringOffset =3D=3D StringLength - 1 and Fo= undSpaceChar =3D=3D False: >=20 > + BreakLineDict.append (0) >=20 > + if String[StringOffset - 1] =3D=3D '\\' and String[S= tringOffset] =3D=3D 'n': >=20 > + BreakLineDict.append (StringOffset + 1) >=20 > + NewLineStart =3D StringOffset + 1 >=20 > + NewLineCount =3D 0 >=20 > + StringOffset +=3D 1 >=20 > + NewLineCount +=3D 1 >=20 > + if BreakLineDict !=3D []: >=20 > + BreakLineDict.sort () >=20 > + for Each in BreakLineDict: >=20 > + if Each > 0: >=20 > + Multilines +=3D " %s\n" % String[CurrentStringS= tart:Each].lstrip() >=20 > + CurrentStringStart =3D Each >=20 > + if StringLength - CurrentStringStart > 0: >=20 > + Multilines +=3D " %s\n" % String[CurrentStringStart= :].lstrip() >=20 > + return Multilines >=20 > + >=20 > + def CreateField (self, Item, Name, Length, Offset, Struct, BsfName, = Help, > Option, BitsLength =3D None): >=20 > PosName =3D 28 >=20 > PosComment =3D 30 >=20 > NameLine=3D'' >=20 > HelpLine=3D'' >=20 > OptionLine=3D'' >=20 >=20 >=20 > + if Length =3D=3D 0 and Name =3D=3D 'Dummy': >=20 > + return '\n' >=20 > + >=20 > IsArray =3D False >=20 > if Length in [1,2,4,8]: >=20 > Type =3D "UINT%d" % (Length * 8) >=20 > @@ -992,7 +1192,12 @@ EndList > else: >=20 > OffsetStr =3D '0x%04X' % Offset >=20 >=20 >=20 > - return "\n/** Offset %s%s%s%s**/\n %s%s%s;\n" % (OffsetStr, Nam= eLine, > HelpLine, OptionLine, Type, ' ' * Space1, Name,) >=20 > + if BitsLength is None: >=20 > + BitsLength =3D '' >=20 > + else: >=20 > + BitsLength =3D ' : %d' % BitsLength >=20 > + >=20 > + return "\n/** Offset %s%s%s%s**/\n %s%s%s%s;\n" % (OffsetStr, > NameLine, HelpLine, OptionLine, Type, ' ' * Space1, Name, BitsLength) >=20 >=20 >=20 > def PostProcessBody (self, TextBody): >=20 > NewTextBody =3D [] >=20 > @@ -1097,6 +1302,7 @@ EndList > UpdStructure =3D ['FSPT_UPD', 'FSPM_UPD', 'FSPS_UPD'] >=20 > for Item in self._CfgItemList: >=20 > if Item["cname"] =3D=3D 'Signature' and Item["value"][0:= 6] in UpdSignature: >=20 > + Item["offset"] =3D 0 # re-initialize offset to 0 whe= n new UPD structure > starting >=20 > UpdOffsetTable.append (Item["offset"]) >=20 >=20 >=20 > for UpdIdx in range(len(UpdOffsetTable)): >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/ExpectedFspUpd.h > b/IntelFsp2Pkg/Tools/Tests/ExpectedFspUpd.h > new file mode 100644 > index 0000000000..be2ed8aa99 > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/ExpectedFspUpd.h > @@ -0,0 +1,16 @@ > +#ifndef __FSPUPD_H__ >=20 > +#define __FSPUPD_H__ >=20 > + >=20 > +#include >=20 > + >=20 > +#pragma pack(1) >=20 > + >=20 > +#define FSPT_UPD_SIGNATURE 0x545F4450554D4551 /* > 'QEMUPD_T' */ >=20 > + >=20 > +#define FSPM_UPD_SIGNATURE 0x4D5F4450554D4551 /* > 'QEMUPD_M' */ >=20 > + >=20 > +#define FSPS_UPD_SIGNATURE 0x535F4450554D4551 /* > 'QEMUPD_S' */ >=20 > + >=20 > +#pragma pack() >=20 > + >=20 > +#endif >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h > b/IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h > new file mode 100644 > index 0000000000..83fd06ecb4 > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h > @@ -0,0 +1,75 @@ > +#ifndef __FSPMUPD_H__ >=20 > +#define __FSPMUPD_H__ >=20 > + >=20 > +#include >=20 > + >=20 > +#pragma pack(1) >=20 > + >=20 > + >=20 > +/** Fsp M Configuration >=20 > +**/ >=20 > +typedef struct { >=20 > + >=20 > +/** Offset 0x00C8 - Debug Serial Port Base address >=20 > + Debug serial port base address. This option will be used only when the= 'Serial > Port >=20 > + Debug Device' option is set to 'External Device'. 0x00000000(Default). >=20 > +**/ >=20 > + UINT32 SerialDebugPortAddress; >=20 > + >=20 > +/** Offset 0x00CC - Debug Serial Port Type >=20 > + 16550 compatible debug serial port resource type. NONE means no serial= port > support. >=20 > + 0x02:MMIO(Default). >=20 > + 0:NONE, 1:I/O, 2:MMIO >=20 > +**/ >=20 > + UINT8 SerialDebugPortType; >=20 > + >=20 > +/** Offset 0x00CD - Serial Port Debug Device >=20 > + Select active serial port device for debug. For SOC UART devices,'Debu= g Serial > Port >=20 > + Base' options will be ignored. 0x02:SOC UART2(Default). >=20 > + 0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device >=20 > +**/ >=20 > + UINT8 SerialDebugPortDevice; >=20 > + >=20 > +/** Offset 0x00CE - Debug Serial Port Stride Size >=20 > + Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(De= fault). >=20 > + 0:1, 2:4 >=20 > +**/ >=20 > + UINT8 SerialDebugPortStrideSize; >=20 > + >=20 > +/** Offset 0x00CF >=20 > +**/ >=20 > + UINT8 UnusedUpdSpace2[1]; >=20 > + >=20 > +/** Offset 0x00D0 >=20 > +**/ >=20 > + UINT8 ReservedFspmUpd[4]; >=20 > +} FSP_M_CONFIG; >=20 > + >=20 > +/** Fsp M UPD Configuration >=20 > +**/ >=20 > +typedef struct { >=20 > + >=20 > +/** Offset 0x0000 >=20 > +**/ >=20 > + FSP_UPD_HEADER FspUpdHeader; >=20 > + >=20 > +/** Offset 0x00A8 >=20 > +**/ >=20 > + FSPM_ARCH_UPD FspmArchUpd; >=20 > + >=20 > +/** Offset 0x00C8 >=20 > +**/ >=20 > + FSP_M_CONFIG FspmConfig; >=20 > + >=20 > +/** Offset 0x00D4 >=20 > +**/ >=20 > + UINT8 UnusedUpdSpace3[2]; >=20 > + >=20 > +/** Offset 0x00D6 >=20 > +**/ >=20 > + UINT16 UpdTerminator; >=20 > +} FSPM_UPD; >=20 > + >=20 > +#pragma pack() >=20 > + >=20 > +#endif >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/ExpectedFspsUpd.h > b/IntelFsp2Pkg/Tools/Tests/ExpectedFspsUpd.h > new file mode 100644 > index 0000000000..e2bc54a61d > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/ExpectedFspsUpd.h > @@ -0,0 +1,69 @@ > +#ifndef __FSPSUPD_H__ >=20 > +#define __FSPSUPD_H__ >=20 > + >=20 > +#include >=20 > + >=20 > +#pragma pack(1) >=20 > + >=20 > + >=20 > +/** Fsp S Configuration >=20 > +**/ >=20 > +typedef struct { >=20 > + >=20 > +/** Offset 0x0118 - BMP Logo Data Size >=20 > + BMP logo data buffer size. 0x00000000(Default). >=20 > +**/ >=20 > + UINT32 LogoSize; >=20 > + >=20 > +/** Offset 0x011C - BMP Logo Data Pointer >=20 > + BMP logo data pointer to a BMP format buffer. 0x00000000(Default). >=20 > +**/ >=20 > + UINT32 LogoPtr; >=20 > + >=20 > +/** Offset 0x0120 - Graphics Configuration Data Pointer >=20 > + Graphics configuration data used for initialization. 0x00000000(Defaul= t). >=20 > +**/ >=20 > + UINT32 GraphicsConfigPtr; >=20 > + >=20 > +/** Offset 0x0124 - PCI GFX Temporary MMIO Base >=20 > + PCI Temporary PCI GFX Base used before full PCI enumeration. > 0x80000000(Default). >=20 > +**/ >=20 > + UINT32 PciTempResourceBase; >=20 > + >=20 > +/** Offset 0x0128 >=20 > +**/ >=20 > + UINT8 UnusedUpdSpace1[3]; >=20 > + >=20 > +/** Offset 0x012B >=20 > +**/ >=20 > + UINT8 ReservedFspsUpd; >=20 > +} FSP_S_CONFIG; >=20 > + >=20 > +/** Fsp S UPD Configuration >=20 > +**/ >=20 > +typedef struct { >=20 > + >=20 > +/** Offset 0x0000 >=20 > +**/ >=20 > + FSP_UPD_HEADER FspUpdHeader; >=20 > + >=20 > +/** Offset 0x00F8 >=20 > +**/ >=20 > + FSPS_ARCH_UPD FspsArchUpd; >=20 > + >=20 > +/** Offset 0x0118 >=20 > +**/ >=20 > + FSP_S_CONFIG FspsConfig; >=20 > + >=20 > +/** Offset 0x012C >=20 > +**/ >=20 > + UINT8 UnusedUpdSpace2[2]; >=20 > + >=20 > +/** Offset 0x012E >=20 > +**/ >=20 > + UINT16 UpdTerminator; >=20 > +} FSPS_UPD; >=20 > + >=20 > +#pragma pack() >=20 > + >=20 > +#endif >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/ExpectedFsptUpd.h > b/IntelFsp2Pkg/Tools/Tests/ExpectedFsptUpd.h > new file mode 100644 > index 0000000000..25b8a7d63a > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/ExpectedFsptUpd.h > @@ -0,0 +1,87 @@ > +#ifndef __FSPTUPD_H__ >=20 > +#define __FSPTUPD_H__ >=20 > + >=20 > +#include >=20 > + >=20 > +#pragma pack(1) >=20 > + >=20 > + >=20 > +/** Fsp T Common UPD >=20 > +**/ >=20 > +typedef struct { >=20 > + >=20 > +/** Offset 0x0040 >=20 > +**/ >=20 > + UINT8 Revision; >=20 > + >=20 > +/** Offset 0x0041 >=20 > +**/ >=20 > + UINT8 Reserved[3]; >=20 > + >=20 > +/** Offset 0x0044 >=20 > +**/ >=20 > + UINT32 MicrocodeRegionBase; >=20 > + >=20 > +/** Offset 0x0048 >=20 > +**/ >=20 > + UINT32 MicrocodeRegionLength; >=20 > + >=20 > +/** Offset 0x004C >=20 > +**/ >=20 > + UINT32 CodeRegionBase; >=20 > + >=20 > +/** Offset 0x0050 >=20 > +**/ >=20 > + UINT32 CodeRegionLength; >=20 > + >=20 > +/** Offset 0x0054 >=20 > +**/ >=20 > + UINT8 Reserved1[12]; >=20 > +} FSPT_COMMON_UPD; >=20 > + >=20 > +/** Fsp T Configuration >=20 > +**/ >=20 > +typedef struct { >=20 > + >=20 > +/** Offset 0x0060 - Chicken bytes to test Hex config >=20 > + This option shows how to present option for 4 bytes data >=20 > +**/ >=20 > + UINT32 ChickenBytes; >=20 > + >=20 > +/** Offset 0x0064 >=20 > +**/ >=20 > + UINT8 ReservedFsptUpd1[28]; >=20 > +} FSP_T_CONFIG; >=20 > + >=20 > +/** Fsp T UPD Configuration >=20 > +**/ >=20 > +typedef struct { >=20 > + >=20 > +/** Offset 0x0000 >=20 > +**/ >=20 > + FSP_UPD_HEADER FspUpdHeader; >=20 > + >=20 > +/** Offset 0x0020 >=20 > +**/ >=20 > + FSPT_ARCH_UPD FsptArchUpd; >=20 > + >=20 > +/** Offset 0x0040 >=20 > +**/ >=20 > + FSPT_COMMON_UPD FsptCommonUpd; >=20 > + >=20 > +/** Offset 0x0060 >=20 > +**/ >=20 > + FSP_T_CONFIG FsptConfig; >=20 > + >=20 > +/** Offset 0x0080 >=20 > +**/ >=20 > + UINT8 UnusedUpdSpace0[6]; >=20 > + >=20 > +/** Offset 0x0086 >=20 > +**/ >=20 > + UINT16 UpdTerminator; >=20 > +} FSPT_UPD; >=20 > + >=20 > +#pragma pack() >=20 > + >=20 > +#endif >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/ExpectedOutput.bsf > b/IntelFsp2Pkg/Tools/Tests/ExpectedOutput.bsf > new file mode 100644 > index 0000000000..750e1b4faf > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/ExpectedOutput.bsf > @@ -0,0 +1,88 @@ > +GlobalDataDef >=20 > + SKUID =3D 0, "DEFAULT" >=20 > +EndGlobalData >=20 > + >=20 > + >=20 > +StructDef >=20 > + >=20 > + Find "QEMUPD_T" >=20 > + $gQemuFspPkgTokenSpaceGuid_Revision 1= bytes > $_DEFAULT_ =3D 0x01 >=20 > + Skip 87 bytes >=20 > + $gQemuFspPkgTokenSpaceGuid_ChickenBytes 4= bytes > $_DEFAULT_ =3D 0x00000000 >=20 > + >=20 > + Find "QEMUPD_M" >=20 > + $gQemuFspPkgTokenSpaceGuid_Revision 1= bytes > $_DEFAULT_ =3D 0x01 >=20 > + Skip 35 bytes >=20 > + $gQemuFspPkgTokenSpaceGuid_StackBase 4= bytes > $_DEFAULT_ =3D 0x00070000 >=20 > + $gQemuFspPkgTokenSpaceGuid_StackSize 4= bytes > $_DEFAULT_ =3D 0x00010000 >=20 > + $gQemuFspPkgTokenSpaceGuid_BootLoaderTolumSize 4= bytes > $_DEFAULT_ =3D 0x00000000 >=20 > + $gPlatformFspPkgTokenSpaceGuid_Bootmode 4= bytes > $_DEFAULT_ =3D 0x00000000 >=20 > + Skip 8 bytes >=20 > + $gQemuFspPkgTokenSpaceGuid_SerialDebugPortAddress 4= bytes > $_DEFAULT_ =3D 0x00000000 >=20 > + $gQemuFspPkgTokenSpaceGuid_SerialDebugPortType 1= bytes > $_DEFAULT_ =3D 0x02 >=20 > + $gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice 1= bytes > $_DEFAULT_ =3D 0x02 >=20 > + $gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize 1= bytes > $_DEFAULT_ =3D 0x02 >=20 > + >=20 > + Find "QEMUPD_S" >=20 > + $gQemuFspPkgTokenSpaceGuid_Revision 1= bytes > $_DEFAULT_ =3D 0x01 >=20 > + Skip 55 bytes >=20 > + $gQemuFspPkgTokenSpaceGuid_LogoSize 4= bytes > $_DEFAULT_ =3D 0x00000000 >=20 > + $gQemuFspPkgTokenSpaceGuid_LogoPtr 4= bytes > $_DEFAULT_ =3D 0x00000000 >=20 > + $gQemuFspPkgTokenSpaceGuid_GraphicsConfigPtr 4= bytes > $_DEFAULT_ =3D 0x00000000 >=20 > + $gQemuFspPkgTokenSpaceGuid_PciTempResourceBase 4= bytes > $_DEFAULT_ =3D 0x80000000 >=20 > + >=20 > +EndStruct >=20 > + >=20 > + >=20 > +List &EN_DIS >=20 > + Selection 0x1 , "Enabled" >=20 > + Selection 0x0 , "Disabled" >=20 > +EndList >=20 > + >=20 > +List &gQemuFspPkgTokenSpaceGuid_SerialDebugPortType >=20 > + Selection 0 , "NONE" >=20 > + Selection 1 , "I/O" >=20 > + Selection 2 , "MMIO" >=20 > +EndList >=20 > + >=20 > +List &gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice >=20 > + Selection 0 , "SOC UART0" >=20 > + Selection 1 , "SOC UART1" >=20 > + Selection 2 , "SOC UART2" >=20 > + Selection 3 , "External Device" >=20 > +EndList >=20 > + >=20 > +List &gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize >=20 > + Selection 0 , "1" >=20 > + Selection 2 , "4" >=20 > +EndList >=20 > + >=20 > +BeginInfoBlock >=20 > + PPVer "0.1" >=20 > + Description "QEMU Platform" >=20 > +EndInfoBlock >=20 > + >=20 > +Page "FSP T" >=20 > + EditNum $gQemuFspPkgTokenSpaceGuid_ChickenBytes, "Chicken bytes to > test Hex config", HEX, >=20 > + Help "This option shows how to present option for 4 bytes data" >=20 > + "Valid range: 0x00000000 ~ 0xFFFFFFFF" >=20 > +EndPage >=20 > + >=20 > +Page "FSP MemoryInit Settings" >=20 > + EditNum $gQemuFspPkgTokenSpaceGuid_SerialDebugPortAddress, "Debug > Serial Port Base address", HEX, >=20 > + Help "Debug serial port base address. This option will be used o= nly when > the 'Serial Port Debug Device' option is set to 'External Device'. > 0x00000000(Default)." >=20 > + "Valid range: 0x00000000 ~ 0xFFFFFFFF" >=20 > + Combo $gQemuFspPkgTokenSpaceGuid_SerialDebugPortType, "Debug Serial > Port Type", &gQemuFspPkgTokenSpaceGuid_SerialDebugPortType, >=20 > + Help "16550 compatible debug serial port resource type. NONE mea= ns no > serial port support. 0x02:MMIO(Default)." >=20 > + Combo $gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice, "Serial Port > Debug Device", &gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice, >=20 > + Help "Select active serial port device for debug. For SOC UART > devices,'Debug Serial Port Base' options will be ignored. 0x02:SOC > UART2(Default)." >=20 > + Combo $gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize, "Debug > Serial Port Stride Size", > &gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize, >=20 > + Help "Debug serial port register map stride size in bytes. 0x00:= 1, > 0x02:4(Default)." >=20 > +EndPage >=20 > + >=20 > +Page "FSP SiliconInit Settings" >=20 > + EditNum $gQemuFspPkgTokenSpaceGuid_PciTempResourceBase, "PCI GFX > Temporary MMIO Base", HEX, >=20 > + Help "PCI Temporary PCI GFX Base used before full PCI enumeratio= n. > 0x80000000(Default)." >=20 > + "Valid range: 0x80000000 ~ 0xDFFFFFFF" >=20 > +EndPage >=20 > + >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/ExpectedOutput.yaml > b/IntelFsp2Pkg/Tools/Tests/ExpectedOutput.yaml > new file mode 100644 > index 0000000000..3594b9895e > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/ExpectedOutput.yaml > @@ -0,0 +1,270 @@ > +variable: >=20 > + PLATFORM_NAME : QemuFspPkg >=20 > + PLATFORM_GUID : 1BEDB57A-7904-406e-8486-C89FC7FB39EE >=20 > + PLATFORM_VERSION : 0.1 >=20 > + DSC_SPECIFICATION : 0x00010005 >=20 > + OUTPUT_DIRECTORY : Build/QemuFspPkg >=20 > + SUPPORTED_ARCHITECTURES : IA32|X64 >=20 > + BUILD_TARGETS : DEBUG|RELEASE >=20 > + SKUID_IDENTIFIER : DEFAULT >=20 > + FLASH_DEFINITION : QemuFspPkg/QemuFspPkg.fdf >=20 > + FSP_T_UPD_TOOL_GUID : 34686CA3-34F9-4901-B82A-BA630F0714C6 >=20 > + FSP_V_UPD_TOOL_GUID : 4E2F4725-734A-4399-BAF5-B4E16348EB2F >=20 > + FSP_M_UPD_TOOL_GUID : 39A250DB-E465-4DD1-A2AC- > E2BD3C0E2385 >=20 > + FSP_S_UPD_TOOL_GUID : CAE3605B-5B34-4C85-B3D7-27D54273C40F >=20 > + FSP_T_UPD_FFS_GUID : 70BCF6A5-FFB1-47D8-B1AE-EFE5508E23EA >=20 > + FSP_V_UPD_FFS_GUID : 0197EF5E-2FFC-4089-8E55-F70400B18146 >=20 > + FSP_M_UPD_FFS_GUID : D5B86AEA-6AF7-40D4-8014-982301BC3D89 >=20 > + FSP_S_UPD_FFS_GUID : E3CD9B18-998C-4F76-B65E-98B154E5446F >=20 > + FSP_PACKAGE : QemuFspPkg >=20 > + FSP_IMAGE_ID : 0x245053464D455124 # $QEMFSP$ >=20 > + FSP_IMAGE_REV : 0x00001010 >=20 > + CAR_BASE_ADDRESS : 0x00000000 >=20 > + CAR_REGION_SIZE : 0x00080000 >=20 > + CAR_BLD_REGION_SIZE : 0x00070000 >=20 > + CAR_FSP_REGION_SIZE : 0x00010000 >=20 > + FSP_ARCH : X64 >=20 > + >=20 > + >=20 > +template: >=20 > + >=20 > + >=20 > +configs: >=20 > + - $ACTION : >=20 > + page : TMP::"FSP T", MEM::"FSP MemoryInit Settings", SIL::= "FSP > SiliconInit Settings" >=20 > + - $ACTION : >=20 > + find : QEMUPD_T >=20 > + - FSPT_UPD : >=20 > + - FSP_UPD_HEADER : >=20 > + - Signature : >=20 > + length : 0x08 >=20 > + value : 0x545F4450554D4551 >=20 > + - Revision : >=20 > + name : FsptUpdRevision >=20 > + length : 0x01 >=20 > + value : 0x01 >=20 > + - Reserved : >=20 > + length : 0x17 >=20 > + value : {0x00} >=20 > + - FSPT_ARCH_UPD : >=20 > + - Revision : >=20 > + length : 0x01 >=20 > + value : 0x01 >=20 > + - Reserved : >=20 > + length : 0x03 >=20 > + value : {0x00} >=20 > + - Length : >=20 > + length : 0x04 >=20 > + value : 0x00000020 >=20 > + - FspDebugHandler : >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - Reserved1 : >=20 > + length : 0x14 >=20 > + value : {0x00} >=20 > + - FSPT_COMMON_UPD : >=20 > + - Revision : >=20 > + length : 0x01 >=20 > + value : 0x01 >=20 > + - Reserved : >=20 > + length : 0x03 >=20 > + value : {0x00} >=20 > + - MicrocodeRegionBase : >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - MicrocodeRegionLength : >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - CodeRegionBase : >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - CodeRegionLength : >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - Reserved1 : >=20 > + length : 0x0C >=20 > + value : {0x00} >=20 > + - FSP_T_CONFIG : >=20 > + - $ACTION : >=20 > + page : TMP >=20 > + - ChickenBytes : >=20 > + name : Chicken bytes to test Hex config >=20 > + type : EditNum, HEX, (0x00000000,0xFFFFFFFF) >=20 > + help : > >=20 > + This option shows how to present option for 4 b= ytes data >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - ReservedFsptUpd1 : >=20 > + length : 0x1C >=20 > + value : {0x00} >=20 > + - UpdTerminator : >=20 > + length : 0x02 >=20 > + value : 0x55AA >=20 > + - $ACTION : >=20 > + find : QEMUPD_M >=20 > + >=20 > + - FSPM_UPD : >=20 > + - FSP_UPD_HEADER : >=20 > + - Signature : >=20 > + length : 0x08 >=20 > + value : 0x4D5F4450554D4551 >=20 > + - Revision : >=20 > + name : FspmUpdRevision >=20 > + length : 0x01 >=20 > + value : 0x01 >=20 > + - Reserved : >=20 > + length : 0x17 >=20 > + value : {0x00} >=20 > + - FSPM_ARCH_UPD : >=20 > + - Revision : >=20 > + length : 0x01 >=20 > + value : 0x01 >=20 > + - Reserved : >=20 > + length : 0x03 >=20 > + value : {0x00} >=20 > + - NvsBufferPtr : >=20 > + struct : VOID* >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - StackBase : >=20 > + struct : VOID* >=20 > + name : StackBase >=20 > + help : > >=20 > + Stack base for FSP use. Default- 0xFEF16000 >=20 > + length : 0x04 >=20 > + value : $(CAR_BLD_REGION_SIZE) >=20 > + - StackSize : >=20 > + name : StackSize >=20 > + help : > >=20 > + To pass the stack size for FSP use. Bootloader = can > programmatically get the FSP requested StackSize by using the defaults in= the > FSP-M component. This is the minimum stack size expected by this revision= of > FSP. Default- 0x2A000 >=20 > + length : 0x04 >=20 > + value : $(CAR_FSP_REGION_SIZE) >=20 > + - BootLoaderTolumSize : >=20 > + name : BootLoaderTolumSize >=20 > + help : > >=20 > + To pass Bootloader Tolum size. >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - Bootmode : >=20 > + name : Bootmode >=20 > + help : > >=20 > + To maintain Bootmode details. >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - Reserved1 : >=20 > + length : 0x08 >=20 > + value : {0x00} >=20 > + - FSP_M_CONFIG : >=20 > + - $ACTION : >=20 > + page : MEM >=20 > + - SerialDebugPortAddress : >=20 > + name : Debug Serial Port Base address >=20 > + type : EditNum, HEX, (0x00000000,0xFFFFFFFF) >=20 > + help : > >=20 > + Debug serial port base address. This option wil= l be used only > when the 'Serial Port Debug Device' >=20 > + option is set to 'External Device'. 0x00000000(= Default). >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - SerialDebugPortType : >=20 > + name : Debug Serial Port Type >=20 > + type : Combo >=20 > + option : 0:NONE, 1:I/O, 2:MMIO >=20 > + help : > >=20 > + 16550 compatible debug serial port resource typ= e. NONE means > no serial port support. 0x02:MMIO(Default). >=20 > + length : 0x01 >=20 > + value : 0x02 >=20 > + - SerialDebugPortDevice : >=20 > + name : Serial Port Debug Device >=20 > + type : Combo >=20 > + option : 0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:Extern= al Device >=20 > + help : > >=20 > + Select active serial port device for debug. >=20 > + For SOC UART devices,'Debug Serial Port Base' o= ptions will be > ignored. 0x02:SOC UART2(Default). >=20 > + length : 0x01 >=20 > + value : 0x02 >=20 > + - SerialDebugPortStrideSize : >=20 > + name : Debug Serial Port Stride Size >=20 > + type : Combo >=20 > + option : 0:1, 2:4 >=20 > + help : > >=20 > + Debug serial port register map stride size in b= ytes. 0x00:1, > 0x02:4(Default). >=20 > + length : 0x01 >=20 > + value : 0x02 >=20 > + - ReservedFspmUpd : >=20 > + length : 0x04 >=20 > + value : {0x00} >=20 > + - UpdTerminator : >=20 > + length : 0x02 >=20 > + value : 0x55AA >=20 > + - $ACTION : >=20 > + find : QEMUPD_S >=20 > + >=20 > + - FSPS_UPD : >=20 > + - FSP_UPD_HEADER : >=20 > + - Signature : >=20 > + length : 0x08 >=20 > + value : 0x535F4450554D4551 >=20 > + - Revision : >=20 > + name : FspsUpdRevision >=20 > + length : 0x01 >=20 > + value : 0x01 >=20 > + - Reserved : >=20 > + length : 0x17 >=20 > + value : {0x00} >=20 > + - FSPS_ARCH_UPD : >=20 > + - Revision : >=20 > + length : 0x01 >=20 > + value : 0x01 >=20 > + - Reserved : >=20 > + length : 0x03 >=20 > + value : {0x00} >=20 > + - Length : >=20 > + length : 0x04 >=20 > + value : 0x00000020 >=20 > + - FspEventHandler : >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - EnableMultiPhaseSiliconInit : >=20 > + length : 0x01 >=20 > + value : 0x00 >=20 > + - Reserved1 : >=20 > + length : 0x13 >=20 > + value : {0x00} >=20 > + - FSP_S_CONFIG : >=20 > + - $ACTION : >=20 > + page : SIL >=20 > + - LogoSize : >=20 > + name : BMP Logo Data Size >=20 > + type : Reserved >=20 > + help : > >=20 > + BMP logo data buffer size. 0x00000000(Default). >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - LogoPtr : >=20 > + name : BMP Logo Data Pointer >=20 > + type : Reserved >=20 > + help : > >=20 > + BMP logo data pointer to a BMP format buffer. > 0x00000000(Default). >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - GraphicsConfigPtr : >=20 > + name : Graphics Configuration Data Pointer >=20 > + type : Reserved >=20 > + help : > >=20 > + Graphics configuration data used for initializa= tion. > 0x00000000(Default). >=20 > + length : 0x04 >=20 > + value : 0x00000000 >=20 > + - PciTempResourceBase : >=20 > + name : PCI GFX Temporary MMIO Base >=20 > + type : EditNum, HEX, (0x80000000,0xDFFFFFFF) >=20 > + help : > >=20 > + PCI Temporary PCI GFX Base used before full PCI= enumeration. > 0x80000000(Default). >=20 > + length : 0x04 >=20 > + value : 0x80000000 >=20 > + - ReservedFspsUpd : >=20 > + length : 0x01 >=20 > + value : 0x00 >=20 > + - UpdTerminator : >=20 > + length : 0x02 >=20 > + value : 0x55AA >=20 > + >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc > b/IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc > new file mode 100644 > index 0000000000..af0bd4e717 > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc > @@ -0,0 +1,469 @@ > +## @file >=20 > +# FSP DSC build file for QEMU platform >=20 > +# >=20 > +# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
>=20 > +# >=20 > +# This program and the accompanying materials >=20 > +# are licensed and made available under the terms and conditions of t= he BSD > License >=20 > +# which accompanies this distribution. The full text of the license m= ay be > found at >=20 > +# http://opensource.org/licenses/bsd-license.php >=20 > +# >=20 > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, >=20 > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. >=20 > +# >=20 > +## >=20 > + >=20 > +################################################################ > ################ >=20 > +# >=20 > +# Defines Section - statements that will be processed to create a Makefi= le. >=20 > +# >=20 > +################################################################ > ################ >=20 > +[Defines] >=20 > + PLATFORM_NAME =3D QemuFspPkg >=20 > + PLATFORM_GUID =3D 1BEDB57A-7904-406e-8486-C89FC7FB39E= E >=20 > + PLATFORM_VERSION =3D 0.1 >=20 > + DSC_SPECIFICATION =3D 0x00010005 >=20 > + OUTPUT_DIRECTORY =3D Build/QemuFspPkg >=20 > + SUPPORTED_ARCHITECTURES =3D IA32|X64 >=20 > + BUILD_TARGETS =3D DEBUG|RELEASE >=20 > + SKUID_IDENTIFIER =3D DEFAULT >=20 > + FLASH_DEFINITION =3D QemuFspPkg/QemuFspPkg.fdf >=20 > + >=20 > + # >=20 > + # UPD tool definition >=20 > + # >=20 > + FSP_T_UPD_TOOL_GUID =3D 34686CA3-34F9-4901-B82A-BA630F0714C= 6 >=20 > + FSP_V_UPD_TOOL_GUID =3D 4E2F4725-734A-4399-BAF5-B4E16348EB2= F >=20 > + FSP_M_UPD_TOOL_GUID =3D 39A250DB-E465-4DD1-A2AC- > E2BD3C0E2385 >=20 > + FSP_S_UPD_TOOL_GUID =3D CAE3605B-5B34-4C85-B3D7-27D54273C40= F >=20 > + FSP_T_UPD_FFS_GUID =3D 70BCF6A5-FFB1-47D8-B1AE-EFE5508E23E= A >=20 > + FSP_V_UPD_FFS_GUID =3D 0197EF5E-2FFC-4089-8E55-F70400B1814= 6 >=20 > + FSP_M_UPD_FFS_GUID =3D D5B86AEA-6AF7-40D4-8014-982301BC3D8= 9 >=20 > + FSP_S_UPD_FFS_GUID =3D E3CD9B18-998C-4F76-B65E-98B154E5446= F >=20 > + >=20 > + # >=20 > + # Set platform specific package/folder name, same as passed from PREBU= ILD > script. >=20 > + # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as > package build folder >=20 > + # DEFINE only takes effect at R9 DSC and FDF. >=20 > + # >=20 > + DEFINE FSP_PACKAGE =3D QemuFspPkg >=20 > + DEFINE FSP_IMAGE_ID =3D 0x245053464D455124 # $QEMF= SP$ >=20 > + DEFINE FSP_IMAGE_REV =3D 0x00001010 >=20 > + >=20 > + DEFINE CAR_BASE_ADDRESS =3D 0x00000000 >=20 > + DEFINE CAR_REGION_SIZE =3D 0x00080000 >=20 > + DEFINE CAR_BLD_REGION_SIZE =3D 0x00070000 >=20 > + DEFINE CAR_FSP_REGION_SIZE =3D 0x00010000 >=20 > + >=20 > + DEFINE FSP_ARCH =3D X64 >=20 > + >=20 > +################################################################ > ################ >=20 > +# >=20 > +# SKU Identification section - list of all SKU IDs supported by this >=20 > +# Platform. >=20 > +# >=20 > +################################################################ > ################ >=20 > +[SkuIds] >=20 > + 0|DEFAULT # The entry: 0|DEFAULT is reserved and always r= equired. >=20 > + >=20 > +################################################################ > ################ >=20 > +# >=20 > +# Library Class section - list of all Library Classes needed by this Pla= tform. >=20 > +# >=20 > +################################################################ > ################ >=20 > + >=20 > +[LibraryClasses] >=20 > + PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.i= nf >=20 > + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf >=20 > + > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDe > bugPrintErrorLevelLib.inf >=20 > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf >=20 > + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf >=20 > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf >=20 > + PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf >=20 > + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf >=20 > + > BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr > .inf >=20 > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf >=20 > + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf >=20 > + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf >=20 > + > PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/P= eiSe > rvicesTablePointerLibIdt.inf >=20 > + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf >=20 > + > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllo > cationLib.inf >=20 > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeC > offGetEntryPointLib.inf >=20 > + > ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiRepo > rtStatusCodeLib.inf >=20 > + > CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCache > MaintenanceLib.inf >=20 > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf >=20 > + > PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCo > ffExtraActionLibNull.inf >=20 > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecomp > ressLib.inf >=20 > + > SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizat= i > onLib.inf >=20 > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf >=20 > + > ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtr= ac > tGuidedSectionLib.inf >=20 > + CacheLib|IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf >=20 > + > CacheAsRamLib|IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRa > mLibNull.inf >=20 > + > FspSwitchStackLib|IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitc= hS > tackLib.inf >=20 > + > FspCommonLib|IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.i > nf >=20 > + > FspPlatformLib|IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib= .in > f >=20 > + > PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatfo > rmHookLibNull.inf >=20 > + > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLib > Null.inf >=20 > + > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/ > OemHookStatusCodeLibNull.inf >=20 > + UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf >=20 > +!if $(TARGET) =3D=3D DEBUG >=20 > + > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf >=20 > + > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortL= ib > 16550.inf >=20 > +!else >=20 > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf >=20 > + SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNu= ll.inf >=20 > +!endif >=20 > + >=20 > + >=20 > +################################################################ > ################ >=20 > +# >=20 > +# Pcd Section - list of all EDK II PCD Entries defined by this Platform >=20 > +# >=20 > +################################################################ > ################ >=20 > +[PcdsFixedAtBuild] >=20 > + gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot | TRUE >=20 > + gQemuFspPkgTokenSpaceGuid.PcdFspHeaderRevision | 0x03 >=20 > + gQemuFspPkgTokenSpaceGuid.PcdFspImageIdString | $(FSP_IMAGE_= ID) >=20 > + gQemuFspPkgTokenSpaceGuid.PcdFspImageRevision | > $(FSP_IMAGE_REV) >=20 > + # >=20 > + # FSP CAR Usages (BL RAM | FSP RAM | FSP CODE) >=20 > + # >=20 > + gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase | > $(CAR_BASE_ADDRESS) >=20 > + gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize | > $(CAR_REGION_SIZE) >=20 > + gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | > $(CAR_FSP_REGION_SIZE) >=20 > + gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize | 0x0100 >=20 > + >=20 > + # This defines how much space will be used for heap in FSP temporary > memory >=20 > + # x % of FSP temporary memory will be used for heap >=20 > + # (100 - x) % of FSP temporary memory will be used for stack >=20 > + gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage | 65 >=20 > + >=20 > + # This is a platform specific global pointer used by FSP >=20 > + gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress | 0xFED00148 >=20 > + gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength | 0x00100000 >=20 > + >=20 > +!if $(TARGET) =3D=3D RELEASE >=20 > + gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel | 0x00000000 >=20 > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask | 0 >=20 > +!else >=20 > + gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel | 0x80000047 >=20 > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask | 0x27 >=20 > +!endif >=20 > + >=20 > +[PcdsPatchableInModule] >=20 > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress | 0xE0000000 >=20 > + # >=20 > + # This entry will be patched during the build process >=20 > + # >=20 > + gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress | 0x12345678 >=20 > + >=20 > +!if $(TARGET) =3D=3D RELEASE >=20 > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel | 0 >=20 > +!else >=20 > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel | 0x80000047 >=20 > +!endif >=20 > + >=20 > +[PcdsDynamicVpd.Upd] >=20 > + # >=20 > + # This section is not used by the normal build process >=20 > + # However, FSP will use dedicated tool to handle it and generate a >=20 > + # VPD similar binary block (User Configuration Data). This block will >=20 > + # be accessed through a generated data structure directly rather than >=20 > + # PCD services. This is for size consideration. >=20 > + # Format: >=20 > + # gQemuFspPkgTokenSpaceGuid.Updxxxxxxxxxxxxn | OFFSET | LENGTH = | > VALUE >=20 > + # Only simple data type is supported >=20 > + # >=20 > + >=20 > + # >=20 > + # Comments with !BSF will be used to generate BSF file >=20 > + # Comments with !HDR will be used to generate H header file >=20 > + # >=20 > + >=20 > + # Global definitions in BSF >=20 > + # !BSF PAGES:{TMP:"FSP T", MEM:"FSP MemoryInit Settings", SIL:"FSP > SiliconInit Settings"} >=20 > + # !BSF BLOCK:{NAME:"QEMU Platform", VER:"0.1"} >=20 > + >=20 > + # !BSF FIND:{QEMUPD_T} >=20 > + # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header} >=20 > + # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START} >=20 > + # FsptUpdSignature: {QEMUPD_T} >=20 > + gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | > 0x545F4450554D4551 >=20 > + # !BSF NAME:{FsptUpdRevision} >=20 > + gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x0= 1 >=20 > + # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END} >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x= 00} >=20 > + >=20 > + # !HDR COMMENT:{FSPT_ARCH_UPD:FSPT_ARCH_UPD} >=20 > + # !HDR EMBED:{FSPT_ARCH_UPD:FsptArchUpd:START} >=20 > + gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x0= 1 >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x= 00} >=20 > + gQemuFspPkgTokenSpaceGuid.Length | * | 0x04 | 0x0= 0000020 >=20 > + gQemuFspPkgTokenSpaceGuid.FspDebugHandler | * | 0x04 | > 0x00000000 >=20 > + # !HDR EMBED:{FSPT_ARCH_UPD:FsptArchUpd:END} >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x14 | {0x= 00} >=20 > + >=20 > + # !HDR COMMENT:{FSPT_COMMON_UPD:Fsp T Common UPD} >=20 > + # !HDR EMBED:{FSPT_COMMON_UPD:FsptCommonUpd:START} >=20 > + gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x0= 1 >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x= 00} >=20 > + >=20 > + # Base address of the microcode region. >=20 > + gQemuFspPkgTokenSpaceGuid.MicrocodeRegionBase | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # Length of the microcode region. >=20 > + gQemuFspPkgTokenSpaceGuid.MicrocodeRegionLength | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # Base address of the cacheable flash region. >=20 > + gQemuFspPkgTokenSpaceGuid.CodeRegionBase | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # Length of the cacheable flash region. >=20 > + gQemuFspPkgTokenSpaceGuid.CodeRegionLength | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # !HDR EMBED:{FSPT_COMMON_UPD:FsptCommonUpd:END} >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x0C | {0x= 00} >=20 > + >=20 > + # !HDR COMMENT:{FSP_T_CONFIG:Fsp T Configuration} >=20 > + # !HDR EMBED:{FSP_T_CONFIG:FsptConfig:START} >=20 > + # !BSF PAGE:{TMP} >=20 > + # !BSF NAME:{Chicken bytes to test Hex config} >=20 > + # !BSF TYPE:{EditNum, HEX, (0x00000000,0xFFFFFFFF)} >=20 > + # !BSF HELP:{This option shows how to present option for 4 bytes data} >=20 > + gQemuFspPkgTokenSpaceGuid.ChickenBytes | * | 0x04 | 0x0= 0000000 >=20 > + >=20 > + # !HDR EMBED:{FSP_T_CONFIG:FsptConfig:END} >=20 > + gQemuFspPkgTokenSpaceGuid.ReservedFsptUpd1 | * | 0x1C | {0x= 00} >=20 > + >=20 > + # Note please keep "UpdTerminator" at the end of each UPD region. >=20 > + # The tool will use this field to determine the actual end of the UPD = data >=20 > + # structure. >=20 > + gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x5= 5AA >=20 > + >=20 > + > ################################################################# > ############### >=20 > + # >=20 > + # UPDs consumed in FspMemoryInit Api >=20 > + # >=20 > + > ################################################################# > ############### >=20 > + # !BSF FIND:{QEMUPD_M} >=20 > + # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header} >=20 > + # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START} >=20 > + # FspmUpdSignature: {QEMUPD_M} >=20 > + gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | > 0x4D5F4450554D4551 >=20 > + # !BSF NAME:{FspmUpdRevision} >=20 > + gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x0= 1 >=20 > + # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END} >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x= 00} >=20 > + >=20 > + # !HDR COMMENT:{FSPM_ARCH_UPD:Fsp M Architectural UPD} >=20 > + # !HDR EMBED:{FSPM_ARCH_UPD:FspmArchUpd:START} >=20 > + >=20 > + gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x0= 1 >=20 > + >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x= 00} >=20 > + >=20 > + # !HDR STRUCT:{VOID*} >=20 > + gQemuFspPkgTokenSpaceGuid.NvsBufferPtr | * | 0x04 | 0x0= 0000000 >=20 > + >=20 > + # !HDR STRUCT:{VOID*} >=20 > + # !BSF NAME:{StackBase} >=20 > + # !BSF HELP:{Stack base for FSP use. Default: 0xFEF16000} >=20 > + gQemuFspPkgTokenSpaceGuid.StackBase | * | 0x04 | > $(CAR_BLD_REGION_SIZE) >=20 > + >=20 > + # !BSF NAME:{StackSize} >=20 > + # !BSF HELP:{To pass the stack size for FSP use. Bootloader can > programmatically get the FSP requested StackSize by using the defaults in= the > FSP-M component. This is the minimum stack size expected by this revision= of > FSP. Default: 0x2A000} >=20 > + gQemuFspPkgTokenSpaceGuid.StackSize | * | 0x04 | > $(CAR_FSP_REGION_SIZE) >=20 > + >=20 > + # !BSF NAME:{BootLoaderTolumSize} >=20 > + # !BSF HELP:{To pass Bootloader Tolum size.} >=20 > + gQemuFspPkgTokenSpaceGuid.BootLoaderTolumSize | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # !BSF NAME:{Bootmode} >=20 > + # !BSF HELP:{To maintain Bootmode details.} >=20 > + gPlatformFspPkgTokenSpaceGuid.Bootmode | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # !HDR EMBED:{FSPM_ARCH_UPD:FspmArchUpd:END} >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x08 | {0x= 00} >=20 > + >=20 > + # !HDR COMMENT:{FSP_M_CONFIG:Fsp M Configuration} >=20 > + # !HDR EMBED:{FSP_M_CONFIG:FspmConfig:START} >=20 > + # !BSF PAGE:{MEM} >=20 > + # !BSF NAME:{Debug Serial Port Base address} >=20 > + # !BSF TYPE:{EditNum, HEX, (0x00000000,0xFFFFFFFF)} >=20 > + # !BSF HELP:{Debug serial port base address. This option will be used = only > when the 'Serial Port Debug Device'} >=20 > + # !BSF HELP:{+ option is set to 'External Device'. 0x00000000(Default)= .} >=20 > + gQemuFspPkgTokenSpaceGuid.SerialDebugPortAddress | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # !BSF NAME:{Debug Serial Port Type} TYPE:{Combo} >=20 > + # !BSF OPTION:{0:NONE, 1:I/O, 2:MMIO} >=20 > + # !BSF HELP:{16550 compatible debug serial port resource type. NONE me= ans > no serial port support. 0x02:MMIO(Default).} >=20 > + gQemuFspPkgTokenSpaceGuid.SerialDebugPortType | * | 0x01 | 0x0= 2 >=20 > + >=20 > + # !BSF NAME:{Serial Port Debug Device} TYPE:{Combo} >=20 > + # !BSF OPTION:{0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Devic= e} >=20 > + # !BSF HELP:{Select active serial port device for debug. } >=20 > + # !BSF HELP:{+For SOC UART devices,'Debug Serial Port Base' options wi= ll be > ignored. 0x02:SOC UART2(Default).} >=20 > + gQemuFspPkgTokenSpaceGuid.SerialDebugPortDevice | * | 0x01 | 0x0= 2 >=20 > + >=20 > + # !BSF NAME:{Debug Serial Port Stride Size} TYPE:{Combo} >=20 > + # !BSF OPTION:{0:1, 2:4} >=20 > + # !BSF HELP:{Debug serial port register map stride size in bytes. 0x00= :1, > 0x02:4(Default).} >=20 > + gQemuFspPkgTokenSpaceGuid.SerialDebugPortStrideSize | * | 0x01 | 0x0= 2 >=20 > + >=20 > + >=20 > + # !HDR EMBED:{FSP_M_CONFIG:FspmConfig:END} >=20 > + gQemuFspPkgTokenSpaceGuid.ReservedFspmUpd | * | 0x04 | {0x= 00} >=20 > + >=20 > + >=20 > + # Note please keep "UpdTerminator" at the end of each UPD region. >=20 > + # The tool will use this field to determine the actual end of the UPD = data >=20 > + # structure. >=20 > + gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x5= 5AA >=20 > + >=20 > + > ################################################################# > ############### >=20 > + # >=20 > + # UPDs consumed in FspSiliconInit Api >=20 > + # >=20 > + > ################################################################# > ############### >=20 > + # !BSF FIND:{QEMUPD_S} >=20 > + # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header} >=20 > + # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START} >=20 > + # FspsUpdSignature: {QEMUPD_S} >=20 > + gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | > 0x535F4450554D4551 >=20 > + # !BSF NAME:{FspsUpdRevision} >=20 > + gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x0= 1 >=20 > + # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END} >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x= 00} >=20 > + >=20 > + # !HDR COMMENT:{FSPS_ARCH_UPD:FSPS_ARCH_UPD} >=20 > + # !HDR EMBED:{FSPS_ARCH_UPD:FspsArchUpd:START} >=20 > + gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x0= 1 >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x= 00} >=20 > + gQemuFspPkgTokenSpaceGuid.Length | * | 0x04 | 0x0= 0000020 >=20 > + gQemuFspPkgTokenSpaceGuid.FspEventHandler | * | 0x04 | > 0x00000000 >=20 > + gQemuFspPkgTokenSpaceGuid.EnableMultiPhaseSiliconInit | * | 0x01 | 0x0= 0 >=20 > + # !HDR EMBED:{FSPS_ARCH_UPD:FspsArchUpd:END} >=20 > + gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x13 | {0x= 00} >=20 > + >=20 > + # !HDR COMMENT:{FSP_S_CONFIG:Fsp S Configuration} >=20 > + # !HDR EMBED:{FSP_S_CONFIG:FspsConfig:START} >=20 > + # !BSF PAGE:{SIL} >=20 > + >=20 > + # !BSF NAME:{BMP Logo Data Size} >=20 > + # !BSF TYPE:{Reserved} >=20 > + # !BSF HELP:{BMP logo data buffer size. 0x00000000(Default).} >=20 > + gQemuFspPkgTokenSpaceGuid.LogoSize | * | 0x04 | 0x0= 0000000 >=20 > + >=20 > + # !BSF NAME:{BMP Logo Data Pointer} >=20 > + # !BSF TYPE:{Reserved} >=20 > + # !BSF HELP:{BMP logo data pointer to a BMP format buffer. > 0x00000000(Default).} >=20 > + gQemuFspPkgTokenSpaceGuid.LogoPtr | * | 0x04 | 0x0= 0000000 >=20 > + >=20 > + # !BSF NAME:{Graphics Configuration Data Pointer} >=20 > + # !BSF TYPE:{Reserved} >=20 > + # !BSF HELP:{Graphics configuration data used for initialization. > 0x00000000(Default).} >=20 > + gQemuFspPkgTokenSpaceGuid.GraphicsConfigPtr | * | 0x04 | > 0x00000000 >=20 > + >=20 > + # !BSF NAME:{PCI GFX Temporary MMIO Base} >=20 > + # !BSF TYPE:{EditNum, HEX, (0x80000000,0xDFFFFFFF)} >=20 > + # !BSF HELP:{PCI Temporary PCI GFX Base used before full PCI enumerati= on. > 0x80000000(Default).} >=20 > + gQemuFspPkgTokenSpaceGuid.PciTempResourceBase | * | 0x04 | > 0x80000000 >=20 > + >=20 > + # !HDR EMBED:{FSP_S_CONFIG:FspsConfig:END} >=20 > + gQemuFspPkgTokenSpaceGuid.ReservedFspsUpd | * | 0x01 | 0x0= 0 >=20 > + >=20 > + # Note please keep "UpdTerminator" at the end of each UPD region. >=20 > + # The tool will use this field to determine the actual end of the UPD = data >=20 > + # structure. >=20 > + gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x5= 5AA >=20 > + >=20 > +################################################################ > ################################### >=20 > +# >=20 > +# Components Section - list of the modules and components that will be > processed by compilation >=20 > +# tools and the EDK II tools to generate PE32/PE32+= /Coff image > files. >=20 > +# >=20 > +# Note: The EDK II DSC file is not used to specify how compiled binary i= mages > get placed >=20 > +# into firmware volume images. This section is just a list of modu= les to > compile from >=20 > +# source into UEFI-compliant binaries. >=20 > +# It is the FDF file that contains information on combining binary= files into > firmware >=20 > +# volume images, whose concept is beyond UEFI and is described in = PI > specification. >=20 > +# Binary modules do not need to be listed in this section, as they= should be >=20 > +# specified in the FDF file. For example: Shell binary (Shell_Full= .efi), FAT > binary (Fat.efi), >=20 > +# Logo (Logo.bmp), and etc. >=20 > +# There may also be modules listed in this section that are not re= quired in > the FDF file, >=20 > +# When a module listed here is excluded from FDF file, then UEFI-c= ompliant > binary will be >=20 > +# generated for it, but the binary will not be put into any firmwa= re volume. >=20 > +# >=20 > +################################################################ > ################################### >=20 > +[Components.IA32] >=20 > + # >=20 > + # FSP Binary Components >=20 > + # >=20 > + $(FSP_PACKAGE)/FspHeader/FspHeader.inf >=20 > + >=20 > + # >=20 > + # SEC >=20 > + # >=20 > + IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf { >=20 > + >=20 > + > FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecTL= i > b.inf >=20 > + } >=20 > + >=20 > +[Components.$(FSP_ARCH)] >=20 > + IntelFsp2Pkg/FspSecCore/FspSecCoreV.inf { >=20 > + >=20 > + > FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecVL= i > b.inf >=20 > + } >=20 > + >=20 > + IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf { >=20 > + >=20 > + > FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecML > ib.inf >=20 > + } >=20 > + >=20 > + IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf { >=20 > + >=20 > + > FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecSL= i > b.inf >=20 > + } >=20 > + >=20 > + # >=20 > + # PEI Core >=20 > + # >=20 > + MdeModulePkg/Core/Pei/PeiMain.inf >=20 > + >=20 > + # >=20 > + # PCD >=20 > + # >=20 > + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { >=20 > + >=20 > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf >=20 > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf >=20 > + } >=20 > + >=20 > + $(FSP_PACKAGE)/FspvInit/FspvInit.inf >=20 > + $(FSP_PACKAGE)/FspmInit/FspmInit.inf >=20 > + $(FSP_PACKAGE)/FspsInit/FspsInit.inf >=20 > + $(FSP_PACKAGE)/QemuVideo/QemuVideo.inf >=20 > + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { >=20 > + >=20 > + > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull > .inf >=20 > + > ResetSystemLib|MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSys > temLibNull.inf >=20 > + } >=20 > + IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf >=20 > + >=20 > +################################################################ > ################################### >=20 > +# >=20 > +# BuildOptions Section - Define the module specific tool chain flags tha= t should > be used as >=20 > +# the default flags for a module. These flags are= appended to any >=20 > +# standard flags that are defined by the build pr= ocess. They can be >=20 > +# applied for any modules or only those modules w= ith the specific >=20 > +# module style (EDK or EDKII) specified in [Compo= nents] section. >=20 > +# >=20 > +################################################################ > ################################### >=20 > +[BuildOptions] >=20 > +# Append build options for EDK and EDKII drivers (=3D is Append, =3D=3D = is Replace) >=20 > + # Enable link-time optimization when building with GCC49 >=20 > + *_GCC49_IA32_CC_FLAGS =3D -flto >=20 > + *_GCC49_IA32_DLINK_FLAGS =3D -flto >=20 > + *_GCC5_IA32_CC_FLAGS =3D -fno-pic >=20 > + *_GCC5_IA32_DLINK_FLAGS =3D -no-pie >=20 > + *_GCC5_IA32_ASLCC_FLAGS =3D -fno-pic >=20 > + *_GCC5_IA32_ASLDLINK_FLAGS =3D -no-pie >=20 > diff --git a/IntelFsp2Pkg/Tools/Tests/test_yaml.py > b/IntelFsp2Pkg/Tools/Tests/test_yaml.py > new file mode 100644 > index 0000000000..d81d7f7c4e > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/Tests/test_yaml.py > @@ -0,0 +1,96 @@ > +# @file >=20 > +# Split a file into two pieces at the request offset. >=20 > +# >=20 > +# Copyright (c) 2021, Intel Corporation. All rights reserved.
>=20 > +# >=20 > +# SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > +# >=20 > +## >=20 > + >=20 > +# Import Modules >=20 > +import unittest >=20 > +import tempfile >=20 > +import os >=20 > +import shutil >=20 > +import struct as st >=20 > +import filecmp >=20 > + >=20 > +import os, sys >=20 > +currentdir =3D os.path.dirname(os.path.realpath(__file__)) >=20 > +parentdir =3D os.path.dirname(currentdir) >=20 > +sys.path.append(parentdir) >=20 > +import FspDscBsf2Yaml >=20 > + >=20 > +YamlHeaderLineLength =3D 10 >=20 > +HdrFileHeaderLineLength =3D 32 >=20 > +BsfFileHeaderLineLength =3D 19 >=20 > + >=20 > +def GenFileWithoutHdr(inputfile, numLineToStrip): >=20 > + yaml_file =3D open(inputfile, "r") >=20 > + lines =3D yaml_file.readlines() >=20 > + yaml_file.close() >=20 > + del lines[:numLineToStrip] >=20 > + >=20 > + noHdrOutputFileName =3D "no-header-" + inputfile >=20 > + stripped_file =3D open(noHdrOutputFileName, "w") >=20 > + for line in lines: >=20 > + stripped_file.write(line) >=20 > + stripped_file.close() >=20 > + return noHdrOutputFileName >=20 > + >=20 > +class TestFspScripts(unittest.TestCase): >=20 > + def test_generateFspHeader_fromDsc(self): >=20 > + # Generate HEADER >=20 > + cmd =3D '{} {} HEADER {} {} {}'.format( >=20 > + 'python', >=20 > + '..\GenCfgOpt.py', >=20 > + 'QemuFspPkg.dsc', >=20 > + '.', >=20 > + "") >=20 > + os.system(cmd) >=20 > + noHdrOutputFileName =3D GenFileWithoutHdr("FspUpd.h", > HdrFileHeaderLineLength) >=20 > + self.assertTrue(filecmp.cmp(noHdrOutputFileName, >=20 > + 'ExpectedFspUpd.h')) >=20 > + >=20 > + def test_generateFspsHeader_fromDsc(self): >=20 > + noHdrOutputFileName =3D GenFileWithoutHdr("FspsUpd.h", > HdrFileHeaderLineLength) >=20 > + self.assertTrue(filecmp.cmp(noHdrOutputFileName, >=20 > + 'ExpectedFspsUpd.h')) >=20 > + >=20 > + def test_generateFsptHeader_fromDsc(self): >=20 > + noHdrOutputFileName =3D GenFileWithoutHdr("FsptUpd.h", > HdrFileHeaderLineLength) >=20 > + self.assertTrue(filecmp.cmp(noHdrOutputFileName, >=20 > + 'ExpectedFsptUpd.h')) >=20 > + >=20 > + def test_generateFspmHeader_fromDsc(self): >=20 > + noHdrOutputFileName =3D GenFileWithoutHdr("FspmUpd.h", > HdrFileHeaderLineLength) >=20 > + self.assertTrue(filecmp.cmp(noHdrOutputFileName, >=20 > + 'ExpectedFspmUpd.h')) >=20 > + >=20 > + def test_generateBsf_fromDsc(self): >=20 > + # Generate BSF >=20 > + cmd =3D '{} {} GENBSF {} {} {}'.format( >=20 > + 'python', >=20 > + '..\GenCfgOpt.py', >=20 > + 'QemuFspPkg.dsc', >=20 > + '.', >=20 > + "Output.bsf") >=20 > + os.system(cmd) >=20 > + noHdrOutputFileName =3D GenFileWithoutHdr("Output.bsf", > BsfFileHeaderLineLength) >=20 > + self.assertTrue(filecmp.cmp(noHdrOutputFileName, >=20 > + 'ExpectedOutput.bsf')) >=20 > + >=20 > + def test_generateYaml_fromDsc(self): >=20 > + # Generate YAML >=20 > + cmd =3D '{} {} {} {}'.format( >=20 > + 'python', >=20 > + '..\FspDscBsf2Yaml.py', >=20 > + 'QemuFspPkg.dsc', >=20 > + "Output.yaml") >=20 > + os.system(cmd) >=20 > + noHdrOutputFileName =3D GenFileWithoutHdr("Output.yaml", > YamlHeaderLineLength) >=20 > + self.assertTrue(filecmp.cmp(noHdrOutputFileName, >=20 > + 'ExpectedOutput.yaml')) >=20 > + >=20 > +if __name__ =3D=3D '__main__': >=20 > + unittest.main() >=20 > diff --git a/IntelFsp2Pkg/Tools/UserManuals/FspDscBsf2YamlUserManual.md > b/IntelFsp2Pkg/Tools/UserManuals/FspDscBsf2YamlUserManual.md > new file mode 100644 > index 0000000000..ba2311445c > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/UserManuals/FspDscBsf2YamlUserManual.md > @@ -0,0 +1,39 @@ > +#Name >=20 > +**FspDscBsf2Yaml.py** The python script that generates YAML file for >=20 > +the Boot Settings from an EDK II Platform Description (**DSC**) file >=20 > +or from a Boot Settings File (**BSF**). It is created to help >=20 > +transitioning FSP Updateable Product Data (**UPD**) file format to >=20 > +new standardized YAML format so that it can be configured through >=20 > +open source tools. >=20 > + >=20 > +#Synopsis >=20 > +``` >=20 > +FspDscBsf2Yaml DscFile|BsfFile YamlFile >=20 > +``` >=20 > + >=20 > +#Description >=20 > +**FspDscBsf2Yaml.py** is a script that generates configuration options f= rom > an >=20 > +**EDK II Platform Description (DSC)** file or **a Boot Settings File (BS= F)** file. >=20 > + >=20 > +It generates a **YAML file** that can be used by the **Config Editor** t= o > provide >=20 > +a graphical user interface for manipulating settings in the UPD regions. >=20 > + >=20 > +The following sections explain the usage of this script. >=20 > + >=20 > +## 1. FspDscBsf2Yaml.py DscFile YamlFile >=20 > + >=20 > +The **DscFile** option is an input DSC file. >=20 > + >=20 > +The **YamlFile** option is an output YAML file. >=20 > + >=20 > +The script takes the FSP DSC file consisting BSF syntax and generates a = YAML >=20 > +output file describing the boot settings. >=20 > + >=20 > +## 2. FspDscBsf2Yaml.py BsfFile YamlFile >=20 > + >=20 > +The **BsfFile** option is an input BSF file. >=20 > + >=20 > +The **YamlFile** option is an output YAML file. >=20 > + >=20 > +The script generates a YAML output file from a BSF file. The BSF file >=20 > +can be generated using GenCfgOpt tool. >=20 > -- > 2.28.0.windows.1