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Wed, 6 Jan 2021 11:23:41 +0000 Received: from SN7PR05MB7582.namprd05.prod.outlook.com ([fe80::5840:b0dd:d2c8:866f]) by SN7PR05MB7582.namprd05.prod.outlook.com ([fe80::5840:b0dd:d2c8:866f%7]) with mapi id 15.20.3742.006; Wed, 6 Jan 2021 11:23:41 +0000 From: "Andrei Warkentin" To: Ard Biesheuvel , Jeremy Linton , "devel@edk2.groups.io" CC: "leif@nuviainc.com" , "pete@akeo.ie" , "samer.el-haj-mahmoud@arm.com" Subject: Re: [PATCH v4 0/7] rpi4: Enable eMMC2 controller Thread-Topic: [PATCH v4 0/7] rpi4: Enable eMMC2 controller Thread-Index: AQHW44CiP4/CP89EZkWHcGtGAJHUF6oaUOyAgAAkaBM= Date: Wed, 6 Jan 2021 11:23:41 +0000 Message-ID: References: <20210105163420.1711652-1-jeremy.linton@arm.com>, In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=vmware.com; x-originating-ip: [176.57.76.234] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 7d7afeb2-1e4d-4cb7-cb13-08d8b23585b6 x-ms-traffictypediagnostic: SN6PR05MB5006: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7219; 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x-ms-exchange-antispam-messagedata: =?us-ascii?Q?hgHt2u6Us4TrTPrCRVK1Ulsu4vhwU3RBzAoWQBoI8OKo0qrb/nxpV32mdxSg?= =?us-ascii?Q?5vJeWLUpa5HbPrxvw6DSH8iKkFRtHioTZ46jhy8UD8sjjXlt6LkgGURXF456?= =?us-ascii?Q?CiwIcokD1Q6EQGZ5y1ZUkGcWQltDjbzQg3n8QcpXKeaskNjv/n79GKym17K/?= =?us-ascii?Q?Mr2VEUunBnqOi3VWO383//Bqs67KCUAt45aLjhvA+H6dwCwzhktxaUxYs6qM?= =?us-ascii?Q?nBy683QUQXtYigUfScIMRaeHu8DySCwpYacY2j7MvN0edOzTUHEC5bCIDjsW?= =?us-ascii?Q?JBcURJG8cFmUhzW/1hB7hwqPB4dzbjzD4W9KIWyCd75HNeJB1lyN/o9ymbuY?= =?us-ascii?Q?+gEnTP8eL3KrL/CQbeEa6JlBR4oA5DhCvcEupb78k3BPzKoay3JbiCEUijAJ?= =?us-ascii?Q?VRqSmv43fJkbdU8s5ao1+WUNZav3Q5gWepqeMFLc9PVygUDJBMTnkJJcvXgI?= =?us-ascii?Q?b6ucWgO07KJ5oYG6TuPfZ1MAPNi3lrymJ3+vYjXGpKOC3sAF1nM3wTYL8HIc?= =?us-ascii?Q?2f1iKG5mG0qD2w+YFZCboWUFbEPu+rgwYLE0qqf6mjnKGLCD0hLhDJD08JqL?= =?us-ascii?Q?J1MKuPKpJv+CFAkg3/nOGJg436qlaunFr8FfsyM9fdlOQR624LXkKhMB4a+J?= =?us-ascii?Q?bRes3nLa9zHYPbgE2dtu8rRKtekumOtQJGile50C+UgKCFgZ1nmxCLhxb+8d?= =?us-ascii?Q?jEBMR64YhOQeqek1zTBVg4yDL7di33WH5vUAHmYNK9377qM3ySB/IsSt4uBI?= =?us-ascii?Q?hEmmv/PiuicpOuLuWpDrpWTPv5T1pqEYEk+sl2e4QZMUEirH6Q/uZU5TBfCN?= =?us-ascii?Q?l/ANo9Gq+tc2iV5Urub68TIBizbew/h9Hg6QSfJnhxTQlwpDTIw58gZuT+av?= =?us-ascii?Q?XjsyM1KPDubt2laycCnjwiww2Cwh6Z+85K+eXReJlVTwWW1Eo8RzYN2IsUbw?= =?us-ascii?Q?+g8nyvZaA9fFXBHfWM6BQR4q55t1rRGBR/QhwDm2yV4=3D?= x-ms-exchange-transport-forked: True MIME-Version: 1.0 X-OriginatorOrg: vmware.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN7PR05MB7582.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7d7afeb2-1e4d-4cb7-cb13-08d8b23585b6 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Jan 2021 11:23:41.8478 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b39138ca-3cee-4b4a-a4d6-cd83d9dd62f0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: eO3gy5aciJac1XyTGBdDYpwUvBqFVMYAq+52RbqBxwG72L0cZ8LhYxvT/pfndpc5idhx2ugxU6RKqTy/ul115Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR05MB5006 Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_SN7PR05MB7582815CFDF37E834BC13DD5B9D00SN7PR05MB7582namp_" --_000_SN7PR05MB7582815CFDF37E834BC13DD5B9D00SN7PR05MB7582namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Ard: IIRC eMMC2 is a better SDHCI-like controller. It supports more high-sp= eed modes (e.g. 1.8V ones), resulting in better I/O performance, A ________________________________ From: Ard Biesheuvel Sent: Wednesday, January 6, 2021 3:11 AM To: Jeremy Linton ; devel@edk2.groups.io Cc: leif@nuviainc.com ; pete@akeo.ie ; sam= er.el-haj-mahmoud@arm.com ; Andrei Warkentin = Subject: Re: [PATCH v4 0/7] rpi4: Enable eMMC2 controller On 1/5/21 5:34 PM, Jeremy Linton wrote: > The rpi4 has a secondary SD controller at offset > 0xfe340000. This controller appears to be a mostly > compliant SDHCI controller (a newer more bugfree > Arasan?). So the existing Arasan driver should be > bound to it. This allows the rpi4 to boot > with its normal eMMC2->SD card, Arasan->wifi > configuration that is described in the Linux DT. > Could you please explain why this is an advantage? Is it related to ACPI OSes not needing to change pinmuxing etc? > To achieve this, it appears we should be tweaking > some of the expansion gpios, and probably telling > the firmware to power everything up. To do that > the vpu mailbox headers are synced with a more recent > list of the mailbox commands, then the rpi > firmware dxe is extended to support some futher > gpio/power commands. Once that is complete we tweak > the arasan driver to use an alternate register base, > add a workaround for a known clock crossing bug, and > set the card voltage. > > Of note, this set does _NOT_ change the HID/CID's > and add the additional eMMC2 controller to the > DSDT table. That remains an open item waiting > for a proper set of device ids. > > v3->v4: Commit message tweaks, variable rename. > v1->v3: Use some mailbox defines rather than opencoded constants > > Jeremy Linton (7): > Platform/RaspberryPi: Update VPU mailbox constants > Platform/RaspberryPi: Add further mailbox helpers > Platform/RaspberryPi: Split MMC register definitions > Platform/RaspberryPi/Arasan: Add write delay and voltage/clock config > Platform/RaspberryPi/Arasan: Select the correct base frequency > Platform/RaspberryPi: Power up SD, and tweak GPIOs > Platform/RaspberryPi: Correct device path removal. > > .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c | 131 ++++++++--- > .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h | 1 + > Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 7 + > .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 240 +++++++++++++++= +++++- > .../RaspberryPi/Include/IndustryStandard/RpiMbox.h | 94 +++++++- > .../RaspberryPi/Include/Protocol/RpiFirmware.h | 25 +++ > .../Library/PlatformBootManagerLib/PlatformBm.c | 2 +- > .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h | 42 ++-- > 8 files changed, 484 insertions(+), 58 deletions(-) > --_000_SN7PR05MB7582815CFDF37E834BC13DD5B9D00SN7PR05MB7582namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Ard: IIRC eMMC2 is a better SDHCI-like controller. It= supports more high-speed modes (e.g. 1.8V ones), resulting in better I/O p= erformance,

A
From: Ard Biesheuvel <ar= d.biesheuvel@arm.com>
Sent: Wednesday, January 6, 2021 3:11 AM
To: Jeremy Linton <jeremy.linton@arm.com>; devel@edk2.groups.i= o <devel@edk2.groups.io>
Cc: leif@nuviainc.com <leif@nuviainc.com>; pete@akeo.ie <pe= te@akeo.ie>; samer.el-haj-mahmoud@arm.com <samer.el-haj-mahmoud@arm.c= om>; Andrei Warkentin <awarkentin@vmware.com>
Subject: Re: [PATCH v4 0/7] rpi4: Enable eMMC2 controller
 
On 1/5/21 5:34 PM, Jeremy Linton wrote:
> The rpi4 has a secondary SD controller at offset
> 0xfe340000. This controller appears to be a mostly
> compliant SDHCI controller (a newer more bugfree
> Arasan?). So the existing Arasan driver should be
> bound to it. This allows the rpi4 to boot
> with its normal eMMC2->SD card, Arasan->wifi
> configuration that is described in the Linux DT.
>

Could you please explain why this is an advantage? Is it related to ACPI OSes not needing to change pinmuxing etc?


> To achieve this, it appears we should be tweaking
> some of the expansion gpios, and probably telling
> the firmware to power everything up. To do that
> the vpu mailbox headers are synced with a more recent
> list of the mailbox commands, then the rpi
> firmware dxe is extended to support some futher
> gpio/power commands. Once that is complete we tweak
> the arasan driver to use an alternate register base,
> add a workaround for a known clock crossing bug, and
> set the card voltage.
>
> Of note, this set does _NOT_ change the HID/CID's
> and add the additional eMMC2 controller to the
> DSDT table. That remains an open item waiting
> for a proper set of device ids.
>
> v3->v4: Commit message tweaks, variable rename.
> v1->v3: Use some mailbox defines rather than opencoded constants >
> Jeremy Linton (7):
>   Platform/RaspberryPi: Update VPU mailbox constants
>   Platform/RaspberryPi: Add further mailbox helpers
>   Platform/RaspberryPi: Split MMC register definitions
>   Platform/RaspberryPi/Arasan: Add write delay and voltage/c= lock config
>   Platform/RaspberryPi/Arasan: Select the correct base frequ= ency
>   Platform/RaspberryPi: Power up SD, and tweak GPIOs
>   Platform/RaspberryPi: Correct device path removal.
>
>  .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c   = ; | 131 ++++++++---
>  .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h   = ; |   1 +
>  Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c |  = 7 +
>  .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c   &nb= sp;    | 240 ++++++++++++++++++++-
>  .../RaspberryPi/Include/IndustryStandard/RpiMbox.h |  94 ++= +++++-
>  .../RaspberryPi/Include/Protocol/RpiFirmware.h   =   |  25 +++
>  .../Library/PlatformBootManagerLib/PlatformBm.c   = ; |   2 +-
>  .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h |  42 ++= --
>  8 files changed, 484 insertions(+), 58 deletions(-)
>

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