Suggest changing the strings to reflect that the coming PCIe functionality relies on the SMC conduit... Reviewed-by: Andrei Warkentin ________________________________ From: devel@edk2.groups.io on behalf of Jeremy Linton via groups.io Sent: Tuesday, January 12, 2021 4:27 PM To: devel@edk2.groups.io Cc: pete@akeo.ie ; Andrei Warkentin ; samer.el-haj-mahmoud@arm.com ; leif@nuviainc.com ; ard.biesheuvel@arm.com ; Jeremy Linton Subject: [edk2-devel] [RFC 1/3] rpi4: Add XHCI/PCI selection menu ARM has standardized a SMC PCI conduit that can be used to access the PCI config space in a standardized way. This functionality doesn't yet exist in many OS/Distro's. Lets add another advanced config item that allows the user to toggle between presenting the XHCI on the base rpi4 as a platform device, or presenting this newer PCIe conduit. Signed-off-by: Jeremy Linton --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 32 ++++++++++++++++++++++ .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 3 ++ .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 ++++ .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 13 +++++++++ Platform/RaspberryPi/Include/ConfigVars.h | 4 +++ Platform/RaspberryPi/RPi3/RPi3.dsc | 9 ++++++ Platform/RaspberryPi/RPi4/RPi4.dsc | 11 ++++++++ Platform/RaspberryPi/RaspberryPi.dec | 3 ++ 8 files changed, 80 insertions(+) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index 6fcbdcdd17..7a3b8e9068 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -266,6 +266,38 @@ SetupVariables ( ASSERT_EFI_ERROR (Status); } + if (mModelFamily >= 4) { + Size = sizeof (UINT32); + Status = gRT->GetVariable (L"XhciPci", + &gConfigDxeFormSetGuid, + NULL, &Size, &Var32); + if (EFI_ERROR (Status) || (Var32 != 2)) { + // enable Xhci by default + Status = PcdSet32S (PcdXhciPci, 1); + ASSERT_EFI_ERROR (Status); + Status = PcdSet32S (PcdXhci, 1); + ASSERT_EFI_ERROR (Status); + Status = PcdSet32S (PcdPci, 0); + ASSERT_EFI_ERROR (Status); + } else { + // enable PCIe + Status = PcdSet32S (PcdXhciPci, 2); + ASSERT_EFI_ERROR (Status); + Status = PcdSet32S (PcdXhci, 0); + ASSERT_EFI_ERROR (Status); + Status = PcdSet32S (PcdPci, 1); + ASSERT_EFI_ERROR (Status); + } + } else { + // disable pcie and xhci + Status = PcdSet32S (PcdXhciPci, 0); + ASSERT_EFI_ERROR (Status); + Status = PcdSet32S (PcdXhci, 0); + ASSERT_EFI_ERROR (Status); + Status = PcdSet32S (PcdPci, 0); + ASSERT_EFI_ERROR (Status); + } + Size = sizeof (AssetTagVar); Status = gRT->GetVariable (L"AssetTag", &gConfigDxeFormSetGuid, diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf index 544e3b3e10..aa0fbc7e25 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf @@ -92,6 +92,9 @@ gRaspberryPiTokenSpaceGuid.PcdRamLimitTo3GB gRaspberryPiTokenSpaceGuid.PcdFanOnGpio gRaspberryPiTokenSpaceGuid.PcdFanTemp + gRaspberryPiTokenSpaceGuid.PcdXhciPci + gRaspberryPiTokenSpaceGuid.PcdXhci + gRaspberryPiTokenSpaceGuid.PcdPci [Depex] gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni index 2afe8f32ae..34efb82f57 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni @@ -57,6 +57,11 @@ #string STR_ADVANCED_FANTEMP_PROMPT #language en-US "ACPI fan temperature" #string STR_ADVANCED_FANTEMP_HELP #language en-US "Cycle a fan at C" +#string STR_ADVANCED_XHCIPCI_PROMPT #language en-US "ACPI XHCI/PCIe" +#string STR_ADVANCED_XHCIPCI_HELP #language en-US "OS sees XHCI USB platform device or PCIe bridge" +#string STR_ADVANCED_XHCIPCI_XHCI #language en-US "XHCI" +#string STR_ADVANCED_XHCIPCI_PCIE #language en-US "PCIe" + #string STR_ADVANCED_ASSET_TAG_PROMPT #language en-US "Asset Tag" #string STR_ADVANCED_ASSET_TAG_HELP #language en-US "Set the system Asset Tag" diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr index de5e43471a..4d5876eb24 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr @@ -56,6 +56,11 @@ formset name = FanTemp, guid = CONFIGDXE_FORM_SET_GUID; + efivarstore ADVANCED_XHCIPCI_VARSTORE_DATA, + attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, + name = XhciPci, + guid = CONFIGDXE_FORM_SET_GUID; + efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA, attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, name = SystemTableMode, @@ -207,6 +212,14 @@ formset default = 60, endnumeric; endif; + + oneof varid = XhciPci.Value, + prompt = STRING_TOKEN(STR_ADVANCED_XHCIPCI_PROMPT), + help = STRING_TOKEN(STR_ADVANCED_XHCIPCI_HELP), + flags = NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRED, + option text = STRING_TOKEN(STR_ADVANCED_XHCIPCI_XHCI), value = 1, flags = DEFAULT; + option text = STRING_TOKEN(STR_ADVANCED_XHCIPCI_PCIE), value = 2, flags = 0; + endoneof; #endif string varid = AssetTag.AssetTag, prompt = STRING_TOKEN(STR_ADVANCED_ASSET_TAG_PROMPT), diff --git a/Platform/RaspberryPi/Include/ConfigVars.h b/Platform/RaspberryPi/Include/ConfigVars.h index c185bfe28b..eb08ad8987 100644 --- a/Platform/RaspberryPi/Include/ConfigVars.h +++ b/Platform/RaspberryPi/Include/ConfigVars.h @@ -77,6 +77,10 @@ typedef struct { } ADVANCED_FANTEMP_VARSTORE_DATA; typedef struct { + UINT32 Value; +} ADVANCED_XHCIPCI_VARSTORE_DATA; + +typedef struct { #define SYSTEM_TABLE_MODE_ACPI 0 #define SYSTEM_TABLE_MODE_BOTH 1 #define SYSTEM_TABLE_MODE_DT 2 diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3/RPi3.dsc index 530b42796a..0aeb27d69d 100644 --- a/Platform/RaspberryPi/RPi3/RPi3.dsc +++ b/Platform/RaspberryPi/RPi3/RPi3.dsc @@ -514,6 +514,15 @@ gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberryPiTokenSpaceGuid|0x0|0 + # Select XHCI/PCIe mode (not valid on rpi3) + # + # 0 - DISABLED + # + gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0x0|0 + # SSDT selectors + gRaspberryPiTokenSpaceGuid.PcdXhci|L"Xhci"|gConfigDxeFormSetGuid|0x0|0 + gRaspberryPiTokenSpaceGuid.PcdPci|L"Pci"|gConfigDxeFormSetGuid|0x0|0 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc index 0cd1014095..d5952288cc 100644 --- a/Platform/RaspberryPi/RPi4/RPi4.dsc +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc @@ -528,6 +528,17 @@ gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberryPiTokenSpaceGuid|0x0|0 + # Select XHCI/PCIe mode + # + # 0 - DISABLED (not valid for rpi4) + # 1 - Xhci Enabled (default) + # 2 - Pcie Enabled + # + gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0x0|1 + # SSDT selectors + gRaspberryPiTokenSpaceGuid.PcdXhci|L"Xhci"|gConfigDxeFormSetGuid|0x0|1 + gRaspberryPiTokenSpaceGuid.PcdPci|L"Pci"|gConfigDxeFormSetGuid|0x0|0 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec index 10723036aa..6c7d4e5116 100644 --- a/Platform/RaspberryPi/RaspberryPi.dec +++ b/Platform/RaspberryPi/RaspberryPi.dec @@ -69,3 +69,6 @@ gRaspberryPiTokenSpaceGuid.PcdFanOnGpio|0|UINT32|0x0000001C gRaspberryPiTokenSpaceGuid.PcdFanTemp|0|UINT32|0x0000001D gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|0|UINT32|0x0000001E + gRaspberryPiTokenSpaceGuid.PcdXhci|0|UINT32|0x0000001F + gRaspberryPiTokenSpaceGuid.PcdPci|0|UINT32|0x00000020 + gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000021 -- 2.13.7 -=-=-=-=-=-= Groups.io Links: You receive all messages sent to this group. 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