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Mon, 8 Feb 2021 17:39:02 +0000 Received: from SN7PR05MB7582.namprd05.prod.outlook.com ([fe80::d1f7:9f0e:9655:eadb]) by SN7PR05MB7582.namprd05.prod.outlook.com ([fe80::d1f7:9f0e:9655:eadb%4]) with mapi id 15.20.3846.025; Mon, 8 Feb 2021 17:39:02 +0000 From: "Andrei Warkentin" To: "devel@edk2.groups.io" , "jeremy.linton@arm.com" CC: "pete@akeo.ie" , "samer.el-haj-mahmoud@arm.com" , "leif@nuviainc.com" , "ard.biesheuvel@arm.com" Subject: Re: [edk2-devel] [RFC 1/3] rpi4: Add XHCI/PCI selection menu Thread-Topic: [edk2-devel] [RFC 1/3] rpi4: Add XHCI/PCI selection menu Thread-Index: AQHW6TIW298zXZ7D8021YtXf9SsZaqpOr+D1 Date: Mon, 8 Feb 2021 17:39:02 +0000 Message-ID: References: <20210112222708.1757044-1-jeremy.linton@arm.com>,<20210112222708.1757044-2-jeremy.linton@arm.com> In-Reply-To: <20210112222708.1757044-2-jeremy.linton@arm.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: edk2.groups.io; dkim=none (message not signed) header.d=none;edk2.groups.io; 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boundary="_000_SN7PR05MB75828483F1098CBCF503D262B98F9SN7PR05MB7582namp_" --_000_SN7PR05MB75828483F1098CBCF503D262B98F9SN7PR05MB7582namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Suggest changing the strings to reflect that the coming PCIe functionality = relies on the SMC conduit... Reviewed-by: Andrei Warkentin ________________________________ From: devel@edk2.groups.io on behalf of Jeremy Linto= n via groups.io Sent: Tuesday, January 12, 2021 4:27 PM To: devel@edk2.groups.io Cc: pete@akeo.ie ; Andrei Warkentin ; = samer.el-haj-mahmoud@arm.com ; leif@nuviainc.= com ; ard.biesheuvel@arm.com ; J= eremy Linton Subject: [edk2-devel] [RFC 1/3] rpi4: Add XHCI/PCI selection menu ARM has standardized a SMC PCI conduit that can be used to access the PCI config space in a standardized way. This functionality doesn't yet exist in many OS/Distro's. Lets add another advanced config item that allows the user to toggle between presenting the XHCI on the base rpi4 as a platform device, or presenting this newer PCIe conduit. Signed-off-by: Jeremy Linton --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 32 ++++++++++++++++++= ++++ .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 3 ++ .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 ++++ .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 13 +++++++++ Platform/RaspberryPi/Include/ConfigVars.h | 4 +++ Platform/RaspberryPi/RPi3/RPi3.dsc | 9 ++++++ Platform/RaspberryPi/RPi4/RPi4.dsc | 11 ++++++++ Platform/RaspberryPi/RaspberryPi.dec | 3 ++ 8 files changed, 80 insertions(+) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/= RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index 6fcbdcdd17..7a3b8e9068 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -266,6 +266,38 @@ SetupVariables ( ASSERT_EFI_ERROR (Status); } + if (mModelFamily >=3D 4) { + Size =3D sizeof (UINT32); + Status =3D gRT->GetVariable (L"XhciPci", + &gConfigDxeFormSetGuid, + NULL, &Size, &Var32); + if (EFI_ERROR (Status) || (Var32 !=3D 2)) { + // enable Xhci by default + Status =3D PcdSet32S (PcdXhciPci, 1); + ASSERT_EFI_ERROR (Status); + Status =3D PcdSet32S (PcdXhci, 1); + ASSERT_EFI_ERROR (Status); + Status =3D PcdSet32S (PcdPci, 0); + ASSERT_EFI_ERROR (Status); + } else { + // enable PCIe + Status =3D PcdSet32S (PcdXhciPci, 2); + ASSERT_EFI_ERROR (Status); + Status =3D PcdSet32S (PcdXhci, 0); + ASSERT_EFI_ERROR (Status); + Status =3D PcdSet32S (PcdPci, 1); + ASSERT_EFI_ERROR (Status); + } + } else { + // disable pcie and xhci + Status =3D PcdSet32S (PcdXhciPci, 0); + ASSERT_EFI_ERROR (Status); + Status =3D PcdSet32S (PcdXhci, 0); + ASSERT_EFI_ERROR (Status); + Status =3D PcdSet32S (PcdPci, 0); + ASSERT_EFI_ERROR (Status); + } + Size =3D sizeof (AssetTagVar); Status =3D gRT->GetVariable (L"AssetTag", &gConfigDxeFormSetGuid, diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platfor= m/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf index 544e3b3e10..aa0fbc7e25 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf @@ -92,6 +92,9 @@ gRaspberryPiTokenSpaceGuid.PcdRamLimitTo3GB gRaspberryPiTokenSpaceGuid.PcdFanOnGpio gRaspberryPiTokenSpaceGuid.PcdFanTemp + gRaspberryPiTokenSpaceGuid.PcdXhciPci + gRaspberryPiTokenSpaceGuid.PcdXhci + gRaspberryPiTokenSpaceGuid.PcdPci [Depex] gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni index 2afe8f32ae..34efb82f57 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni @@ -57,6 +57,11 @@ #string STR_ADVANCED_FANTEMP_PROMPT #language en-US "ACPI fan temperatur= e" #string STR_ADVANCED_FANTEMP_HELP #language en-US "Cycle a fan at C" +#string STR_ADVANCED_XHCIPCI_PROMPT #language en-US "ACPI XHCI/PCIe" +#string STR_ADVANCED_XHCIPCI_HELP #language en-US "OS sees XHCI USB pl= atform device or PCIe bridge" +#string STR_ADVANCED_XHCIPCI_XHCI #language en-US "XHCI" +#string STR_ADVANCED_XHCIPCI_PCIE #language en-US "PCIe" + #string STR_ADVANCED_ASSET_TAG_PROMPT #language en-US "Asset Tag" #string STR_ADVANCED_ASSET_TAG_HELP #language en-US "Set the system Asse= t Tag" diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr index de5e43471a..4d5876eb24 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr @@ -56,6 +56,11 @@ formset name =3D FanTemp, guid =3D CONFIGDXE_FORM_SET_GUID; + efivarstore ADVANCED_XHCIPCI_VARSTORE_DATA, + attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME= _ACCESS | EFI_VARIABLE_NON_VOLATILE, + name =3D XhciPci, + guid =3D CONFIGDXE_FORM_SET_GUID; + efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA, attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME= _ACCESS | EFI_VARIABLE_NON_VOLATILE, name =3D SystemTableMode, @@ -207,6 +212,14 @@ formset default =3D 60, endnumeric; endif; + + oneof varid =3D XhciPci.Value, + prompt =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PROMPT), + help =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_HELP), + flags =3D NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRED, + option text =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_XHCI), value= =3D 1, flags =3D DEFAULT; + option text =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PCIE), value= =3D 2, flags =3D 0; + endoneof; #endif string varid =3D AssetTag.AssetTag, prompt =3D STRING_TOKEN(STR_ADVANCED_ASSET_TAG_PROMPT), diff --git a/Platform/RaspberryPi/Include/ConfigVars.h b/Platform/Raspberry= Pi/Include/ConfigVars.h index c185bfe28b..eb08ad8987 100644 --- a/Platform/RaspberryPi/Include/ConfigVars.h +++ b/Platform/RaspberryPi/Include/ConfigVars.h @@ -77,6 +77,10 @@ typedef struct { } ADVANCED_FANTEMP_VARSTORE_DATA; typedef struct { + UINT32 Value; +} ADVANCED_XHCIPCI_VARSTORE_DATA; + +typedef struct { #define SYSTEM_TABLE_MODE_ACPI 0 #define SYSTEM_TABLE_MODE_BOTH 1 #define SYSTEM_TABLE_MODE_DT 2 diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3= /RPi3.dsc index 530b42796a..0aeb27d69d 100644 --- a/Platform/RaspberryPi/RPi3/RPi3.dsc +++ b/Platform/RaspberryPi/RPi3/RPi3.dsc @@ -514,6 +514,15 @@ gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberr= yPiTokenSpaceGuid|0x0|0 + # Select XHCI/PCIe mode (not valid on rpi3) + # + # 0 - DISABLED + # + gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0= x0|0 + # SSDT selectors + gRaspberryPiTokenSpaceGuid.PcdXhci|L"Xhci"|gConfigDxeFormSetGuid|0x0|0 + gRaspberryPiTokenSpaceGuid.PcdPci|L"Pci"|gConfigDxeFormSetGuid|0x0|0 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4= /RPi4.dsc index 0cd1014095..d5952288cc 100644 --- a/Platform/RaspberryPi/RPi4/RPi4.dsc +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc @@ -528,6 +528,17 @@ gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberr= yPiTokenSpaceGuid|0x0|0 + # Select XHCI/PCIe mode + # + # 0 - DISABLED (not valid for rpi4) + # 1 - Xhci Enabled (default) + # 2 - Pcie Enabled + # + gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0= x0|1 + # SSDT selectors + gRaspberryPiTokenSpaceGuid.PcdXhci|L"Xhci"|gConfigDxeFormSetGuid|0x0|1 + gRaspberryPiTokenSpaceGuid.PcdPci|L"Pci"|gConfigDxeFormSetGuid|0x0|0 + # # Common UEFI ones. # diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/Ra= spberryPi.dec index 10723036aa..6c7d4e5116 100644 --- a/Platform/RaspberryPi/RaspberryPi.dec +++ b/Platform/RaspberryPi/RaspberryPi.dec @@ -69,3 +69,6 @@ gRaspberryPiTokenSpaceGuid.PcdFanOnGpio|0|UINT32|0x0000001C gRaspberryPiTokenSpaceGuid.PcdFanTemp|0|UINT32|0x0000001D gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|0|UINT32|0x0000001E + gRaspberryPiTokenSpaceGuid.PcdXhci|0|UINT32|0x0000001F + gRaspberryPiTokenSpaceGuid.PcdPci|0|UINT32|0x00000020 + gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000021 -- 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D Groups.io Links: You receive all messages sent to this group. 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Suggest changing the strings to reflect that the coming PCIe functionality = relies on the SMC conduit...

Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
From: devel@edk2.groups.io = <devel@edk2.groups.io> on behalf of Jeremy Linton via groups.io <j= eremy.linton=3Darm.com@groups.io>
Sent: Tuesday, January 12, 2021 4:27 PM
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: pete@akeo.ie <pete@akeo.ie>; Andrei Warkentin <awarkent= in@vmware.com>; samer.el-haj-mahmoud@arm.com <samer.el-haj-mahmoud@ar= m.com>; leif@nuviainc.com <leif@nuviainc.com>; ard.biesheuvel@arm.= com <ard.biesheuvel@arm.com>; Jeremy Linton <jeremy.linton@arm.com= >
Subject: [edk2-devel] [RFC 1/3] rpi4: Add XHCI/PCI selection menu
 
ARM has standardized a SMC PCI conduit that can be= used
to access the PCI config space in a standardized way. This
functionality doesn't yet exist in many OS/Distro's. Lets
add another advanced config item that allows the user
to toggle between presenting the XHCI on the base rpi4
as a platform device, or presenting this newer PCIe
conduit.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
---
 Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 32 +++++++++++++= +++++++++
 .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf    |&n= bsp; 3 ++
 .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni |  5 ++++
 .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 13 +++++++++
 Platform/RaspberryPi/Include/ConfigVars.h    &nbs= p;     |  4 +++
 Platform/RaspberryPi/RPi3/RPi3.dsc      = ;           |  9 +++= +++
 Platform/RaspberryPi/RPi4/RPi4.dsc      = ;           | 11 ++++++++=
 Platform/RaspberryPi/RaspberryPi.dec     &nb= sp;         |  3 ++
 8 files changed, 80 insertions(+)

diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/= RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
index 6fcbdcdd17..7a3b8e9068 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
@@ -266,6 +266,38 @@ SetupVariables (
     ASSERT_EFI_ERROR (Status);

   }

 

+  if (mModelFamily >=3D 4) {

+    Size =3D sizeof (UINT32);

+    Status =3D gRT->GetVariable (L"XhciPci",
+            &n= bsp;            = ;      &gConfigDxeFormSetGuid,

+            &n= bsp;            = ;      NULL, &Size, &Var32);

+    if (EFI_ERROR (Status) || (Var32 !=3D 2)) {

+      // enable Xhci by default

+      Status =3D PcdSet32S (PcdXhciPci, 1);

+      ASSERT_EFI_ERROR (Status);

+      Status =3D PcdSet32S (PcdXhci, 1);

+      ASSERT_EFI_ERROR (Status);

+      Status =3D PcdSet32S (PcdPci, 0);

+      ASSERT_EFI_ERROR (Status);

+    } else {

+      // enable PCIe

+      Status =3D PcdSet32S (PcdXhciPci, 2);

+      ASSERT_EFI_ERROR (Status);

+      Status =3D PcdSet32S (PcdXhci, 0);

+      ASSERT_EFI_ERROR (Status);

+      Status =3D PcdSet32S (PcdPci, 1);

+      ASSERT_EFI_ERROR (Status);

+    }

+  } else {

+    // disable pcie and xhci

+    Status =3D PcdSet32S (PcdXhciPci, 0);

+    ASSERT_EFI_ERROR (Status);

+    Status =3D PcdSet32S (PcdXhci, 0);

+    ASSERT_EFI_ERROR (Status);

+    Status =3D PcdSet32S (PcdPci, 0);

+    ASSERT_EFI_ERROR (Status);

+  }

+

   Size =3D sizeof (AssetTagVar);

   Status =3D gRT->GetVariable (L"AssetTag",

            &nb= sp;      &gConfigDxeFormSetGuid,

diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platfor= m/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
index 544e3b3e10..aa0fbc7e25 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
@@ -92,6 +92,9 @@
   gRaspberryPiTokenSpaceGuid.PcdRamLimitTo3GB

   gRaspberryPiTokenSpaceGuid.PcdFanOnGpio

   gRaspberryPiTokenSpaceGuid.PcdFanTemp

+  gRaspberryPiTokenSpaceGuid.PcdXhciPci

+  gRaspberryPiTokenSpaceGuid.PcdXhci

+  gRaspberryPiTokenSpaceGuid.PcdPci

 

 [Depex]

   gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid

diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
index 2afe8f32ae..34efb82f57 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
@@ -57,6 +57,11 @@
 #string STR_ADVANCED_FANTEMP_PROMPT   #language en-US "= ;ACPI fan temperature"

 #string STR_ADVANCED_FANTEMP_HELP     #language e= n-US "Cycle a fan at C"

 

+#string STR_ADVANCED_XHCIPCI_PROMPT   #language en-US "ACPI= XHCI/PCIe"

+#string STR_ADVANCED_XHCIPCI_HELP     #language en-US = "OS sees XHCI USB platform device or PCIe bridge"

+#string STR_ADVANCED_XHCIPCI_XHCI     #language en-US = "XHCI"

+#string STR_ADVANCED_XHCIPCI_PCIE     #language en-US = "PCIe"

+

 #string STR_ADVANCED_ASSET_TAG_PROMPT #language en-US "Asset Tag= "

 #string STR_ADVANCED_ASSET_TAG_HELP   #language en-US "= ;Set the system Asset Tag"

 

diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Plat= form/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
index de5e43471a..4d5876eb24 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
@@ -56,6 +56,11 @@ formset
       name  =3D FanTemp,

       guid  =3D CONFIGDXE_FORM_SET_GUID= ;

 

+    efivarstore ADVANCED_XHCIPCI_VARSTORE_DATA,

+      attribute =3D EFI_VARIABLE_BOOTSERVICE_ACCE= SS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,

+      name  =3D XhciPci,

+      guid  =3D CONFIGDXE_FORM_SET_GUID;

+

     efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA,

       attribute =3D EFI_VARIABLE_BOOTSERVICE= _ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,

       name  =3D SystemTableMode,

@@ -207,6 +212,14 @@ formset
            &nb= sp;  default =3D 60,

           endnumeric;
         endif;

+

+        oneof varid =3D XhciPci.Value,<= br>
+            prompt&= nbsp;     =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PROMPT)= ,

+            help&nb= sp;       =3D STRING_TOKEN(STR_ADVANCED_XHCIP= CI_HELP),

+            flags&n= bsp;      =3D NUMERIC_SIZE_4 | INTERACTIVE | RESET= _REQUIRED,

+            option = text =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_XHCI), value =3D 1, flags =3D DE= FAULT;

+            option = text =3D STRING_TOKEN(STR_ADVANCED_XHCIPCI_PCIE), value =3D 2, flags =3D 0;=

+        endoneof;

 #endif

         string varid =3D AssetTag.= AssetTag,

             pr= ompt  =3D STRING_TOKEN(STR_ADVANCED_ASSET_TAG_PROMPT),

diff --git a/Platform/RaspberryPi/Include/ConfigVars.h b/Platform/Raspberry= Pi/Include/ConfigVars.h
index c185bfe28b..eb08ad8987 100644
--- a/Platform/RaspberryPi/Include/ConfigVars.h
+++ b/Platform/RaspberryPi/Include/ConfigVars.h
@@ -77,6 +77,10 @@ typedef struct {
 } ADVANCED_FANTEMP_VARSTORE_DATA;

 

 typedef struct {

+  UINT32 Value;

+} ADVANCED_XHCIPCI_VARSTORE_DATA;

+

+typedef struct {

 #define SYSTEM_TABLE_MODE_ACPI 0

 #define SYSTEM_TABLE_MODE_BOTH 1

 #define SYSTEM_TABLE_MODE_DT   2

diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3= /RPi3.dsc
index 530b42796a..0aeb27d69d 100644
--- a/Platform/RaspberryPi/RPi3/RPi3.dsc
+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc
@@ -514,6 +514,15 @@
 

   gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetD= elay"|gRaspberryPiTokenSpaceGuid|0x0|0

 

+  # Select XHCI/PCIe mode (not valid on rpi3)

+  #

+  # 0  - DISABLED

+  #

+  gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigD= xeFormSetGuid|0x0|0

+  # SSDT selectors

+  gRaspberryPiTokenSpaceGuid.PcdXhci|L"Xhci"|gConfigDxeForm= SetGuid|0x0|0

+  gRaspberryPiTokenSpaceGuid.PcdPci|L"Pci"|gConfigDxeFormSe= tGuid|0x0|0

+

   #

   # Common UEFI ones.

   #

diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4= /RPi4.dsc
index 0cd1014095..d5952288cc 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -528,6 +528,17 @@
 

   gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetD= elay"|gRaspberryPiTokenSpaceGuid|0x0|0

 

+  # Select XHCI/PCIe mode

+  #

+  # 0  - DISABLED (not valid for rpi4)

+  # 1  - Xhci Enabled (default)

+  # 2  - Pcie Enabled

+  #

+  gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigD= xeFormSetGuid|0x0|1

+  # SSDT selectors

+  gRaspberryPiTokenSpaceGuid.PcdXhci|L"Xhci"|gConfigDxeForm= SetGuid|0x0|1

+  gRaspberryPiTokenSpaceGuid.PcdPci|L"Pci"|gConfigDxeFormSe= tGuid|0x0|0

+

   #

   # Common UEFI ones.

   #

diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/Ra= spberryPi.dec
index 10723036aa..6c7d4e5116 100644
--- a/Platform/RaspberryPi/RaspberryPi.dec
+++ b/Platform/RaspberryPi/RaspberryPi.dec
@@ -69,3 +69,6 @@
   gRaspberryPiTokenSpaceGuid.PcdFanOnGpio|0|UINT32|0x0000001C
   gRaspberryPiTokenSpaceGuid.PcdFanTemp|0|UINT32|0x0000001D

   gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|0|UINT32|0x00= 00001E

+  gRaspberryPiTokenSpaceGuid.PcdXhci|0|UINT32|0x0000001F

+  gRaspberryPiTokenSpaceGuid.PcdPci|0|UINT32|0x00000020

+  gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000021

--
2.13.7



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