Re: [edk2-devel] [edk2-staging/RISC-V-V2: CI Config PATCH v1 0/6] RISC-V EDK2 CI configuration files.

Re: [edk2-devel] [edk2-staging/RISC-V-V2: CI Config PATCH v1 0/6] RISC-V EDK2 CI configuration files.

[Abner Chang]

I forget to mention in cover letter, the external dependency of toolchain for RISC-V is currently set to my local drive which is  (file:///home/abner/gcc-riscv-9.2.0-2020.02-x86_64_riscv64-unknown-gnu).
RISC-V org is currently looking for the proper place to accommodate this large binary file. I will update the link to toolchain in gcc_riscv64_unknown_ext_dep.yaml before committing CI related changes to edk2 master.

> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Abner Chang
> Sent: Saturday, February 29, 2020 12:23 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>; Bret
> Barkelew <Bret.Barkelew@microsoft.com>; Sean Brogan
> <sean.brogan@microsoft.com>; Leif Lindholm <leif@nuviainc.com>; Michael
> D Kinney <michael.d.kinney@intel.com>; Liming Gao
> <liming.gao@intel.com>; Chen, Gilbert <gilbert.chen@hpe.com>; Schaefer,
> Daniel (DualStudy) <daniel.schaefer@hpe.com>
> Subject: [edk2-devel] [edk2-staging/RISC-V-V2: CI Config PATCH v1 0/6]
> RISC-V EDK2 CI configuration files.
> 
> BZ:2562 - EDK CI for RISC-V architecture.
> 
> This set of patches enale RISC-V architecture on EDK2 CI test process.
> 
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
> 
> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
> Cc: Sean Brogan <sean.brogan@microsoft.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
> 
> Abner Chang (6):
>   RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI.
>   RiscVPkg: Add RiscVPkg yaml file for EDK2 CI.
>   MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V EDK2 CI.
>   BaseTools: Enable RISC-V architecture for RISC-V EDK2 CI.
>   .azurepipelines: Add RISC-V architecture on RISC-V EDK2 CI.
>   .pytool: Add RISC-V architecture on RISC-V EDK2 CI.
> 
>  .azurepipelines/Ubuntu-GCC5.yml               |  3 +-
>  .pytool/CISettings.py                         | 15 +++-
>  .../Bin/gcc_riscv64_unknown_ext_dep.yaml      | 21 +++++
>  .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  | 31 +++++++
>  MdeModulePkg/MdeModulePkg.ci.yaml             |  3 +-
>  RiscVPkg/RiscVPkg.ci.yaml                     | 80 ++++++++++++++++++
>  RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml     | 81 +++++++++++++++++++
>  7 files changed, 229 insertions(+), 5 deletions(-)  create mode 100644
> BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml
>  create mode 100644 RiscVPkg/RiscVPkg.ci.yaml  create mode 100644
> RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml
> 
> --
> 2.25.0
> 
> 
>