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From: "Abner Chang" <abner.chang@hpe.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"zhiguang.liu@intel.com" <zhiguang.liu@intel.com>
Cc: "Chen, Gilbert" <gilbert.chen@hpe.com>,
	"Schaefer, Daniel (DualStudy)" <daniel.schaefer@hpe.com>,
	Leif Lindholm <leif.lindholm@linaro.org>,
	"Feng, Bob C" <bob.c.feng@intel.com>,
	"Gao, Liming" <liming.gao@intel.com>
Subject: Re: [edk2-devel] [PATCH v3 3/3] BaseTools: BaseTools changes for RISC-V platform.
Date: Tue, 21 Apr 2020 05:56:12 +0000	[thread overview]
Message-ID: <TU4PR8401MB04297CD2D845FC022E9EF072FFD50@TU4PR8401MB0429.NAMPRD84.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <BN7PR11MB2804B3C5E984B6EB877E8D5790D50@BN7PR11MB2804.namprd11.prod.outlook.com>

Good catch Zhiquang,
Do you have other comments on those patches? I can fix it at once and send the patch to ML.

Thanks
Abner

> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Zhiguang Liu
> Sent: Tuesday, April 21, 2020 1:28 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> <abner.chang@hpe.com>
> Cc: Chen, Gilbert <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schaefer@hpe.com>; Leif Lindholm <leif.lindholm@linaro.org>; Feng,
> Bob C <bob.c.feng@intel.com>; Gao, Liming <liming.gao@intel.com>
> Subject: Re: [edk2-devel] [PATCH v3 3/3] BaseTools: BaseTools changes for
> RISC-V platform.
> 
> Hi Abner
> 
> Why this line doesn't specify the architect?
> 
> +DEFINE GCC5_ASM_FLAGS                      = DEF(GCC5_RISCV_ALL_ASM_FLAGS)
> -march=DEF(GCC5_RISCV64_ARCH) -mcmodel=medany -mabi=lp64
> 
> I think it should be GCC5_ RISCV_ASM_FLAGS, or it may affect other
> architect.
> 
> Thanks
> Zhiguang
> 
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner
> Chang
> Sent: Tuesday, April 21, 2020 10:00 AM
> To: devel@edk2.groups.io
> Cc: abner.chang@hpe.com; Gilbert Chen <gilbert.chen@hpe.com>; Daniel
> Helmut Schaefer <daniel.schaefer@hpe.com>; Leif Lindholm
> <leif.lindholm@linaro.org>; Feng, Bob C <bob.c.feng@intel.com>; Gao,
> Liming <liming.gao@intel.com>
> Subject: [edk2-devel] [PATCH v3 3/3] BaseTools: BaseTools changes for RISC-
> V platform.
> 
> Tools definitions template file changes for building EDK2 RISC-V platform.
> 
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
> Co-authored-by: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> 
> Cc: Bob Feng <bob.c.feng@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> ---
>  BaseTools/Conf/tools_def.template | 53
> +++++++++++++++++++++++++++++--
>  1 file changed, 51 insertions(+), 2 deletions(-)
> 
> diff --git a/BaseTools/Conf/tools_def.template
> b/BaseTools/Conf/tools_def.template
> index 88d7ab8cab..be09a2a8f7 100755
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -3,7 +3,7 @@
>  #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> 
>  #  Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
> 
>  #  Copyright (c) 2015, Hewlett-Packard Development Company, L.P.<BR>
> 
> -#  (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
> 
> +#  (C) Copyright 2020, Hewlett Packard Enterprise Development LP<BR>
> 
>  #  Copyright (c) Microsoft Corporation
> 
>  #
> 
>  #  SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> @@ -267,11 +267,12 @@ DEFINE DTC_BIN                 = ENV(DTC_PREFIX)dtc
>  #                               Intel(r) ACPI Compiler from
> 
>  #                               https://acpica.org/downloads
> 
>  #   GCC5        -Linux,Windows-  Requires:
> 
> -#                             GCC 5 with LTO support, targeting x86_64-linux-gnu,
> aarch64-linux-gnu, or arm-linux-gnueabi
> 
> +#                             GCC 5 with LTO support, targeting x86_64-linux-gnu,
> aarch64-linux-gnu, arm-linux-gnueabi or riscv64-linux-gnu
> 
>  #                        Optional:
> 
>  #                             Required to build platforms or ACPI tables:
> 
>  #                               Intel(r) ACPI Compiler from
> 
>  #                               https://acpica.org/downloads
> 
> +#
> 
>  #   CLANG35     -Linux,Windows-  Requires:
> 
>  #                             Clang v3.5 or later, and GNU binutils targeting aarch64-linux-
> gnu or arm-linux-gnueabi
> 
>  #                        Optional:
> 
> @@ -1946,6 +1947,7 @@ DEFINE GCC_IA32_RC_FLAGS           = -I binary -O
> elf32-i386          -B i386
>  DEFINE GCC_X64_RC_FLAGS            = -I binary -O elf64-x86-64        -B i386    --
> rename-section .data=.hii
> 
>  DEFINE GCC_ARM_RC_FLAGS            = -I binary -O elf32-littlearm     -B arm     --
> rename-section .data=.hii
> 
>  DEFINE GCC_AARCH64_RC_FLAGS        = -I binary -O elf64-littleaarch64 -B
> aarch64 --rename-section .data=.hii
> 
> +DEFINE GCC_RISCV64_RC_FLAGS        = -I binary -O elf64-littleriscv   -B riscv
> --rename-section .data=.hii
> 
> 
> 
>  # GCC Build Flag for included header file list generation
> 
>  DEFINE GCC_DEPS_FLAGS              = -MMD -MF $@.deps
> 
> @@ -2020,6 +2022,22 @@ DEFINE GCC5_ARM_ASLDLINK_FLAGS       =
> DEF(GCC49_ARM_ASLDLINK_FLAGS)
>  DEFINE GCC5_AARCH64_ASLDLINK_FLAGS   =
> DEF(GCC49_AARCH64_ASLDLINK_FLAGS)
> 
>  DEFINE GCC5_ASLCC_FLAGS              = DEF(GCC49_ASLCC_FLAGS) -fno-lto
> 
> 
> 
> +DEFINE GCC5_RISCV_ALL_CC_FLAGS                    = -g -fshort-wchar -fno-
> strict-aliasing -Wall -Werror -Wno-array-bounds -ffunction-sections -fdata-
> sections -include AutoGen.h -fno-common -
> DSTRING_ARRAY_NAME=$(BASE_NAME)Strings -msmall-data-limit=0
> 
> +DEFINE GCC5_RISCV_ALL_DLINK_COMMON                = -nostdlib -Wl,-n,-q,--
> gc-sections -z common-page-size=0x40
> 
> +DEFINE GCC5_RISCV_ALL_DLINK_FLAGS                 =
> DEF(GCC5_RISCV_ALL_DLINK_COMMON) -Wl,--
> entry,$(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Wl,-
> Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
> 
> +DEFINE GCC5_RISCV_ALL_DLINK2_FLAGS                = -Wl,--
> defsym=PECOFF_HEADER_SIZE=0x220,--
> script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
> 
> +DEFINE GCC5_RISCV_ALL_ASM_FLAGS                   = -c -x assembler -imacros
> $(DEST_DIR_DEBUG)/AutoGen.h
> 
> +DEFINE GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE    = -Wno-
> tautological-compare -Wno-pointer-compare
> 
> +
> 
> +DEFINE GCC5_RISCV_OPENSBI_TYPES                   = -
> DOPENSBI_EXTERNAL_SBI_TYPES=OpensbiTypes.h
> 
> +
> 
> +DEFINE GCC5_RISCV64_ARCH                   = rv64imafdc
> 
> +DEFINE GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS =
> DEF(GCC5_RISCV_ALL_DLINK_COMMON) -Wl,--entry,ReferenceAcpiTable -u
> ReferenceAcpiTable
> 
> +DEFINE GCC5_RISCV64_CC_FLAGS               =
> DEF(GCC5_RISCV_ALL_CC_FLAGS)
> DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE)
> DEF(GCC5_RISCV_OPENSBI_TYPES) -march=DEF(GCC5_RISCV64_ARCH) -fno-
> builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-
> asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8
> -mcmodel=medany -mabi=lp64 -mno-relax
> 
> +DEFINE GCC5_RISCV64_DLINK_FLAGS            =
> DEF(GCC5_RISCV_ALL_DLINK_FLAGS) -Wl,-melf64lriscv,--oformat=elf64-
> littleriscv,--no-relax
> 
> +DEFINE GCC5_RISCV64_DLINK2_FLAGS           =
> DEF(GCC5_RISCV_ALL_DLINK2_FLAGS)
> 
> +DEFINE GCC5_ASM_FLAGS                      = DEF(GCC5_RISCV_ALL_ASM_FLAGS)
> -march=DEF(GCC5_RISCV64_ARCH) -mcmodel=medany -mabi=lp64
> 
> +
> 
> 
> ##########################################################
> ##########################
> 
>  #
> 
>  # GCC 4.8 - This configuration is used to compile under Linux to produce
> 
> @@ -2464,6 +2482,37 @@ RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z
> common-page-size=0x20
>    NOOPT_GCC5_AARCH64_DLINK_FLAGS =
> DEF(GCC5_AARCH64_DLINK_FLAGS) -O0
> 
>    NOOPT_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20 -
> O0
> 
> 
> 
> +#########################################################
> ###########################
> 
> +#
> 
> +# GCC RISC-V This configuration is used to compile under Linux to produce
> 
> +#             PE/COFF binaries using GCC RISC-V tool chain
> 
> +#
> 
> +#########################################################
> ###########################
> 
> +
> 
> +##################
> 
> +# GCC5 RISCV64 definitions
> 
> +##################
> 
> +*_GCC5_RISCV64_OBJCOPY_PATH         =
> ENV(GCC5_RISCV64_PREFIX)objcopy
> 
> +*_GCC5_RISCV64_CC_PATH              = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_SLINK_PATH           = ENV(GCC5_RISCV64_PREFIX)gcc-ar
> 
> +*_GCC5_RISCV64_DLINK_PATH           = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_ASLDLINK_PATH        = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_ASM_PATH             = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_PP_PATH              = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_VFRPP_PATH           = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_ASLCC_PATH           = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_ASLPP_PATH           = ENV(GCC5_RISCV64_PREFIX)gcc
> 
> +*_GCC5_RISCV64_RC_PATH              = ENV(GCC5_RISCV64_PREFIX)objcopy
> 
> +
> 
> +*_GCC5_RISCV64_ASLCC_FLAGS          = DEF(GCC_ASLCC_FLAGS)
> 
> +*_GCC5_RISCV64_ASLDLINK_FLAGS       =
> DEF(GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS)
> 
> +*_GCC5_RISCV64_ASM_FLAGS            = DEF(GCC5_ASM_FLAGS)
> 
> +*_GCC5_RISCV64_CC_FLAGS             = DEF(GCC5_RISCV64_CC_FLAGS) -
> save-temps
> 
> +*_GCC5_RISCV64_DLINK_FLAGS          = DEF(GCC5_RISCV64_DLINK_FLAGS)
> 
> +*_GCC5_RISCV64_DLINK2_FLAGS         = DEF(GCC5_RISCV64_DLINK2_FLAGS)
> 
> +*_GCC5_RISCV64_RC_FLAGS             = DEF(GCC_RISCV64_RC_FLAGS)
> 
> +*_GCC5_RISCV64_OBJCOPY_FLAGS        =
> 
> +
> 
> 
> ##########################################################
> ##########################
> 
>  #
> 
>  # CLANG35   - This configuration is used to compile under Linux to produce
> 
> --
> 2.25.0
> 
> 
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      reply	other threads:[~2020-04-21  5:56 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-21  2:00 [PATCH v3 0/3] BaseTools changes for RISC-V edk2 port Abner Chang
2020-04-21  2:00 ` [PATCH v3 1/3] BaseTools: BaseTools changes for RISC-V platform Abner Chang
2020-04-21  2:00 ` [PATCH v3 2/3] " Abner Chang
2020-04-21  2:00 ` [PATCH v3 3/3] " Abner Chang
2020-04-21  5:28   ` [edk2-devel] " Zhiguang Liu
2020-04-21  5:56     ` Abner Chang [this message]

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