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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Add SiFive silicon EDK2 metafile and header files of SiFive RISC-V cores. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gilbert Chen --- Silicon/SiFive/Include/Library/SiFiveE51.h | 66 ++++++++++++++++++= ++++ Silicon/SiFive/Include/Library/SiFiveU54.h | 66 ++++++++++++++++++= ++++ .../SiFive/Include/Library/SiFiveU54MCCoreplex.h | 61 ++++++++++++++++++= ++ Silicon/SiFive/SiFive.dec | 45 +++++++++++++++ 4 files changed, 238 insertions(+) create mode 100644 Silicon/SiFive/Include/Library/SiFiveE51.h create mode 100644 Silicon/SiFive/Include/Library/SiFiveU54.h create mode 100644 Silicon/SiFive/Include/Library/SiFiveU54MCCoreplex.h create mode 100644 Silicon/SiFive/SiFive.dec diff --git a/Silicon/SiFive/Include/Library/SiFiveE51.h b/Silicon/SiFive/In= clude/Library/SiFiveE51.h new file mode 100644 index 0000000..96b1082 --- /dev/null +++ b/Silicon/SiFive/Include/Library/SiFiveE51.h @@ -0,0 +1,66 @@ +/** @file + SiFive E51 Core library definitions. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + This program and the accompanying materials are licensed and made availa= ble under + the terms and conditions of the BSD License that accompanies this distri= bution. + The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ +#ifndef __SIFIVE_E51_CORE_H__ +#define __SIFIVE_E51_CORE_H__ + +#include + +#include +#include + +/** + Function to build core specific information HOB. + + @param ParentProcessorGuid Parent processor od this core. ParentProc= essorGuid + could be the same as CoreGuid if one proc= essor has + only one core. + @param ParentProcessorUid Unique ID of pysical processor which owns= this core. + @param HartId Hart ID of this core. + @param IsBootHart TRUE means this is the boot HART. + @param GuidHobData Pointer to receive RISC_V_PROCESSOR_SPECI= FIC_DATA_HOB. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateE51CoreProcessorSpecificDataHob ( + IN EFI_GUID *ParentProcessorGuid, + IN UINTN ParentProcessorUid, + IN UINTN HartId, + IN BOOLEAN IsBootHart, + OUT RISC_V_PROCESSOR_SPECIFIC_DATA_HOB **GuidHobData + ); + +/** + Function to build processor related SMBIOS information. RISC-V SMBIOS DX= E driver collect + this information and build SMBIOS Type4 and Type7 record. + + @param ProcessorUid Unique ID of pysical processor which owns this c= ore. + @param SmbiosHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_= HOB. The pointers + maintained in this structure is only valid befor= e memory is discovered. + Access to those pointers after memory is install= ed will cause unexpected issues. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateE51ProcessorSmbiosDataHob ( + IN UINTN ProcessorUid, + OUT RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosHobPtr + ); + +#endif diff --git a/Silicon/SiFive/Include/Library/SiFiveU54.h b/Silicon/SiFive/In= clude/Library/SiFiveU54.h new file mode 100644 index 0000000..216b584 --- /dev/null +++ b/Silicon/SiFive/Include/Library/SiFiveU54.h @@ -0,0 +1,66 @@ +/** @file + SiFive U54 Core library definitions. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + This program and the accompanying materials are licensed and made availa= ble under + the terms and conditions of the BSD License that accompanies this distri= bution. + The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ +#ifndef __SIFIVE_U54_CORE_H__ +#define __SIFIVE_U54_CORE_H__ + +#include + +#include +#include + +/** + Function to build core specific information HOB. + + @param ParentProcessorGuid Parent processor od this core. ParentProc= essorGuid + could be the same as CoreGuid if one proc= essor has + only one core. + @param ParentProcessorUid Unique ID of pysical processor which owns= this core. + @param HartId Hart ID of this core. + @param IsBootHart TRUE means this is the boot HART. + @param GuidHobdata Pointer to RISC_V_PROCESSOR_SPECIFIC_DATA= _HOB. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateU54CoreProcessorSpecificDataHob ( + IN EFI_GUID *ParentProcessorGuid, + IN UINTN ParentProcessorUid, + IN UINTN HartId, + IN BOOLEAN IsBootHart, + OUT RISC_V_PROCESSOR_SPECIFIC_DATA_HOB **GuidHobdata + ); + +/** + Function to build processor related SMBIOS information. RISC-V SMBIOS DX= E driver collect + this information and build SMBIOS Type4 and Type7 record. + + @param ProcessorUid Unique ID of pysical processor which owns this c= ore. + @param SmbiosHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_= HOB. The pointers + maintained in this structure is only valid befor= e memory is discovered. + Access to those pointers after memory is install= ed will cause unexpected issues. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateU54ProcessorSmbiosDataHob ( + IN UINTN ProcessorUid, + IN RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosHobPtr + ); + +#endif diff --git a/Silicon/SiFive/Include/Library/SiFiveU54MCCoreplex.h b/Silicon= /SiFive/Include/Library/SiFiveU54MCCoreplex.h new file mode 100644 index 0000000..a9e42dc --- /dev/null +++ b/Silicon/SiFive/Include/Library/SiFiveU54MCCoreplex.h @@ -0,0 +1,61 @@ +/** @file + SiFive U54 Coreplex library definitions. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + This program and the accompanying materials are licensed and made availa= ble under + the terms and conditions of the BSD License that accompanies this distri= bution. + The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ +#ifndef __SIFIVE_U54MC_COREPLEX_CORE_H__ +#define __SIFIVE_U54MC_COREPLEX_CORE_H__ + +#include + +#include +#include + +#define SIFIVE_U54MC_COREPLEX_E51_HART_ID 0 +#define SIFIVE_U54MC_COREPLEX_U54_0_HART_ID 1 +#define SIFIVE_U54MC_COREPLEX_U54_1_HART_ID 2 +#define SIFIVE_U54MC_COREPLEX_U54_2_HART_ID 3 +#define SIFIVE_U54MC_COREPLEX_U54_3_HART_ID 4 + +/** + Build up U54MC coreplex processor core-specific information. + + @param UniqueId U54MC unique ID. + + @return EFI_STATUS + +**/ +EFI_STATUS +EFIAPI +CreateU54MCCoreplexProcessorSpecificDataHob ( + IN UINTN UniqueId + ); + +/** + Function to build processor related SMBIOS information. RISC-V SMBIOS DX= E driver collect + this information and build SMBIOS Type4 and Type7 record. + + @param ProcessorUid Unique ID of pysical processor which owns this c= ore. + @param SmbiosHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_= HOB. The pointers + maintained in this structure is only valid befor= e memory is discovered. + Access to those pointers after memory is install= ed will cause unexpected issues. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateU54MCProcessorSmbiosDataHob ( + IN UINTN ProcessorUid, + IN RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosHobPtr + ); +#endif diff --git a/Silicon/SiFive/SiFive.dec b/Silicon/SiFive/SiFive.dec new file mode 100644 index 0000000..149be76 --- /dev/null +++ b/Silicon/SiFive/SiFive.dec @@ -0,0 +1,45 @@ +## @file +# SiFive silicon package definitions +# +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may b= e found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + DEC_SPECIFICATION =3D 0x00010005 + PACKAGE_NAME =3D SiFiveSiliconPkg + PACKAGE_GUID =3D 576912B2-7077-4B78-A934-4C133FEB20BB + PACKAGE_VERSION =3D 1.0 + +[Includes] + Include # Root include for the package + +[LibraryClasses] + +[Guids] + gEfiSiFiveSiliconSpaceGuid =3D {0x5F3E9E15, 0x8FFC, 0x4F53, { 0x8E, 0x6= 4, 0x92, 0x0B, 0xA5, 0x39, 0x81, 0xB0 }} + +[Protocols] + +[PcdsFixedAtBuild] + # E51 Core GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveE51CoreGuid |{0xD4, 0x69, 0x54, 0x87= , 0x96, 0x96, 0x48, 0x7F, 0x9F, 0x57, 0xB6, 0xF1, 0xDE, 0x7D, 0x97, 0x42}|V= OID*|0x00001000 + # U54 Core GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveU54CoreGuid |{0x64, 0x70, 0xF6, 0x90= , 0x11, 0x59, 0x47, 0xF1, 0xB8, 0xD5, 0xCF, 0x89, 0x10, 0xC5, 0x30, 0x20}|V= OID*|0x00001001 + # U54 MC Coreplex GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveU54MCCoreplexGuid |{0x67, 0xBF, 0x15= , 0xD9, 0x7E, 0x4F, 0x48, 0x27, 0x87, 0x19, 0x79, 0x0B, 0xA6, 0x22, 0x7C, 0= xBE}|VOID*|0x00001002 + # U5 MC Coreplex GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveU5MCCoreplexGuid |{0x06, 0x38, 0x9F,= 0x33, 0xF9, 0xDB, 0x43, 0x13, 0x9A, 0x9B, 0x1C, 0x68, 0xD6, 0x04, 0xEA, 0x= FF}|VOID*|0x00001003 + +[PcdsDynamic, PcdsDynamicEx] + +[PcdsFeatureFlag] + -- 2.7.4