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charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Leif Lindholm > Sent: Friday, May 22, 2020 4:29 PM > To: Ard Biesheuvel > Cc: Wasim Khan (OSS) ; devel@edk2.groups.io; > Meenakshi Aggarwal ; Vabhav Sharma > ; Varun Sethi ; jon@solid- > run.com; Wasim Khan > Subject: Re: [PATCH edk2-platforms 00/16] Add PCIe Support >=20 > On Fri, May 22, 2020 at 11:46:07 +0200, Ard Biesheuvel wrote: > > On 5/22/20 1:02 AM, Wasim Khan wrote: > > > From: Wasim Khan > > > > > > Add PCIe Support for NXP Layerscape SoC which supports different > > > PCIe controllers. > > > Use generic PCIe drivers and wire up PciHostBridgeLib, PciSegmentLib > > > and PciCpuIo2Dxe driver for controller specific implementation. > > > > > > > Thanks. This is looking good. Please take a look at the feedback, and > > give others some time to respond as well. > > Thank you so much Ard for your review and comments.=20 I have incorporated all your comments and waiting to push the V2 once I clo= se on the some open items.=20 > > In the meantime, I think we can simply merge #14 and #16 right away > > (unless Leif has any objections) >=20 > (Looking at those two out of order.) > 16, sure. > 14 - is there any reason to do so before there is PCI to connect network = devices > through? >=20 > / > Leif >=20 > > > > > Wasim Khan (16): > > > Silicon/NXP/NxpQoriqLs.dec: Add PCIe related PCDs. > > > Silicon/NXP: LS1043A: Define PCIe related PCDs > > > Silicon/NXP: Implement PciHostBridgeLib support > > > Silicon/NXP: PciHostBridgeLib: CFG Shift feature support for PCIeL= S > > > Ctrl > > > Silicon/NXP: PciHostBridgeLib: Setup PCIe LsGen4 Controller and AT= U > > > Windows > > > Silicon/NXP: PciHostBridgeLib: add Workaround for A-011451 > > > Silicon/NXP: PciHostBridgeLib: Dump Layerscale Gen4 ATU windows > > > Silicon/NXP: PciHostBridgeLib: Dump Layerscale iATU windows > > > Silicon/NXP: Implement PciSegmentLib for PCIe Layerscape Controlle= r > > > Silicon/NXP: PciSegmentLib: Add ECAM config support for PCIe LS > > > Controller > > > Silicon/NXP: PciSegmentLib: Add support PCIe LsGen4 Controller > > > Silicon/NXP: PciSegmentLib: LsGen4Ctrl: Add Workaround for A-01126= 4 > > > Silicon/NXP/Drivers: Implement PciCpuIo2Dxe Driver > > > Platform/NXP: LS1043aRdbPkg: Enable NetworkPkg > > > Platform/NXP: LS1043aRdbPkg: Enable PCIE support > > > Platform/NXP: LS1043aRdbPkg : Increase fv image size > > > > > > Silicon/NXP/NxpQoriqLs.dec | 13 + > > > Silicon/NXP/LS1043A/LS1043A.dsc.inc | 8 + > > > Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 20 + > > > Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 20 +- > > > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 40 + > > > .../Library/PciHostBridgeLib/PciHostBridgeLib.inf | 45 ++ > > > .../NXP/Library/PciSegmentLib/PciSegmentLib.inf | 36 + > > > Silicon/NXP/Include/Pcie.h | 231 ++++++ > > > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 628 > +++++++++++++++ > > > .../Library/PciHostBridgeLib/PciHostBridgeLib.c | 842 > +++++++++++++++++++++ > > > Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c | 699 > +++++++++++++++++ > > > 11 files changed, 2579 insertions(+), 3 deletions(-) > > > create mode 100755 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.in= f > > > create mode 100644 > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf > > > create mode 100755 Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.= inf > > > create mode 100755 Silicon/NXP/Include/Pcie.h > > > create mode 100755 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c > > > create mode 100644 > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c > > > create mode 100755 > > > Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c > > > > >