* [PATCH] PCI : define macro for AHCI base address. @ 2018-01-08 11:20 Meenakshi Aggarwal 2018-01-08 6:01 ` Ni, Ruiyu 0 siblings, 1 reply; 3+ messages in thread From: Meenakshi Aggarwal @ 2018-01-08 11:20 UTC (permalink / raw) To: ard.biesheuvel, liming.gao, michael.d.kinney, edk2-devel Define PCI BAR 5 macro of AHCI Base address. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> --- MdePkg/Include/IndustryStandard/Pci22.h | 1 + 1 file changed, 1 insertion(+) diff --git a/MdePkg/Include/IndustryStandard/Pci22.h b/MdePkg/Include/IndustryStandard/Pci22.h index 96a7680..a63bb7c 100644 --- a/MdePkg/Include/IndustryStandard/Pci22.h +++ b/MdePkg/Include/IndustryStandard/Pci22.h @@ -533,6 +533,7 @@ typedef struct { #define PCI_HEADER_TYPE_OFFSET 0x0E #define PCI_BIST_OFFSET 0x0F #define PCI_BASE_ADDRESSREG_OFFSET 0x10 +#define PCI_AHCI_BASE_ADDRESS 0x24 #define PCI_CARDBUS_CIS_OFFSET 0x28 #define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id #define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C -- 1.9.1 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] PCI : define macro for AHCI base address. 2018-01-08 11:20 [PATCH] PCI : define macro for AHCI base address Meenakshi Aggarwal @ 2018-01-08 6:01 ` Ni, Ruiyu 2018-01-08 6:07 ` Meenakshi Aggarwal 0 siblings, 1 reply; 3+ messages in thread From: Ni, Ruiyu @ 2018-01-08 6:01 UTC (permalink / raw) To: Meenakshi Aggarwal, ard.biesheuvel@linaro.org, Gao, Liming, Kinney, Michael D, edk2-devel@lists.01.org Please do not put this AHCI specific macro in Pci22.h. I think only AtaAtapiPassThru driver needs to access the AHCI BAR, There seems no need to expose this definition to public. Thanks/Ray > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Meenakshi Aggarwal > Sent: Monday, January 8, 2018 7:21 PM > To: ard.biesheuvel@linaro.org; Gao, Liming <liming.gao@intel.com>; Kinney, > Michael D <michael.d.kinney@intel.com>; edk2-devel@lists.01.org > Subject: [edk2] [PATCH] PCI : define macro for AHCI base address. > > Define PCI BAR 5 macro of AHCI Base address. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> > --- > MdePkg/Include/IndustryStandard/Pci22.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/MdePkg/Include/IndustryStandard/Pci22.h > b/MdePkg/Include/IndustryStandard/Pci22.h > index 96a7680..a63bb7c 100644 > --- a/MdePkg/Include/IndustryStandard/Pci22.h > +++ b/MdePkg/Include/IndustryStandard/Pci22.h > @@ -533,6 +533,7 @@ typedef struct { > #define PCI_HEADER_TYPE_OFFSET 0x0E > #define PCI_BIST_OFFSET 0x0F > #define PCI_BASE_ADDRESSREG_OFFSET 0x10 > +#define PCI_AHCI_BASE_ADDRESS 0x24 > #define PCI_CARDBUS_CIS_OFFSET 0x28 > #define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id > #define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C > -- > 1.9.1 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] PCI : define macro for AHCI base address. 2018-01-08 6:01 ` Ni, Ruiyu @ 2018-01-08 6:07 ` Meenakshi Aggarwal 0 siblings, 0 replies; 3+ messages in thread From: Meenakshi Aggarwal @ 2018-01-08 6:07 UTC (permalink / raw) To: Ni, Ruiyu, ard.biesheuvel@linaro.org, Gao, Liming, Kinney, Michael D, edk2-devel@lists.01.org Thanks Ray for your comment. Yes, only AtaAtapiPassThru Driver will need this. Will take care of it. Thanks, Meenakshi > -----Original Message----- > From: Ni, Ruiyu [mailto:ruiyu.ni@intel.com] > Sent: Monday, January 08, 2018 11:32 AM > To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > ard.biesheuvel@linaro.org; Gao, Liming <liming.gao@intel.com>; Kinney, > Michael D <michael.d.kinney@intel.com>; edk2-devel@lists.01.org > Subject: RE: [edk2] [PATCH] PCI : define macro for AHCI base address. > > Please do not put this AHCI specific macro in Pci22.h. > I think only AtaAtapiPassThru driver needs to access the AHCI BAR, > There seems no need to expose this definition to public. > > Thanks/Ray > > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > > Meenakshi Aggarwal > > Sent: Monday, January 8, 2018 7:21 PM > > To: ard.biesheuvel@linaro.org; Gao, Liming <liming.gao@intel.com>; > Kinney, > > Michael D <michael.d.kinney@intel.com>; edk2-devel@lists.01.org > > Subject: [edk2] [PATCH] PCI : define macro for AHCI base address. > > > > Define PCI BAR 5 macro of AHCI Base address. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> > > --- > > MdePkg/Include/IndustryStandard/Pci22.h | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/MdePkg/Include/IndustryStandard/Pci22.h > > b/MdePkg/Include/IndustryStandard/Pci22.h > > index 96a7680..a63bb7c 100644 > > --- a/MdePkg/Include/IndustryStandard/Pci22.h > > +++ b/MdePkg/Include/IndustryStandard/Pci22.h > > @@ -533,6 +533,7 @@ typedef struct { > > #define PCI_HEADER_TYPE_OFFSET 0x0E > > #define PCI_BIST_OFFSET 0x0F > > #define PCI_BASE_ADDRESSREG_OFFSET 0x10 > > +#define PCI_AHCI_BASE_ADDRESS 0x24 > > #define PCI_CARDBUS_CIS_OFFSET 0x28 > > #define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id > > #define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C > > -- > > 1.9.1 > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist > s.01.org%2Fmailman%2Flistinfo%2Fedk2- > devel&data=02%7C01%7Cmeenakshi.aggarwal%40nxp.com%7C33c2199113d > 5420bad2808d5565d4ba6%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 > %7C636509881114358526&sdata=5GgVYhmdN%2BlORXpC7yM6Xmq5LMOAV > K2rPsGWgDdmUPA%3D&reserved=0 ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-01-08 6:02 UTC | newest] Thread overview: 3+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-01-08 11:20 [PATCH] PCI : define macro for AHCI base address Meenakshi Aggarwal 2018-01-08 6:01 ` Ni, Ruiyu 2018-01-08 6:07 ` Meenakshi Aggarwal
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