From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (EUR04-DB3-obe.outbound.protection.outlook.com [40.107.6.52]) by mx.groups.io with SMTP id smtpd.web10.422.1591379545796858661 for <devel@edk2.groups.io>; Fri, 05 Jun 2020 10:52:26 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nxp1.onmicrosoft.com header.s=selector2-nxp1-onmicrosoft-com header.b=Aw2DWr5g; spf=pass (domain: oss.nxp.com, ip: 40.107.6.52, mailfrom: pankaj.bansal@oss.nxp.com) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=hPwHfP9fBwDzUPhSI8JpqzzPQoCU0BfupAHVOSle+gqJ00U4KZGVD+esBswTBqalWxMFuZJzxteV+OZPNPu9uxU/HrW0h+SZHKalohL5Ih2ZC026s3XpcnzKd16ZTNdEbnAuRDxvPxzx3/36xO2v5LhzTFsBUaczXo9H6MMZ3BALZMPj6tHRYTtprjZjd5TBIsBiseozvA7MckoW/FDEC76sgKUz8NDKN5A41lNbKyyqO9adkcbygJWJTTlA7jHvXCFDORXbK2Tg6epkSpkqcLCKwrcmpDtD3rWLi+Regtec8I1Yh6+Z9TdE7ZiVNE+7jSufSxyiBDyw6xH/oraQSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=DX16lseYw6gccEiP/S3uJftB4xCxR8WgP1ihfR/J6fw=; b=XHnsNN39V5soEgesB49YcDA6DRBvfTKLnsK0JxvlSga6IPeaXNbLz1A/N2bASsmUOv4TSf+oKA/LaxNaE2TOEeHfkz3elvk8RbUCUqxo4qUU1dQzjXZ7uPl1qawlT5QbjKVNIIv47t8iJvE7ppHYcZOjiKc2++cJDCYU/QMaHn1dtvUqgP+J+PPOtl6HcNV3D1hVQDmPdCztcYRGchC8PybIA9Y6SNdde2LeWDerw+gPv3auwrxDjaHM9JDMyYWFI5FQBifzOraL+x7Lqfge1hGTG4klSWmOHLyLtnK3xDC94292PDQc3sh9gat9RecoZby5AShcS5XmOuoKAzppYw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector2-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=DX16lseYw6gccEiP/S3uJftB4xCxR8WgP1ihfR/J6fw=; b=Aw2DWr5g3eEsFMU5B+kcwjQRDrxx7z0RXtcoDV3CGnIODb7FGE2o3rqdMRMW3/oK8RqhLsuXZJTgnphZ8gZnwhO9srgNjSrsif/xtcQsb3oWA/mJt6Z7jJxFRtzdbDOeTwWTqYto6im5XUtyVXmf90kCfSXI+6oi3NIbxqEx+Z8= Received: from VI1PR04MB5933.eurprd04.prod.outlook.com (2603:10a6:803:ec::16) by VI1PR04MB5438.eurprd04.prod.outlook.com (2603:10a6:803:d3::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3066.22; Fri, 5 Jun 2020 17:18:54 +0000 Received: from VI1PR04MB5933.eurprd04.prod.outlook.com ([fe80::45c4:8846:5327:9513]) by VI1PR04MB5933.eurprd04.prod.outlook.com ([fe80::45c4:8846:5327:9513%7]) with mapi id 15.20.3066.018; Fri, 5 Jun 2020 17:18:54 +0000 From: "Pankaj Bansal" <pankaj.bansal@nxp.com> To: Leif Lindholm <leif@nuviainc.com>, "Pankaj Bansal (OSS)" <pankaj.bansal@oss.nxp.com> CC: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>, Michael D Kinney <michael.d.kinney@intel.com>, "devel@edk2.groups.io" <devel@edk2.groups.io>, Varun Sethi <V.Sethi@nxp.com>, Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>, Augustine Philips <Augustine.Philips@arm.com>, Ard Biesheuvel <ard.biesheuvel@linaro.org>, Arokia Samy <arokia.samy@puresoftware.com>, kuldip dwivedi <kuldip.dwivedi@puresoftware.com> Subject: Re: [PATCH edk2-platforms 1/5] Silicon/NXP/LS1043A: Fix the Platform PLL calculation Thread-Topic: [PATCH edk2-platforms 1/5] Silicon/NXP/LS1043A: Fix the Platform PLL calculation Thread-Index: AQHWO11jr3DfMO6520eO6npgvoDwpg== Date: Fri, 5 Jun 2020 17:18:54 +0000 Message-ID: <VI1PR04MB5933DEB90DE2D394A82D9891F1860@VI1PR04MB5933.eurprd04.prod.outlook.com> References: <20200602132503.27154-1-pankaj.bansal@oss.nxp.com> <20200602132503.27154-2-pankaj.bansal@oss.nxp.com> <20200605140028.GH28566@vanye> In-Reply-To: <20200605140028.GH28566@vanye> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: nuviainc.com; dkim=none (message not signed) header.d=none;nuviainc.com; dmarc=none action=none header.from=oss.nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [217.23.3.92] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 09bb66d0-2b78-4ede-85fb-08d80974863e x-ms-traffictypediagnostic: VI1PR04MB5438: x-ms-exchange-sharedmailbox-routingagent-processed: True x-ld-processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: <VI1PR04MB5438567C204EFEF3E7F15168B0860@VI1PR04MB5438.eurprd04.prod.outlook.com> x-ms-oob-tlc-oobclassifiers: OLM:8882; x-forefront-prvs: 0425A67DEF x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: VgSmr5PXNUsaA579hOsmZI/EcpoClAF4Sib53KfwdJjm/Eyo2ohKwTVvT0zBbk4TYeD4lB4XSPnCi6rDhIoZPqbHIKwW8/O5ytsXtbwUWM95T6wQywPz51KlG1fTbVI94DEEC+Z1ChPy0pLwomiPpPFJ3e5n1N+kcEaXWORLjqup6bTFBdM7aIek30Q8XCFbVL3csrnwmqC67cjcO75N1ks5nY3K9eIEdGY6zqIyr2A8UjpJ10xq0qTgZhcAPuYPf6ina7ZyaKt471r07zBqCA1wzbfdrBuUquIQsJt79/ERWJnJ2aON8Hv2nFB5Jwq/VyuukOGTLxZasV3RHIfx/Q== x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR04MB5933.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(4636009)(136003)(39860400002)(376002)(366004)(396003)(346002)(26005)(5660300002)(55236004)(8676002)(76116006)(2906002)(186003)(8936002)(6506007)(478600001)(53546011)(7696005)(19627235002)(33656002)(66476007)(66946007)(66446008)(86362001)(64756008)(66556008)(71200400001)(83380400001)(9686003)(4326008)(110136005)(316002)(52536014)(55016002)(54906003);DIR:OUT;SFP:1101; x-ms-exchange-antispam-messagedata: AYLJwzzCEA61loHjA/i3FG3wlVl3k4Lt7lwqFKFDRyGeyjn+VegOI6Sqhnjk80Bprg9xALgo7Z5TMdxIv/2V+wGqsrqkosMZApAlPkUNM8091MnK/eyyq478bY2FpqFSdPZ6GgnIh5f11Gt+jKYNEZ0CWL6utzrhEbnLqoUHCB60nz/N3ngczA9PAEdbPCG/ZQc27y8peKqqhyOaqebITo9yexxeKqVEr7Pd7j0GjcHcyGfC7cGSMg1XzJopirR8j5w7eDLxS52ZhbEJSohUkwsVfXvaBv72etQ+S8Y2xEbNb07hs4imQU+h/IhqGJpdgr8Dof7e6rbdAcpiwR3af5hxum5YHwxvQ0GzrfGJTa3gDBp51qHsDOA2LFMdKRvMNdm0hO1i5E1UP/8Y4B8qmXI6ydtjd6klYvewfwnEHPE79cVFwZIjMHWdlMZjggD/CXNgk6ZSuXhvCwArMc8xdwMLVVYP1dllJxZVUeqV970= MIME-Version: 1.0 X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 09bb66d0-2b78-4ede-85fb-08d80974863e X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Jun 2020 17:18:54.4966 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jJpcZy5yyiVnGU1FzSMNI8MqDkjeVCniJYEMTfQcHjGmALbOJmEmDl3Xpun/Cr0Gs2Br2+GGKRqy9MB/vHjGIg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5438 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > On Tue, Jun 02, 2020 at 18:54:59 +0530, Pankaj Bansal wrote: > > From: Pankaj Bansal <pankaj.bansal@nxp.com> > > > > for LS1043A SOC the DCFG registers are read in big endian format. > > However current Platofmr PLL calculation is being done assuing the >=20 > Platform? assuming yes. typo mistake. >=20 > > little endian format. > > > > Fix the Platform PLL calculation >=20 > OK, now I'm confused. > DCFG is read using the DcfgRead32 function, which is supposed to > handle the endianness issue. >=20 > Ls1043a builds with > gNxpQoriqLsTokenSpaceGuid.PcdDcfgBigEndian|TRUE > which means GetMmioOperations() returns the byte-swapping versions. >=20 > Please clarify. OK. so this might be little confusing, so bear with me. The reset configuration word (RCW) is 512 bits (1024 bits in LS2088 / LS216= 0) long and contains all necessary configuration information for the chip. RCW data is read from external memory (Nor flash or SD/eMMC card = or I2c eeprom) and written to the RCW status registers (RCWSR) contained in the Device Configuration and Pin Control module (DCSR)= , after which the device is configured as specified in the RCW. The PreBoot Loader (PBL) fetches RCW data from the source memory device and= writes it to the RCW status registers. Now the PBL fetches the data from flash in little endian format and writes = it to the DCSR registers in little endian format always. This steps is same for all SOCs (LX2160 / LS1043 / LS1046 / LS2088). Now in SOCs where DCSR space is big endian (LS1043 / LS1046), we read the R= CWSR registers in big endian fashion. This causes the bit position to be reversed. In SOCs where DCSR space is little endian (LS2088 / LX2160), we read the RC= WSR registers in little endian fashion. That is why the bit position is correct. >=20 > / > Leif >=20 > > Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> > > --- > > Silicon/NXP/LS1043A/Include/Soc.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/Silicon/NXP/LS1043A/Include/Soc.h > b/Silicon/NXP/LS1043A/Include/Soc.h > > index 97a77d3f5da6..afcd9da34cda 100644 > > --- a/Silicon/NXP/LS1043A/Include/Soc.h > > +++ b/Silicon/NXP/LS1043A/Include/Soc.h > > @@ -48,7 +48,7 @@ > > /** > > Reset Control Word (RCW) Bits > > **/ > > -#define SYS_PLL_RAT(x) (((x) & 0x7c) >> 2) // Bits 2-6 > > +#define SYS_PLL_RAT(x) (((x) >> 25) & 0x1f) // Bits 2-6 > > > > typedef NXP_LAYERSCAPE_CHASSIS2_DEVICE_CONFIG > LS1043A_DEVICE_CONFIG; > > > > -- > > 2.17.1 > >