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X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 Jul 2018 01:40:44 -0000 Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Update all references to the SMM PPIs from MdeModulePkg to rather use MdePkg's MM PPI declarations. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marvin Haeuser --- OvmfPkg/SmmAccess/SmmAccessPei.c | 90 ++++++++++---------- OvmfPkg/SmmAccess/SmramInternal.c | 8 +- OvmfPkg/SmmAccess/SmmAccessPei.inf | 2 +- 3 files changed, 50 insertions(+), 50 deletions(-) diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccess= Pei.c index 21119f80eefa..340122d6a598 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.c +++ b/OvmfPkg/SmmAccess/SmmAccessPei.c @@ -3,7 +3,7 @@ A PEIM with the following responsibilities: =20 - verify & configure the Q35 TSEG in the entry point, - - provide SMRAM access by producing PEI_SMM_ACCESS_PPI, + - provide MMRAM access by producing EFI_PEI_MM_ACCESS_PPI, - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and ex= pose it via the gEfiAcpiVariableGuid GUID HOB. =20 @@ -32,28 +32,28 @@ #include #include #include -#include +#include =20 #include =20 #include "SmramInternal.h" =20 // -// PEI_SMM_ACCESS_PPI implementation. +// EFI_PEI_MM_ACCESS_PPI implementation. // =20 /** - Opens the SMRAM area to be accessible by a PEIM driver. + Opens the MMRAM area to be accessible by a PEIM driver. =20 - This function "opens" SMRAM so that it is visible while not inside of SM= M. + This function "opens" MMRAM so that it is visible while not inside of MM= . The function should return EFI_UNSUPPORTED if the hardware does not supp= ort - hiding of SMRAM. The function should return EFI_DEVICE_ERROR if the SMRA= M + hiding of MMRAM. The function should return EFI_DEVICE_ERROR if the MMRA= M configuration is locked. =20 @param PeiServices General purpose services available to eve= ry PEIM. - @param This The pointer to the SMM Access Interface. - @param DescriptorIndex The region of SMRAM to Open. + @param This The pointer to the MM Access Interface. + @param DescriptorIndex The region of MMRAM to Open. =20 @retval EFI_SUCCESS The region was successfully opened. @retval EFI_DEVICE_ERROR The region could not be opened because lo= cked @@ -64,9 +64,9 @@ STATIC EFI_STATUS EFIAPI -SmmAccessPeiOpen ( +MmAccessPeiOpen ( IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, + IN EFI_PEI_MM_ACCESS_PPI *This, IN UINTN DescriptorIndex ) { @@ -82,16 +82,16 @@ SmmAccessPeiOpen ( } =20 /** - Inhibits access to the SMRAM. + Inhibits access to the MMRAM. =20 - This function "closes" SMRAM so that it is not visible while outside of = SMM. + This function "closes" MMRAM so that it is not visible while outside of = MM. The function should return EFI_UNSUPPORTED if the hardware does not supp= ort - hiding of SMRAM. + hiding of MMRAM. =20 @param PeiServices General purpose services available to e= very PEIM. - @param This The pointer to the SMM Access Interface= . - @param DescriptorIndex The region of SMRAM to Close. + @param This The pointer to the MM Access Interface. + @param DescriptorIndex The region of MMRAM to Close. =20 @retval EFI_SUCCESS The region was successfully closed. @retval EFI_DEVICE_ERROR The region could not be closed because @@ -102,9 +102,9 @@ SmmAccessPeiOpen ( STATIC EFI_STATUS EFIAPI -SmmAccessPeiClose ( +MmAccessPeiClose ( IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, + IN EFI_PEI_MM_ACCESS_PPI *This, IN UINTN DescriptorIndex ) { @@ -120,15 +120,15 @@ SmmAccessPeiClose ( } =20 /** - Inhibits access to the SMRAM. + Inhibits access to the MMRAM. =20 - This function prohibits access to the SMRAM region. This function is us= ually + This function prohibits access to the MMRAM region. This function is us= ually implemented such that it is a write-once operation. =20 @param PeiServices General purpose services available to e= very PEIM. - @param This The pointer to the SMM Access Interface= . - @param DescriptorIndex The region of SMRAM to Close. + @param This The pointer to the MM Access Interface. + @param DescriptorIndex The region of MMRAM to Close. =20 @retval EFI_SUCCESS The region was successfully locked. @retval EFI_DEVICE_ERROR The region could not be locked because at @@ -139,9 +139,9 @@ SmmAccessPeiClose ( STATIC EFI_STATUS EFIAPI -SmmAccessPeiLock ( +MmAccessPeiLock ( IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, + IN EFI_PEI_MM_ACCESS_PPI *This, IN UINTN DescriptorIndex ) { @@ -158,11 +158,11 @@ SmmAccessPeiLock ( =20 /** Queries the memory controller for the possible regions that will support - SMRAM. + MMRAM. =20 @param PeiServices General purpose services available to ever= y PEIM. - @param This The pointer to the SmmAccessPpi Interface. + @param This The pointer to the MmAccessPpi Interface. @param SmramMapSize The pointer to the variable containing siz= e of the buffer to contain the description information. @@ -176,11 +176,11 @@ SmmAccessPeiLock ( STATIC EFI_STATUS EFIAPI -SmmAccessPeiGetCapabilities ( +MmAccessPeiGetCapabilities ( IN EFI_PEI_SERVICES **PeiServices, - IN PEI_SMM_ACCESS_PPI *This, + IN EFI_PEI_MM_ACCESS_PPI *This, IN OUT UINTN *SmramMapSize, - IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap + IN OUT EFI_MMRAM_DESCRIPTOR *SmramMap ) { return SmramAccessGetCapabilities (This->LockState, This->OpenState, @@ -190,18 +190,18 @@ SmmAccessPeiGetCapabilities ( // // LockState and OpenState will be filled in by the entry point. // -STATIC PEI_SMM_ACCESS_PPI mAccess =3D { - &SmmAccessPeiOpen, - &SmmAccessPeiClose, - &SmmAccessPeiLock, - &SmmAccessPeiGetCapabilities +STATIC EFI_PEI_MM_ACCESS_PPI mAccess =3D { + &MmAccessPeiOpen, + &MmAccessPeiClose, + &MmAccessPeiLock, + &MmAccessPeiGetCapabilities }; =20 =20 STATIC EFI_PEI_PPI_DESCRIPTOR mPpiList[] =3D { { EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, - &gPeiSmmAccessPpiGuid, &mAccess + &gEfiPeiMmAccessPpiGuid, &mAccess } }; =20 @@ -255,7 +255,7 @@ SmmAccessPeiEntryPoint ( VOID *GuidHob; =20 // - // This module should only be included if SMRAM support is required. + // This module should only be included if MMRAM support is required. // ASSERT (FeaturePcdGet (PcdSmmSmramRequire)); =20 @@ -264,14 +264,14 @@ SmmAccessPeiEntryPoint ( // HostBridgeDevId =3D PciRead16 (OVMF_HOSTBRIDGE_DID); if (HostBridgeDevId !=3D INTEL_Q35_MCH_DEVICE_ID) { - DEBUG ((EFI_D_ERROR, "%a: no SMRAM with host bridge DID=3D0x%04x; only= " + DEBUG ((EFI_D_ERROR, "%a: no MMRAM with host bridge DID=3D0x%04x; only= " "DID=3D0x%04x (Q35) is supported\n", __FUNCTION__, HostBridgeDevId, INTEL_Q35_MCH_DEVICE_ID)); goto WrongConfig; } =20 // - // Confirm if QEMU supports SMRAM. + // Confirm if QEMU supports MMRAM. // // With no support for it, the ESMRAMC (Extended System Management RAM // Control) register reads as zero. If there is support, the cache-enabl= e @@ -280,7 +280,7 @@ SmmAccessPeiEntryPoint ( EsmramcVal =3D PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)); RegMask8 =3D MCH_ESMRAMC_SM_CACHE | MCH_ESMRAMC_SM_L1 | MCH_ESMRAMC_SM_L= 2; if ((EsmramcVal & RegMask8) !=3D RegMask8) { - DEBUG ((EFI_D_ERROR, "%a: this Q35 implementation lacks SMRAM\n", + DEBUG ((EFI_D_ERROR, "%a: this Q35 implementation lacks MMRAM\n", __FUNCTION__)); goto WrongConfig; } @@ -323,27 +323,27 @@ SmmAccessPeiEntryPoint ( (TopOfLowRamMb - mQ35TsegMbytes) << MCH_TSEGMB_MB_SHIFT); =20 // - // Set TSEG size, and disable TSEG visibility outside of SMM. Note that = the + // Set TSEG size, and disable TSEG visibility outside of MM. Note that t= he // T_EN bit has inverse meaning; when T_EN is set, then TSEG visibility = is - // *restricted* to SMM. + // *restricted* to MM. // EsmramcVal &=3D ~(UINT32)MCH_ESMRAMC_TSEG_MASK; EsmramcVal |=3D mQ35TsegMbytes =3D=3D 8 ? MCH_ESMRAMC_TSEG_8MB : mQ35TsegMbytes =3D=3D 2 ? MCH_ESMRAMC_TSEG_2MB : mQ35TsegMbytes =3D=3D 1 ? MCH_ESMRAMC_TSEG_1MB : - MCH_ESMRAMC_TSEG_EXT; - EsmramcVal |=3D MCH_ESMRAMC_T_EN; + MCH_EMMRAMC_TSEG_EXT; + EsmramcVal |=3D MCH_EMMRAMC_T_EN; PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal); =20 // // TSEG should be closed (see above), but unlocked, initially. Set G_SMR= AME - // (Global SMRAM Enable) too, as both D_LCK and T_EN depend on it. + // (Global MMRAM Enable) too, as both D_LCK and T_EN depend on it. // PciAndThenOr8 (DRAMC_REGISTER_Q35 (MCH_SMRAM), (UINT8)((~(UINT32)MCH_SMRAM_D_LCK) & 0xff), MCH_SMRAM_G_SMRAME); =20 // - // Create the GUID HOB and point it to the first SMRAM range. + // Create the GUID HOB and point it to the first MMRAM range. // GetStates (&mAccess.LockState, &mAccess.OpenState); SmramMapSize =3D sizeof SmramMap; @@ -357,7 +357,7 @@ SmmAccessPeiEntryPoint ( UINTN Idx; =20 Count =3D SmramMapSize / sizeof SmramMap[0]; - DEBUG ((EFI_D_VERBOSE, "%a: SMRAM map follows, %d entries\n", __FUNCTI= ON__, + DEBUG ((EFI_D_VERBOSE, "%a: MMRAM map follows, %d entries\n", __FUNCTI= ON__, (INT32)Count)); DEBUG ((EFI_D_VERBOSE, "% 20a % 20a % 20a % 20a\n", "PhysicalStart(0x)= ", "PhysicalSize(0x)", "CpuStart(0x)", "RegionState(0x)")); diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInt= ernal.c index 18c42d29042d..3b33d2763b4d 100644 --- a/OvmfPkg/SmmAccess/SmramInternal.c +++ b/OvmfPkg/SmmAccess/SmramInternal.c @@ -40,10 +40,10 @@ InitQ35TsegMbytes ( =20 /** Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and - OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL ob= ject, + OpenState fields in the EFI_PEI_MM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL= object, from the D_LCK and T_EN bits. =20 - PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member functions can rel= y on + EFI_PEI_MM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member functions can = rely on the LockState and OpenState fields being up-to-date on entry, and they n= eed to restore the same invariant on exit, if they touch the bits in questio= n. =20 @@ -68,13 +68,13 @@ GetStates ( } =20 // -// The functions below follow the PEI_SMM_ACCESS_PPI and +// The functions below follow the EFI_PEI_MM_ACCESS_PPI and // EFI_SMM_ACCESS2_PROTOCOL member declarations. The PeiServices and This // pointers are removed (TSEG doesn't depend on them), and so is the // DescriptorIndex parameter (TSEG doesn't support range-wise locking). // // The LockState and OpenState members that are common to both -// PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL are taken and updated i= n +// EFI_PEI_MM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL are taken and update= d in // isolation from the rest of the (non-shared) members. // =20 diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAcce= ssPei.inf index 09f3b63446df..7360b2f5391e 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.inf +++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf @@ -63,7 +63,7 @@ [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes =20 [Ppis] - gPeiSmmAccessPpiGuid ## PRODUCES + gEfiPeiMmAccessPpiGuid ## PRODUCES =20 [Depex] gEfiPeiMemoryDiscoveredPpiGuid --=20 2.18.0.windows.1