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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Aug 2022 13:11:06.4316 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2a291076-bfe5-4981-6ede-08da7551a00c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT026.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB4647 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable A quick compare against the SMBIOS 3.6.0. Looks good! Thanks for adding thi= s. Reviewed-By: Samer El-Haj-Mahmoud > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Sainadh > Nagolu via groups.io > Sent: Wednesday, August 3, 2022 12:52 AM > To: devel@edk2.groups.io; Sainadh Nagolu > Cc: Sundaresan S ; Vasudevan Sambandan > ; gaoliming@byosoft.com.cn > Subject: [edk2-devel] [PATCH] Add support for SMBIOS Spec 3.6.0 to SmBios= .h >=20 > Updated SmBios.h with new fields added as part of SMBIOS 3.6.0 spec updat= e. >=20 > Signed-off-by: Sainadh Nagolu >=20 > CC: Vasudevan Sambandan > CC: Sundaresan S >=20 > --- > MdePkg/Include/IndustryStandard/SmBios.h | 88 ++++++++++++++++-------- > 1 file changed, 61 insertions(+), 27 deletions(-) >=20 > diff --git a/MdePkg/Include/IndustryStandard/SmBios.h > b/MdePkg/Include/IndustryStandard/SmBios.h > index c7a4971f14..3b296ab308 100644 > --- a/MdePkg/Include/IndustryStandard/SmBios.h > +++ b/MdePkg/Include/IndustryStandard/SmBios.h > @@ -1,5 +1,5 @@ > /** @file >=20 > - Industry Standard Definitions of SMBIOS Table Specification v3.5.0. >=20 > + Industry Standard Definitions of SMBIOS Table Specification v3.6.0. >=20 >=20 >=20 > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
>=20 > (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
>=20 > @@ -722,21 +722,39 @@ typedef enum { > /// Processor Information2 - Processor Family2. >=20 > /// >=20 > typedef enum { >=20 > - ProcessorFamilyARMv7 =3D 0x0100, >=20 > - ProcessorFamilyARMv8 =3D 0x0101, >=20 > - ProcessorFamilySH3 =3D 0x0104, >=20 > - ProcessorFamilySH4 =3D 0x0105, >=20 > - ProcessorFamilyARM =3D 0x0118, >=20 > - ProcessorFamilyStrongARM =3D 0x0119, >=20 > - ProcessorFamily6x86 =3D 0x012C, >=20 > - ProcessorFamilyMediaGX =3D 0x012D, >=20 > - ProcessorFamilyMII =3D 0x012E, >=20 > - ProcessorFamilyWinChip =3D 0x0140, >=20 > - ProcessorFamilyDSP =3D 0x015E, >=20 > - ProcessorFamilyVideoProcessor =3D 0x01F4, >=20 > - ProcessorFamilyRiscvRV32 =3D 0x0200, >=20 > - ProcessorFamilyRiscVRV64 =3D 0x0201, >=20 > - ProcessorFamilyRiscVRV128 =3D 0x0202 >=20 > + ProcessorFamilyARMv7 =3D 0x0100, >=20 > + ProcessorFamilyARMv8 =3D 0x0101, >=20 > + ProcessorFamilyARMv9 =3D 0x0102, >=20 > + ProcessorFamilySH3 =3D 0x0104, >=20 > + ProcessorFamilySH4 =3D 0x0105, >=20 > + ProcessorFamilyARM =3D 0x0118, >=20 > + ProcessorFamilyStrongARM =3D 0x0119, >=20 > + ProcessorFamily6x86 =3D 0x012C, >=20 > + ProcessorFamilyMediaGX =3D 0x012D, >=20 > + ProcessorFamilyMII =3D 0x012E, >=20 > + ProcessorFamilyWinChip =3D 0x0140, >=20 > + ProcessorFamilyDSP =3D 0x015E, >=20 > + ProcessorFamilyVideoProcessor =3D 0x01F4, >=20 > + ProcessorFamilyRiscvRV32 =3D 0x0200, >=20 > + ProcessorFamilyRiscVRV64 =3D 0x0201, >=20 > + ProcessorFamilyRiscVRV128 =3D 0x0202, >=20 > + ProcessorFamilyLoongArch =3D 0x0258, >=20 > + ProcessorFamilyLoongson1 =3D 0x0259, >=20 > + ProcessorFamilyLoongson2 =3D 0x025A, >=20 > + ProcessorFamilyLoongson3 =3D 0x025B, >=20 > + ProcessorFamilyLoongson2K =3D 0x025C, >=20 > + ProcessorFamilyLoongson3A =3D 0x025D, >=20 > + ProcessorFamilyLoongson3B =3D 0x025E, >=20 > + ProcessorFamilyLoongson3C =3D 0x025F, >=20 > + ProcessorFamilyLoongson3D =3D 0x0260, >=20 > + ProcessorFamilyLoongson3E =3D 0x0261, >=20 > + ProcessorFamilyDualCoreLoongson2K =3D 0x0262, >=20 > + ProcessorFamilyQuadCoreLoongson3A =3D 0x026C, >=20 > + ProcessorFamilyMultiCoreLoongson3A =3D 0x026D, >=20 > + ProcessorFamilyQuadCoreLoongson3B =3D 0x026E, >=20 > + ProcessorFamilyMultiCoreLoongson3B =3D 0x026F, >=20 > + ProcessorFamilyMultiCoreLoongson3C =3D 0x0270, >=20 > + ProcessorFamilyMultiCoreLoongson3D =3D 0x0271 >=20 > } PROCESSOR_FAMILY2_DATA; >=20 >=20 >=20 > /// >=20 > @@ -817,7 +835,16 @@ typedef enum { > ProcessorUpgradeSocketBGA1528 =3D 0x3C, >=20 > ProcessorUpgradeSocketLGA4189 =3D 0x3D, >=20 > ProcessorUpgradeSocketLGA1200 =3D 0x3E, >=20 > - ProcessorUpgradeSocketLGA4677 =3D 0x3F >=20 > + ProcessorUpgradeSocketLGA4677 =3D 0x3F, >=20 > + ProcessorUpgradeSocketLGA1700 =3D 0x40, >=20 > + ProcessorUpgradeSocketBGA1744 =3D 0x41, >=20 > + ProcessorUpgradeSocketBGA1781 =3D 0x42, >=20 > + ProcessorUpgradeSocketBGA1211 =3D 0x43, >=20 > + ProcessorUpgradeSocketBGA2422 =3D 0x44, >=20 > + ProcessorUpgradeSocketLGA1211 =3D 0x45, >=20 > + ProcessorUpgradeSocketLGA2422 =3D 0x46, >=20 > + ProcessorUpgradeSocketLGA5773 =3D 0x47, >=20 > + ProcessorUpgradeSocketBGA5773 =3D 0x48 >=20 > } PROCESSOR_UPGRADE; >=20 >=20 >=20 > /// >=20 > @@ -946,6 +973,10 @@ typedef struct { > UINT16 CoreCount2; >=20 > UINT16 EnabledCoreCount2; >=20 > UINT16 ThreadCount2; >=20 > + // >=20 > + // Add for smbios 3.6 >=20 > + // >=20 > + UINT16 ThreadEnabled; >=20 > } SMBIOS_TABLE_TYPE4; >=20 >=20 >=20 > /// >=20 > @@ -1811,7 +1842,8 @@ typedef enum { > MemoryTypeHBM =3D 0x20, >=20 > MemoryTypeHBM2 =3D 0x21, >=20 > MemoryTypeDdr5 =3D 0x22, >=20 > - MemoryTypeLpddr5 =3D 0x23 >=20 > + MemoryTypeLpddr5 =3D 0x23, >=20 > + MemoryTypeHBM3 =3D 0x24 >=20 > } MEMORY_DEVICE_TYPE; >=20 >=20 >=20 > /// >=20 > @@ -2660,15 +2692,17 @@ typedef struct { > /// Processor Specific Block - Processor Architecture Type >=20 > /// >=20 > typedef enum { >=20 > - ProcessorSpecificBlockArchTypeReserved =3D 0x00, >=20 > - ProcessorSpecificBlockArchTypeIa32 =3D 0x01, >=20 > - ProcessorSpecificBlockArchTypeX64 =3D 0x02, >=20 > - ProcessorSpecificBlockArchTypeItanium =3D 0x03, >=20 > - ProcessorSpecificBlockArchTypeAarch32 =3D 0x04, >=20 > - ProcessorSpecificBlockArchTypeAarch64 =3D 0x05, >=20 > - ProcessorSpecificBlockArchTypeRiscVRV32 =3D 0x06, >=20 > - ProcessorSpecificBlockArchTypeRiscVRV64 =3D 0x07, >=20 > - ProcessorSpecificBlockArchTypeRiscVRV128 =3D 0x08 >=20 > + ProcessorSpecificBlockArchTypeReserved =3D 0x00, >=20 > + ProcessorSpecificBlockArchTypeIa32 =3D 0x01, >=20 > + ProcessorSpecificBlockArchTypeX64 =3D 0x02, >=20 > + ProcessorSpecificBlockArchTypeItanium =3D 0x03, >=20 > + ProcessorSpecificBlockArchTypeAarch32 =3D 0x04, >=20 > + ProcessorSpecificBlockArchTypeAarch64 =3D 0x05, >=20 > + ProcessorSpecificBlockArchTypeRiscVRV32 =3D 0x06, >=20 > + ProcessorSpecificBlockArchTypeRiscVRV64 =3D 0x07, >=20 > + ProcessorSpecificBlockArchTypeRiscVRV128 =3D 0x08, >=20 > + ProcessorSpecificBlockArchTypeLoongArch32 =3D 0x09, >=20 > + ProcessorSpecificBlockArchTypeLoongArch64 =3D 0x0A >=20 > } PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE; 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