From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by mx.groups.io with SMTP id smtpd.web10.98618.1671010763274360757 for ; Wed, 14 Dec 2022 01:39:23 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=mevDoxz3; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: quicinc.com, ip: 205.220.180.131, mailfrom: quic_llindhol@quicinc.com) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BE6rHpU009500; Wed, 14 Dec 2022 09:38:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=date : from : to : cc : subject : message-id : references : mime-version : content-type : in-reply-to; s=qcppdkim1; bh=0mWlbU8bnVmsfBY9t+9cpflBLQzVFqjbLotiKqmGPZc=; b=mevDoxz3LzO0WDoZcmXiTBVkXt6+jGYCpaUSDsk3ykhW0wRdJYxMi9NYYoX4Ox/sqpTL csm974n++0wqaY6R7/1/P08GbJr3z9+DTg721aD/4FbpYbr6me6UzynbBDBBVAoKULKo 0zJk4xDYb3qrf5PIM5GskmX9+xl47LFAs8m2KezuzgPqzr0A74ds4rQ1DxMMvqyuju2a cfU+5wmZVvemusIyO58P7Yn93V1p2wzYNmGhWl8WbswHkHtS4DRJJPsWHNYPMP/D6gsT 0JSV+M75KoQ1rP0GCXP0buGhp+sf7yG3nTkydTvcRAXjkay5td1RmKILiFpCxfiZ1Kf7 cg== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mf6rvrjyv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 14 Dec 2022 09:38:49 +0000 Received: from nasanex01c.na.qualcomm.com (corens_vlan604_snip.qualcomm.com [10.53.140.1]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BE9clhB028768 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 14 Dec 2022 09:38:47 GMT Received: from qc-i7.hemma.eciton.net (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 14 Dec 2022 01:38:44 -0800 Date: Wed, 14 Dec 2022 09:38:41 +0000 From: "Leif Lindholm" To: "Ni, Ray" CC: Sunil V L , "devel@edk2.groups.io" , "Wang, Jian J" , "Gao, Liming" , "Dong, Eric" , "Kumar, Rahul R" , "De, Debkumar" , "West, Catharine" , Daniel Schaefer , Abner Chang , Andrew Fish , Ard Biesheuvel , Heinrich Schuchardt , Anup Patel Subject: Re: [edk2-devel] [RFC PATCH V2 10/19] UefiCpuPkg: Add RISC-V support in DxeCpuExceptionHandlerLib Message-ID: References: <20220907113626.540065-1-sunilvl@ventanamicro.com> <20220907113626.540065-11-sunilvl@ventanamicro.com> MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8VeTu-yRbPoZTwiBaUtNbbFR2jy50WYY X-Proofpoint-ORIG-GUID: 8VeTu-yRbPoZTwiBaUtNbbFR2jy50WYY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-14_03,2022-12-13_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 impostorscore=0 spamscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 suspectscore=0 phishscore=0 clxscore=1011 lowpriorityscore=0 mlxlogscore=922 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212140075 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline Hi Ray, Should we then consider renaming DxeCpuExceptionHandlerLib DxeCpuExceptionHandlerLibIA32X64? Best Regards, Leif On Thu, Dec 08, 2022 at 08:32:31 +0000, Ni, Ray wrote: > Yes. I am not sure if the preference for modules in other packages. > But for code in UefiCpuPkg, I don't prefer this way. > > Thanks, > Ray > > > -----Original Message----- > > From: Sunil V L > > Sent: Thursday, December 8, 2022 12:58 PM > > To: devel@edk2.groups.io; Ni, Ray > > Cc: Wang, Jian J ; Gao, Liming > > ; Dong, Eric ; Kumar, > > Rahul R ; De, Debkumar > > ; West, Catharine ; > > Daniel Schaefer ; Abner Chang > > ; Leif Lindholm ; > > Andrew Fish ; Ard Biesheuvel ; > > Heinrich Schuchardt ; Anup Patel > > > > Subject: Re: [edk2-devel] [RFC PATCH V2 10/19] UefiCpuPkg: Add RISC-V > > support in DxeCpuExceptionHandlerLib > > > > On Thu, Dec 08, 2022 at 12:30:04AM +0000, Ni, Ray wrote: > > > Sunil, > > > Is there any source code sharing between Risc-V and IA32X64? > > > From the patch, I cannot see any. > > > If that's the case, I would prefer we don't mix the two separate > > implementations together into one component. > > > Can you please create a new CpuExceptionHandlerLib instance for Risc-V > > instead of including the Risc-V sources into the existing INF? > > > > > Thank you very much Ray. Sure. That approach is also fine with me. > > > > BTW, https://edk2.groups.io/g/devel/message/95726 was the latest series. > > Sorry for the confusion. Let me update this series and send new version. > > I think your input is valid for other modules also like TimerLib. > > > > Thanks > > Sunil