From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f175.google.com (mail-pg1-f175.google.com [209.85.215.175]) by mx.groups.io with SMTP id smtpd.web10.64569.1673241750819590241 for ; Sun, 08 Jan 2023 21:22:30 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=GUOzKP5L; spf=pass (domain: ventanamicro.com, ip: 209.85.215.175, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pg1-f175.google.com with SMTP id 7so5140548pga.1 for ; Sun, 08 Jan 2023 21:22:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=pE5gKyZA9k7tA3zyh5yL3uvsNrdHa/juAunvMD83/a4=; b=GUOzKP5LXRj6NObSxSr3I+8HqLRY94xuaoWjGmvO8gc+1Gf1Bi0Km6BUXJTJaBQ00R mgUPQszdsv7hcY+PmpZTl9QQYJsQTaz/NCjIHuGuScbH1ECkZ4NfKcQAiJr8+TvJWnu1 d7+EUpO3gzW7egCWYMS6e21sv4hrOrhM9fx+BVyZaAHgbuq1KX9JUNRjfPHv+QtsKvJv OtskpLZmPGgqDaVEsR6DibrQosGJxPUDoRXVcIKYaiiXq3IH1hXWvEq6POUKX+fAYZct Oz4fZ8YNv9L+hcSW/ADBxeFrOcoZYSIxIZ6RfT0//o1Q8+MGeJysKA0Lyb6eUw1+L1zw nyVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=pE5gKyZA9k7tA3zyh5yL3uvsNrdHa/juAunvMD83/a4=; b=kq8Pzp1uNw/Q1SBH8PuV4tQesSmNktJI1VZzWTgavskQnOfb0ZD965seeqT7wFYHj9 BKqiaD1NddrV5Qn3HWto2LzmKwf4UyHrPhXhFOXLNnxmQ0mwtQjxLR38RuI92m/m7AyP HIBRcU/ybt7GRmKRXSaasHAwrREJeFvmY16MpI9E1tj+c6LQJB+NgXzpqtFW9ED6aa1a zizfqn/HLls/q4mhTEo0S1JahcNb1ad2+NcbJrXVswt8FLKmBmuAdB/vtFYRDaoNzZS4 DVAb6Rbs23oPwpQlnegF9C8SoGHMA9aw0LxvXxv66wahe8sjbuRhkgksqVof1nZnZ2Qf cNCQ== X-Gm-Message-State: AFqh2kpZwLg88NkH4sZSTBjCHMyTgtGH7i2Jd515wTLwRoMwDv8qAia5 AMHSQgl7A/Dr9jixqTY88bM7lw== X-Google-Smtp-Source: AMrXdXvRBI8LVOEznKhbZpgWUdoY32gagNn9DxRXcjquHJkWr8hMfja2s39SdZmPK9hRXdxgJmhVhg== X-Received: by 2002:a05:6a00:1d23:b0:57f:faa9:2de with SMTP id a35-20020a056a001d2300b0057ffaa902demr58681849pfx.27.1673241750111; Sun, 08 Jan 2023 21:22:30 -0800 (PST) Return-Path: Received: from sunil-laptop ([49.206.11.246]) by smtp.gmail.com with ESMTPSA id q14-20020aa7960e000000b005817969c0a2sm5055581pfg.75.2023.01.08.21.22.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 21:22:29 -0800 (PST) Date: Mon, 9 Jan 2023 10:52:23 +0530 From: "Sunil V L" To: "Chang, Abner" Cc: Ard Biesheuvel , "devel@edk2.groups.io" , "quic_llindhol@quicinc.com" , "rebecca@quicinc.com" , "bob.c.feng@intel.com" , "gaoliming@byosoft.com.cn" Subject: Re: [PATCH 1/4] BaseTools/tools_def RISCV: Make OpenSBI references RISCV-only Message-ID: References: <20230105160503.1423627-1-ardb@kernel.org> <20230105160503.1423627-2-ardb@kernel.org> MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Ard, Thank you very much for finding this issue and fixing it. Reviewed-by: Sunil V L On Thu, Jan 05, 2023 at 04:09:46PM +0000, Chang, Abner wrote: > [AMD Official Use Only - General] > > Acked-by: Abner Chang > > Add Sunil to review this. > > > -----Original Message----- > > From: Ard Biesheuvel > > Sent: Friday, January 6, 2023 12:05 AM > > To: devel@edk2.groups.io > > Cc: quic_llindhol@quicinc.com; rebecca@quicinc.com; bob.c.feng@intel.com; > > gaoliming@byosoft.com.cn; Ard Biesheuvel ; Chang, > > Abner > > Subject: [PATCH 1/4] BaseTools/tools_def RISCV: Make OpenSBI references > > RISCV-only > > > > Caution: This message originated from an External Source. Use proper > > caution when opening attachments, clicking links, or responding. > > > > > > The global GCC_PP_FLAGS tools_def variable now contains a reference to > > OpenSBI specific C preprocessor variables, which means they are added to > > the command line on every architecture, not just RISC-V. > > > > This does not currently result in any issues, but it is a bit sloppy so let's clean > > this up. Given that the GCC_PP_FLAGS definition appears twice, drop the > > one that carries the OpenSBI reference, and move that reference to a new > > RISC-V specific variable. > > > > Cc: Abner Chang > > Signed-off-by: Ard Biesheuvel > > --- > > BaseTools/Conf/tools_def.template | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/BaseTools/Conf/tools_def.template > > b/BaseTools/Conf/tools_def.template > > index 805e903b23bb..4733040e3ef1 100755 > > --- a/BaseTools/Conf/tools_def.template > > +++ b/BaseTools/Conf/tools_def.template > > @@ -1979,8 +1979,6 @@ DEFINE GCC5_LOONGARCH64_ASLDLINK_FLAGS > > = DEF(GCC_LOONGARCH64_ASLDLINK_FLAGS) > > DEFINE GCC5_LOONGARCH64_ASM_FLAGS = -x assembler-with-cpp - > > mabi=lp64d -march=loongarch64 -fno-builtin -c -Wall -mno-explicit-relocs > > > > DEFINE GCC5_LOONGARCH64_PP_FLAGS = -mabi=lp64d - > > march=loongarch64 DEF(GCC_PP_FLAGS) > > > > > > > > -DEFINE GCC_PP_FLAGS = -E -x assembler-with-cpp -include > > AutoGen.h DEF(GCC5_RISCV_OPENSBI_TYPES) > > > > - > > > > > > ########################################################## > > ########################## > > > > # > > > > # GCC 4.8 - This configuration is used to compile under Linux to produce > > > > @@ -2456,6 +2454,7 @@ RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z > > common-page-size=0x20 > > *_GCC5_RISCV64_RC_FLAGS = DEF(GCC_RISCV64_RC_FLAGS) > > > > *_GCC5_RISCV64_OBJCOPY_FLAGS = > > > > *_GCC5_RISCV64_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS) > > > > +*_GCC5_RISCV64_PP_FLAGS = DEF(GCC_PP_FLAGS) > > DEF(GCC5_RISCV_OPENSBI_TYPES) > > > > > > > > ################## > > > > # GCC5 LOONGARCH64 definitions > > > > -- > > 2.39.0