From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by mx.groups.io with SMTP id smtpd.web10.166.1648330575051134785 for ; Sat, 26 Mar 2022 14:36:15 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=Edim6VSr; spf=pass (domain: quicinc.com, ip: 129.46.98.28, mailfrom: quic_llindhol@quicinc.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1648330575; x=1679866575; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=48v31KPFMbzBJcrcTadrvT4Zifu/osQ0hSg0rzjnAA4=; b=Edim6VSrAD6daCdZOvL4HxnGQKonEkuVuAvsOBHCI4lNrNT4kAu5smpC P9s9nqPGuGlFpXRqUdOlbc2+yLlE3ER37IrYRkU8YR/P/20yS4lZDbXk3 sKyqsygs5aODw+BzGpMh9QmcsA9+7hyoSMEIS6McRcX2wlX+mgU+t2omv k=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 26 Mar 2022 14:36:14 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2022 14:36:14 -0700 Received: from qc-i7.hemma.eciton.net (10.80.80.8) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Sat, 26 Mar 2022 14:36:11 -0700 Date: Sat, 26 Mar 2022 21:36:08 +0000 From: "Leif Lindholm" To: Vu Nguyen CC: , , Ard Biesheuvel , Chuong Tran , Leif Lindholm , Michael D Kinney , Nate DeSimone , Phong Vo , Thang Nguyen Subject: Re: [edk2-non-osi][PATCH v4 0/2] Introduce Silicon/Ampere and AmpereAltraBinPkg package Message-ID: References: <20211022055604.19500-1-vunguyen@os.amperecomputing.com> MIME-Version: 1.0 In-Reply-To: <20211022055604.19500-1-vunguyen@os.amperecomputing.com> Return-Path: quic_llindhol@quicinc.com X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.47.97.222) Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline Reviewed-by: Leif Lindholm Pushed as 0320db977fb2..7dcfcf88b8a9 in preparation of pushing the edk2-platforms set. On Fri, Oct 22, 2021 at 12:56:02 +0700, Vu Nguyen wrote: > Create edk2-non-osi component holder for Ampere Libraries. This patchset > also adds PciePhyLib which provides function to initialize PCIe PHY on > Ampere Altra processor. > > Commits in this patchset can be found at: > https://github.com/AmpereComputing/edk2-non-osi/tree/add-PciePhyLib > > Cc: Ard Biesheuvel > Cc: Chuong Tran > Cc: Leif Lindholm > Cc: Michael D Kinney > Cc: Nate DeSimone > Cc: Phong Vo > Cc: Thang Nguyen > > Signed-off-by: Vu Nguyen > > Change since v3: > Add wrapper function to hide the initialization code. > Update header file. > > Change since v2: > Remove unused macros and function prototypes from the header file. > Rename Ac01BinPkg.dec to AmpereAltraBinPkg.dec. > > Change since v1: > Remove PciePhyLib.lib binary from the commit. > Update header guard to align with coding standard. > > Vu Nguyen (2): > AmpereAltraBinPkg: Add PciePhyLib library > edk2-non-osi: Add AmpereAltraBinPkg maintainers > > Maintainers.txt | 4 +++ > Silicon/Ampere/License.txt | 25 +++++++++++++++++++ > .../AmpereAltraBinPkg/AmpereAltraBinPkg.dec | 16 ++++++++++++ > .../Library/PciePhyLib/PciePhyLib.inf | 23 +++++++++++++++++ > .../Include/Library/PciePhyLib.h | 25 +++++++++++++++++++ > 5 files changed, 93 insertions(+) > create mode 100644 Silicon/Ampere/License.txt > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/AmpereAltraBinPkg.dec > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.inf > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Include/Library/PciePhyLib.h > > -- > 2.17.1 >